mcxa_pac/tdet0/
lr.rs

1#[doc = "Register `LR` reader"]
2pub type R = crate::R<LrSpec>;
3#[doc = "Register `LR` writer"]
4pub type W = crate::W<LrSpec>;
5#[doc = "Control Register Lock\n\nValue on reset: 1"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Crl {
9    #[doc = "0: Locked and writes are ignored"]
10    Lock = 0,
11    #[doc = "1: Not locked and writes complete as normal"]
12    NotLock = 1,
13}
14impl From<Crl> for bool {
15    #[inline(always)]
16    fn from(variant: Crl) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `CRL` reader - Control Register Lock"]
21pub type CrlR = crate::BitReader<Crl>;
22impl CrlR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Crl {
26        match self.bits {
27            false => Crl::Lock,
28            true => Crl::NotLock,
29        }
30    }
31    #[doc = "Locked and writes are ignored"]
32    #[inline(always)]
33    pub fn is_lock(&self) -> bool {
34        *self == Crl::Lock
35    }
36    #[doc = "Not locked and writes complete as normal"]
37    #[inline(always)]
38    pub fn is_not_lock(&self) -> bool {
39        *self == Crl::NotLock
40    }
41}
42#[doc = "Field `CRL` writer - Control Register Lock"]
43pub type CrlW<'a, REG> = crate::BitWriter<'a, REG, Crl>;
44impl<'a, REG> CrlW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Locked and writes are ignored"]
49    #[inline(always)]
50    pub fn lock(self) -> &'a mut crate::W<REG> {
51        self.variant(Crl::Lock)
52    }
53    #[doc = "Not locked and writes complete as normal"]
54    #[inline(always)]
55    pub fn not_lock(self) -> &'a mut crate::W<REG> {
56        self.variant(Crl::NotLock)
57    }
58}
59#[doc = "Status Register Lock\n\nValue on reset: 1"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Srl {
63    #[doc = "0: Locked and writes are ignored"]
64    Lock = 0,
65    #[doc = "1: Not locked and writes complete as normal"]
66    NotLock = 1,
67}
68impl From<Srl> for bool {
69    #[inline(always)]
70    fn from(variant: Srl) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `SRL` reader - Status Register Lock"]
75pub type SrlR = crate::BitReader<Srl>;
76impl SrlR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Srl {
80        match self.bits {
81            false => Srl::Lock,
82            true => Srl::NotLock,
83        }
84    }
85    #[doc = "Locked and writes are ignored"]
86    #[inline(always)]
87    pub fn is_lock(&self) -> bool {
88        *self == Srl::Lock
89    }
90    #[doc = "Not locked and writes complete as normal"]
91    #[inline(always)]
92    pub fn is_not_lock(&self) -> bool {
93        *self == Srl::NotLock
94    }
95}
96#[doc = "Field `SRL` writer - Status Register Lock"]
97pub type SrlW<'a, REG> = crate::BitWriter<'a, REG, Srl>;
98impl<'a, REG> SrlW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Locked and writes are ignored"]
103    #[inline(always)]
104    pub fn lock(self) -> &'a mut crate::W<REG> {
105        self.variant(Srl::Lock)
106    }
107    #[doc = "Not locked and writes complete as normal"]
108    #[inline(always)]
109    pub fn not_lock(self) -> &'a mut crate::W<REG> {
110        self.variant(Srl::NotLock)
111    }
112}
113#[doc = "Lock Register Lock\n\nValue on reset: 1"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Lrl {
117    #[doc = "0: Locked and writes are ignored"]
118    Lock = 0,
119    #[doc = "1: Not locked and writes complete as normal"]
120    NotLock = 1,
121}
122impl From<Lrl> for bool {
123    #[inline(always)]
124    fn from(variant: Lrl) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `LRL` reader - Lock Register Lock"]
129pub type LrlR = crate::BitReader<Lrl>;
130impl LrlR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Lrl {
134        match self.bits {
135            false => Lrl::Lock,
136            true => Lrl::NotLock,
137        }
138    }
139    #[doc = "Locked and writes are ignored"]
140    #[inline(always)]
141    pub fn is_lock(&self) -> bool {
142        *self == Lrl::Lock
143    }
144    #[doc = "Not locked and writes complete as normal"]
145    #[inline(always)]
146    pub fn is_not_lock(&self) -> bool {
147        *self == Lrl::NotLock
148    }
149}
150#[doc = "Field `LRL` writer - Lock Register Lock"]
151pub type LrlW<'a, REG> = crate::BitWriter<'a, REG, Lrl>;
152impl<'a, REG> LrlW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Locked and writes are ignored"]
157    #[inline(always)]
158    pub fn lock(self) -> &'a mut crate::W<REG> {
159        self.variant(Lrl::Lock)
160    }
161    #[doc = "Not locked and writes complete as normal"]
162    #[inline(always)]
163    pub fn not_lock(self) -> &'a mut crate::W<REG> {
164        self.variant(Lrl::NotLock)
165    }
166}
167#[doc = "Interrupt Enable Lock\n\nValue on reset: 1"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Iel {
171    #[doc = "0: Locked and writes are ignored"]
172    Lock = 0,
173    #[doc = "1: Not locked and writes complete as normal"]
174    NotLock = 1,
175}
176impl From<Iel> for bool {
177    #[inline(always)]
178    fn from(variant: Iel) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `IEL` reader - Interrupt Enable Lock"]
183pub type IelR = crate::BitReader<Iel>;
184impl IelR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Iel {
188        match self.bits {
189            false => Iel::Lock,
190            true => Iel::NotLock,
191        }
192    }
193    #[doc = "Locked and writes are ignored"]
194    #[inline(always)]
195    pub fn is_lock(&self) -> bool {
196        *self == Iel::Lock
197    }
198    #[doc = "Not locked and writes complete as normal"]
199    #[inline(always)]
200    pub fn is_not_lock(&self) -> bool {
201        *self == Iel::NotLock
202    }
203}
204#[doc = "Field `IEL` writer - Interrupt Enable Lock"]
205pub type IelW<'a, REG> = crate::BitWriter<'a, REG, Iel>;
206impl<'a, REG> IelW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Locked and writes are ignored"]
211    #[inline(always)]
212    pub fn lock(self) -> &'a mut crate::W<REG> {
213        self.variant(Iel::Lock)
214    }
215    #[doc = "Not locked and writes complete as normal"]
216    #[inline(always)]
217    pub fn not_lock(self) -> &'a mut crate::W<REG> {
218        self.variant(Iel::NotLock)
219    }
220}
221#[doc = "Tamper Seconds Lock\n\nValue on reset: 1"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Tsl {
225    #[doc = "0: Locked and writes are ignored"]
226    Lock = 0,
227    #[doc = "1: Not locked and writes complete as normal"]
228    NotLock = 1,
229}
230impl From<Tsl> for bool {
231    #[inline(always)]
232    fn from(variant: Tsl) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `TSL` reader - Tamper Seconds Lock"]
237pub type TslR = crate::BitReader<Tsl>;
238impl TslR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Tsl {
242        match self.bits {
243            false => Tsl::Lock,
244            true => Tsl::NotLock,
245        }
246    }
247    #[doc = "Locked and writes are ignored"]
248    #[inline(always)]
249    pub fn is_lock(&self) -> bool {
250        *self == Tsl::Lock
251    }
252    #[doc = "Not locked and writes complete as normal"]
253    #[inline(always)]
254    pub fn is_not_lock(&self) -> bool {
255        *self == Tsl::NotLock
256    }
257}
258#[doc = "Field `TSL` writer - Tamper Seconds Lock"]
259pub type TslW<'a, REG> = crate::BitWriter<'a, REG, Tsl>;
260impl<'a, REG> TslW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Locked and writes are ignored"]
265    #[inline(always)]
266    pub fn lock(self) -> &'a mut crate::W<REG> {
267        self.variant(Tsl::Lock)
268    }
269    #[doc = "Not locked and writes complete as normal"]
270    #[inline(always)]
271    pub fn not_lock(self) -> &'a mut crate::W<REG> {
272        self.variant(Tsl::NotLock)
273    }
274}
275#[doc = "Tamper Enable Lock\n\nValue on reset: 1"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Tel {
279    #[doc = "0: Locked and writes are ignored"]
280    Lock = 0,
281    #[doc = "1: Not locked and writes complete as normal"]
282    NotLock = 1,
283}
284impl From<Tel> for bool {
285    #[inline(always)]
286    fn from(variant: Tel) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `TEL` reader - Tamper Enable Lock"]
291pub type TelR = crate::BitReader<Tel>;
292impl TelR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Tel {
296        match self.bits {
297            false => Tel::Lock,
298            true => Tel::NotLock,
299        }
300    }
301    #[doc = "Locked and writes are ignored"]
302    #[inline(always)]
303    pub fn is_lock(&self) -> bool {
304        *self == Tel::Lock
305    }
306    #[doc = "Not locked and writes complete as normal"]
307    #[inline(always)]
308    pub fn is_not_lock(&self) -> bool {
309        *self == Tel::NotLock
310    }
311}
312#[doc = "Field `TEL` writer - Tamper Enable Lock"]
313pub type TelW<'a, REG> = crate::BitWriter<'a, REG, Tel>;
314impl<'a, REG> TelW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "Locked and writes are ignored"]
319    #[inline(always)]
320    pub fn lock(self) -> &'a mut crate::W<REG> {
321        self.variant(Tel::Lock)
322    }
323    #[doc = "Not locked and writes complete as normal"]
324    #[inline(always)]
325    pub fn not_lock(self) -> &'a mut crate::W<REG> {
326        self.variant(Tel::NotLock)
327    }
328}
329#[doc = "Pin Polarity Lock\n\nValue on reset: 1"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Ppl {
333    #[doc = "0: Locked and writes are ignored"]
334    Lock = 0,
335    #[doc = "1: Not locked and writes complete as normal"]
336    NotLock = 1,
337}
338impl From<Ppl> for bool {
339    #[inline(always)]
340    fn from(variant: Ppl) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `PPL` reader - Pin Polarity Lock"]
345pub type PplR = crate::BitReader<Ppl>;
346impl PplR {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> Ppl {
350        match self.bits {
351            false => Ppl::Lock,
352            true => Ppl::NotLock,
353        }
354    }
355    #[doc = "Locked and writes are ignored"]
356    #[inline(always)]
357    pub fn is_lock(&self) -> bool {
358        *self == Ppl::Lock
359    }
360    #[doc = "Not locked and writes complete as normal"]
361    #[inline(always)]
362    pub fn is_not_lock(&self) -> bool {
363        *self == Ppl::NotLock
364    }
365}
366#[doc = "Field `PPL` writer - Pin Polarity Lock"]
367pub type PplW<'a, REG> = crate::BitWriter<'a, REG, Ppl>;
368impl<'a, REG> PplW<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "Locked and writes are ignored"]
373    #[inline(always)]
374    pub fn lock(self) -> &'a mut crate::W<REG> {
375        self.variant(Ppl::Lock)
376    }
377    #[doc = "Not locked and writes complete as normal"]
378    #[inline(always)]
379    pub fn not_lock(self) -> &'a mut crate::W<REG> {
380        self.variant(Ppl::NotLock)
381    }
382}
383#[doc = "Glitch Filter Lock\n\nValue on reset: 1"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Gfl0 {
387    #[doc = "0: Locked and writes are ignored"]
388    Lock = 0,
389    #[doc = "1: Not locked and writes complete as normal"]
390    NotLock = 1,
391}
392impl From<Gfl0> for bool {
393    #[inline(always)]
394    fn from(variant: Gfl0) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `GFL0` reader - Glitch Filter Lock"]
399pub type Gfl0R = crate::BitReader<Gfl0>;
400impl Gfl0R {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> Gfl0 {
404        match self.bits {
405            false => Gfl0::Lock,
406            true => Gfl0::NotLock,
407        }
408    }
409    #[doc = "Locked and writes are ignored"]
410    #[inline(always)]
411    pub fn is_lock(&self) -> bool {
412        *self == Gfl0::Lock
413    }
414    #[doc = "Not locked and writes complete as normal"]
415    #[inline(always)]
416    pub fn is_not_lock(&self) -> bool {
417        *self == Gfl0::NotLock
418    }
419}
420#[doc = "Field `GFL0` writer - Glitch Filter Lock"]
421pub type Gfl0W<'a, REG> = crate::BitWriter<'a, REG, Gfl0>;
422impl<'a, REG> Gfl0W<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "Locked and writes are ignored"]
427    #[inline(always)]
428    pub fn lock(self) -> &'a mut crate::W<REG> {
429        self.variant(Gfl0::Lock)
430    }
431    #[doc = "Not locked and writes complete as normal"]
432    #[inline(always)]
433    pub fn not_lock(self) -> &'a mut crate::W<REG> {
434        self.variant(Gfl0::NotLock)
435    }
436}
437#[doc = "Glitch Filter Lock\n\nValue on reset: 1"]
438#[cfg_attr(feature = "defmt", derive(defmt::Format))]
439#[derive(Clone, Copy, Debug, PartialEq, Eq)]
440pub enum Gfl1 {
441    #[doc = "0: Locked and writes are ignored"]
442    Lock = 0,
443    #[doc = "1: Not locked and writes complete as normal"]
444    NotLock = 1,
445}
446impl From<Gfl1> for bool {
447    #[inline(always)]
448    fn from(variant: Gfl1) -> Self {
449        variant as u8 != 0
450    }
451}
452#[doc = "Field `GFL1` reader - Glitch Filter Lock"]
453pub type Gfl1R = crate::BitReader<Gfl1>;
454impl Gfl1R {
455    #[doc = "Get enumerated values variant"]
456    #[inline(always)]
457    pub const fn variant(&self) -> Gfl1 {
458        match self.bits {
459            false => Gfl1::Lock,
460            true => Gfl1::NotLock,
461        }
462    }
463    #[doc = "Locked and writes are ignored"]
464    #[inline(always)]
465    pub fn is_lock(&self) -> bool {
466        *self == Gfl1::Lock
467    }
468    #[doc = "Not locked and writes complete as normal"]
469    #[inline(always)]
470    pub fn is_not_lock(&self) -> bool {
471        *self == Gfl1::NotLock
472    }
473}
474#[doc = "Field `GFL1` writer - Glitch Filter Lock"]
475pub type Gfl1W<'a, REG> = crate::BitWriter<'a, REG, Gfl1>;
476impl<'a, REG> Gfl1W<'a, REG>
477where
478    REG: crate::Writable + crate::RegisterSpec,
479{
480    #[doc = "Locked and writes are ignored"]
481    #[inline(always)]
482    pub fn lock(self) -> &'a mut crate::W<REG> {
483        self.variant(Gfl1::Lock)
484    }
485    #[doc = "Not locked and writes complete as normal"]
486    #[inline(always)]
487    pub fn not_lock(self) -> &'a mut crate::W<REG> {
488        self.variant(Gfl1::NotLock)
489    }
490}
491#[doc = "Glitch Filter Lock\n\nValue on reset: 1"]
492#[cfg_attr(feature = "defmt", derive(defmt::Format))]
493#[derive(Clone, Copy, Debug, PartialEq, Eq)]
494pub enum Gfl2 {
495    #[doc = "0: Locked and writes are ignored"]
496    Lock = 0,
497    #[doc = "1: Not locked and writes complete as normal"]
498    NotLock = 1,
499}
500impl From<Gfl2> for bool {
501    #[inline(always)]
502    fn from(variant: Gfl2) -> Self {
503        variant as u8 != 0
504    }
505}
506#[doc = "Field `GFL2` reader - Glitch Filter Lock"]
507pub type Gfl2R = crate::BitReader<Gfl2>;
508impl Gfl2R {
509    #[doc = "Get enumerated values variant"]
510    #[inline(always)]
511    pub const fn variant(&self) -> Gfl2 {
512        match self.bits {
513            false => Gfl2::Lock,
514            true => Gfl2::NotLock,
515        }
516    }
517    #[doc = "Locked and writes are ignored"]
518    #[inline(always)]
519    pub fn is_lock(&self) -> bool {
520        *self == Gfl2::Lock
521    }
522    #[doc = "Not locked and writes complete as normal"]
523    #[inline(always)]
524    pub fn is_not_lock(&self) -> bool {
525        *self == Gfl2::NotLock
526    }
527}
528#[doc = "Field `GFL2` writer - Glitch Filter Lock"]
529pub type Gfl2W<'a, REG> = crate::BitWriter<'a, REG, Gfl2>;
530impl<'a, REG> Gfl2W<'a, REG>
531where
532    REG: crate::Writable + crate::RegisterSpec,
533{
534    #[doc = "Locked and writes are ignored"]
535    #[inline(always)]
536    pub fn lock(self) -> &'a mut crate::W<REG> {
537        self.variant(Gfl2::Lock)
538    }
539    #[doc = "Not locked and writes complete as normal"]
540    #[inline(always)]
541    pub fn not_lock(self) -> &'a mut crate::W<REG> {
542        self.variant(Gfl2::NotLock)
543    }
544}
545#[doc = "Glitch Filter Lock\n\nValue on reset: 1"]
546#[cfg_attr(feature = "defmt", derive(defmt::Format))]
547#[derive(Clone, Copy, Debug, PartialEq, Eq)]
548pub enum Gfl3 {
549    #[doc = "0: Locked and writes are ignored"]
550    Lock = 0,
551    #[doc = "1: Not locked and writes complete as normal"]
552    NotLock = 1,
553}
554impl From<Gfl3> for bool {
555    #[inline(always)]
556    fn from(variant: Gfl3) -> Self {
557        variant as u8 != 0
558    }
559}
560#[doc = "Field `GFL3` reader - Glitch Filter Lock"]
561pub type Gfl3R = crate::BitReader<Gfl3>;
562impl Gfl3R {
563    #[doc = "Get enumerated values variant"]
564    #[inline(always)]
565    pub const fn variant(&self) -> Gfl3 {
566        match self.bits {
567            false => Gfl3::Lock,
568            true => Gfl3::NotLock,
569        }
570    }
571    #[doc = "Locked and writes are ignored"]
572    #[inline(always)]
573    pub fn is_lock(&self) -> bool {
574        *self == Gfl3::Lock
575    }
576    #[doc = "Not locked and writes complete as normal"]
577    #[inline(always)]
578    pub fn is_not_lock(&self) -> bool {
579        *self == Gfl3::NotLock
580    }
581}
582#[doc = "Field `GFL3` writer - Glitch Filter Lock"]
583pub type Gfl3W<'a, REG> = crate::BitWriter<'a, REG, Gfl3>;
584impl<'a, REG> Gfl3W<'a, REG>
585where
586    REG: crate::Writable + crate::RegisterSpec,
587{
588    #[doc = "Locked and writes are ignored"]
589    #[inline(always)]
590    pub fn lock(self) -> &'a mut crate::W<REG> {
591        self.variant(Gfl3::Lock)
592    }
593    #[doc = "Not locked and writes complete as normal"]
594    #[inline(always)]
595    pub fn not_lock(self) -> &'a mut crate::W<REG> {
596        self.variant(Gfl3::NotLock)
597    }
598}
599#[doc = "Glitch Filter Lock\n\nValue on reset: 1"]
600#[cfg_attr(feature = "defmt", derive(defmt::Format))]
601#[derive(Clone, Copy, Debug, PartialEq, Eq)]
602pub enum Gfl4 {
603    #[doc = "0: Locked and writes are ignored"]
604    Lock = 0,
605    #[doc = "1: Not locked and writes complete as normal"]
606    NotLock = 1,
607}
608impl From<Gfl4> for bool {
609    #[inline(always)]
610    fn from(variant: Gfl4) -> Self {
611        variant as u8 != 0
612    }
613}
614#[doc = "Field `GFL4` reader - Glitch Filter Lock"]
615pub type Gfl4R = crate::BitReader<Gfl4>;
616impl Gfl4R {
617    #[doc = "Get enumerated values variant"]
618    #[inline(always)]
619    pub const fn variant(&self) -> Gfl4 {
620        match self.bits {
621            false => Gfl4::Lock,
622            true => Gfl4::NotLock,
623        }
624    }
625    #[doc = "Locked and writes are ignored"]
626    #[inline(always)]
627    pub fn is_lock(&self) -> bool {
628        *self == Gfl4::Lock
629    }
630    #[doc = "Not locked and writes complete as normal"]
631    #[inline(always)]
632    pub fn is_not_lock(&self) -> bool {
633        *self == Gfl4::NotLock
634    }
635}
636#[doc = "Field `GFL4` writer - Glitch Filter Lock"]
637pub type Gfl4W<'a, REG> = crate::BitWriter<'a, REG, Gfl4>;
638impl<'a, REG> Gfl4W<'a, REG>
639where
640    REG: crate::Writable + crate::RegisterSpec,
641{
642    #[doc = "Locked and writes are ignored"]
643    #[inline(always)]
644    pub fn lock(self) -> &'a mut crate::W<REG> {
645        self.variant(Gfl4::Lock)
646    }
647    #[doc = "Not locked and writes complete as normal"]
648    #[inline(always)]
649    pub fn not_lock(self) -> &'a mut crate::W<REG> {
650        self.variant(Gfl4::NotLock)
651    }
652}
653#[doc = "Glitch Filter Lock\n\nValue on reset: 1"]
654#[cfg_attr(feature = "defmt", derive(defmt::Format))]
655#[derive(Clone, Copy, Debug, PartialEq, Eq)]
656pub enum Gfl5 {
657    #[doc = "0: Locked and writes are ignored"]
658    Lock = 0,
659    #[doc = "1: Not locked and writes complete as normal"]
660    NotLock = 1,
661}
662impl From<Gfl5> for bool {
663    #[inline(always)]
664    fn from(variant: Gfl5) -> Self {
665        variant as u8 != 0
666    }
667}
668#[doc = "Field `GFL5` reader - Glitch Filter Lock"]
669pub type Gfl5R = crate::BitReader<Gfl5>;
670impl Gfl5R {
671    #[doc = "Get enumerated values variant"]
672    #[inline(always)]
673    pub const fn variant(&self) -> Gfl5 {
674        match self.bits {
675            false => Gfl5::Lock,
676            true => Gfl5::NotLock,
677        }
678    }
679    #[doc = "Locked and writes are ignored"]
680    #[inline(always)]
681    pub fn is_lock(&self) -> bool {
682        *self == Gfl5::Lock
683    }
684    #[doc = "Not locked and writes complete as normal"]
685    #[inline(always)]
686    pub fn is_not_lock(&self) -> bool {
687        *self == Gfl5::NotLock
688    }
689}
690#[doc = "Field `GFL5` writer - Glitch Filter Lock"]
691pub type Gfl5W<'a, REG> = crate::BitWriter<'a, REG, Gfl5>;
692impl<'a, REG> Gfl5W<'a, REG>
693where
694    REG: crate::Writable + crate::RegisterSpec,
695{
696    #[doc = "Locked and writes are ignored"]
697    #[inline(always)]
698    pub fn lock(self) -> &'a mut crate::W<REG> {
699        self.variant(Gfl5::Lock)
700    }
701    #[doc = "Not locked and writes complete as normal"]
702    #[inline(always)]
703    pub fn not_lock(self) -> &'a mut crate::W<REG> {
704        self.variant(Gfl5::NotLock)
705    }
706}
707impl R {
708    #[doc = "Bit 4 - Control Register Lock"]
709    #[inline(always)]
710    pub fn crl(&self) -> CrlR {
711        CrlR::new(((self.bits >> 4) & 1) != 0)
712    }
713    #[doc = "Bit 5 - Status Register Lock"]
714    #[inline(always)]
715    pub fn srl(&self) -> SrlR {
716        SrlR::new(((self.bits >> 5) & 1) != 0)
717    }
718    #[doc = "Bit 6 - Lock Register Lock"]
719    #[inline(always)]
720    pub fn lrl(&self) -> LrlR {
721        LrlR::new(((self.bits >> 6) & 1) != 0)
722    }
723    #[doc = "Bit 7 - Interrupt Enable Lock"]
724    #[inline(always)]
725    pub fn iel(&self) -> IelR {
726        IelR::new(((self.bits >> 7) & 1) != 0)
727    }
728    #[doc = "Bit 8 - Tamper Seconds Lock"]
729    #[inline(always)]
730    pub fn tsl(&self) -> TslR {
731        TslR::new(((self.bits >> 8) & 1) != 0)
732    }
733    #[doc = "Bit 9 - Tamper Enable Lock"]
734    #[inline(always)]
735    pub fn tel(&self) -> TelR {
736        TelR::new(((self.bits >> 9) & 1) != 0)
737    }
738    #[doc = "Bit 11 - Pin Polarity Lock"]
739    #[inline(always)]
740    pub fn ppl(&self) -> PplR {
741        PplR::new(((self.bits >> 11) & 1) != 0)
742    }
743    #[doc = "Bit 16 - Glitch Filter Lock"]
744    #[inline(always)]
745    pub fn gfl0(&self) -> Gfl0R {
746        Gfl0R::new(((self.bits >> 16) & 1) != 0)
747    }
748    #[doc = "Bit 17 - Glitch Filter Lock"]
749    #[inline(always)]
750    pub fn gfl1(&self) -> Gfl1R {
751        Gfl1R::new(((self.bits >> 17) & 1) != 0)
752    }
753    #[doc = "Bit 18 - Glitch Filter Lock"]
754    #[inline(always)]
755    pub fn gfl2(&self) -> Gfl2R {
756        Gfl2R::new(((self.bits >> 18) & 1) != 0)
757    }
758    #[doc = "Bit 19 - Glitch Filter Lock"]
759    #[inline(always)]
760    pub fn gfl3(&self) -> Gfl3R {
761        Gfl3R::new(((self.bits >> 19) & 1) != 0)
762    }
763    #[doc = "Bit 20 - Glitch Filter Lock"]
764    #[inline(always)]
765    pub fn gfl4(&self) -> Gfl4R {
766        Gfl4R::new(((self.bits >> 20) & 1) != 0)
767    }
768    #[doc = "Bit 21 - Glitch Filter Lock"]
769    #[inline(always)]
770    pub fn gfl5(&self) -> Gfl5R {
771        Gfl5R::new(((self.bits >> 21) & 1) != 0)
772    }
773}
774#[cfg(feature = "debug")]
775impl core::fmt::Debug for R {
776    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
777        f.debug_struct("LR")
778            .field("crl", &self.crl())
779            .field("srl", &self.srl())
780            .field("lrl", &self.lrl())
781            .field("iel", &self.iel())
782            .field("tsl", &self.tsl())
783            .field("tel", &self.tel())
784            .field("ppl", &self.ppl())
785            .field("gfl0", &self.gfl0())
786            .field("gfl1", &self.gfl1())
787            .field("gfl2", &self.gfl2())
788            .field("gfl3", &self.gfl3())
789            .field("gfl4", &self.gfl4())
790            .field("gfl5", &self.gfl5())
791            .finish()
792    }
793}
794impl W {
795    #[doc = "Bit 4 - Control Register Lock"]
796    #[inline(always)]
797    pub fn crl(&mut self) -> CrlW<'_, LrSpec> {
798        CrlW::new(self, 4)
799    }
800    #[doc = "Bit 5 - Status Register Lock"]
801    #[inline(always)]
802    pub fn srl(&mut self) -> SrlW<'_, LrSpec> {
803        SrlW::new(self, 5)
804    }
805    #[doc = "Bit 6 - Lock Register Lock"]
806    #[inline(always)]
807    pub fn lrl(&mut self) -> LrlW<'_, LrSpec> {
808        LrlW::new(self, 6)
809    }
810    #[doc = "Bit 7 - Interrupt Enable Lock"]
811    #[inline(always)]
812    pub fn iel(&mut self) -> IelW<'_, LrSpec> {
813        IelW::new(self, 7)
814    }
815    #[doc = "Bit 8 - Tamper Seconds Lock"]
816    #[inline(always)]
817    pub fn tsl(&mut self) -> TslW<'_, LrSpec> {
818        TslW::new(self, 8)
819    }
820    #[doc = "Bit 9 - Tamper Enable Lock"]
821    #[inline(always)]
822    pub fn tel(&mut self) -> TelW<'_, LrSpec> {
823        TelW::new(self, 9)
824    }
825    #[doc = "Bit 11 - Pin Polarity Lock"]
826    #[inline(always)]
827    pub fn ppl(&mut self) -> PplW<'_, LrSpec> {
828        PplW::new(self, 11)
829    }
830    #[doc = "Bit 16 - Glitch Filter Lock"]
831    #[inline(always)]
832    pub fn gfl0(&mut self) -> Gfl0W<'_, LrSpec> {
833        Gfl0W::new(self, 16)
834    }
835    #[doc = "Bit 17 - Glitch Filter Lock"]
836    #[inline(always)]
837    pub fn gfl1(&mut self) -> Gfl1W<'_, LrSpec> {
838        Gfl1W::new(self, 17)
839    }
840    #[doc = "Bit 18 - Glitch Filter Lock"]
841    #[inline(always)]
842    pub fn gfl2(&mut self) -> Gfl2W<'_, LrSpec> {
843        Gfl2W::new(self, 18)
844    }
845    #[doc = "Bit 19 - Glitch Filter Lock"]
846    #[inline(always)]
847    pub fn gfl3(&mut self) -> Gfl3W<'_, LrSpec> {
848        Gfl3W::new(self, 19)
849    }
850    #[doc = "Bit 20 - Glitch Filter Lock"]
851    #[inline(always)]
852    pub fn gfl4(&mut self) -> Gfl4W<'_, LrSpec> {
853        Gfl4W::new(self, 20)
854    }
855    #[doc = "Bit 21 - Glitch Filter Lock"]
856    #[inline(always)]
857    pub fn gfl5(&mut self) -> Gfl5W<'_, LrSpec> {
858        Gfl5W::new(self, 21)
859    }
860}
861#[doc = "Lock\n\nYou can [`read`](crate::Reg::read) this register and get [`lr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
862pub struct LrSpec;
863impl crate::RegisterSpec for LrSpec {
864    type Ux = u32;
865}
866#[doc = "`read()` method returns [`lr::R`](R) reader structure"]
867impl crate::Readable for LrSpec {}
868#[doc = "`write(|w| ..)` method takes [`lr::W`](W) writer structure"]
869impl crate::Writable for LrSpec {
870    type Safety = crate::Unsafe;
871}
872#[doc = "`reset()` method sets LR to value 0x003f_0bf0"]
873impl crate::Resettable for LrSpec {
874    const RESET_VALUE: u32 = 0x003f_0bf0;
875}
mcxa_pac/tdet0/lr.rs

mcxa_pac/tdet0/
lr.rs
