mcxa_pac/syscon/
smart_dmaint.rs

1#[doc = "Register `SmartDMAINT` reader"]
2pub type R = crate::R<SmartDmaintSpec>;
3#[doc = "Register `SmartDMAINT` writer"]
4pub type W = crate::W<SmartDmaintSpec>;
5#[doc = "SmartDMA hijack NVIC IRQ1\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Int0 {
9    #[doc = "0: Disable"]
10    Disable = 0,
11    #[doc = "1: Enable"]
12    Enable = 1,
13}
14impl From<Int0> for bool {
15    #[inline(always)]
16    fn from(variant: Int0) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `INT0` reader - SmartDMA hijack NVIC IRQ1"]
21pub type Int0R = crate::BitReader<Int0>;
22impl Int0R {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Int0 {
26        match self.bits {
27            false => Int0::Disable,
28            true => Int0::Enable,
29        }
30    }
31    #[doc = "Disable"]
32    #[inline(always)]
33    pub fn is_disable(&self) -> bool {
34        *self == Int0::Disable
35    }
36    #[doc = "Enable"]
37    #[inline(always)]
38    pub fn is_enable(&self) -> bool {
39        *self == Int0::Enable
40    }
41}
42#[doc = "Field `INT0` writer - SmartDMA hijack NVIC IRQ1"]
43pub type Int0W<'a, REG> = crate::BitWriter<'a, REG, Int0>;
44impl<'a, REG> Int0W<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disable"]
49    #[inline(always)]
50    pub fn disable(self) -> &'a mut crate::W<REG> {
51        self.variant(Int0::Disable)
52    }
53    #[doc = "Enable"]
54    #[inline(always)]
55    pub fn enable(self) -> &'a mut crate::W<REG> {
56        self.variant(Int0::Enable)
57    }
58}
59#[doc = "SmartDMA hijack NVIC IRQ17\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Int1 {
63    #[doc = "0: Disable"]
64    Disable = 0,
65    #[doc = "1: Enable"]
66    Enable = 1,
67}
68impl From<Int1> for bool {
69    #[inline(always)]
70    fn from(variant: Int1) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `INT1` reader - SmartDMA hijack NVIC IRQ17"]
75pub type Int1R = crate::BitReader<Int1>;
76impl Int1R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Int1 {
80        match self.bits {
81            false => Int1::Disable,
82            true => Int1::Enable,
83        }
84    }
85    #[doc = "Disable"]
86    #[inline(always)]
87    pub fn is_disable(&self) -> bool {
88        *self == Int1::Disable
89    }
90    #[doc = "Enable"]
91    #[inline(always)]
92    pub fn is_enable(&self) -> bool {
93        *self == Int1::Enable
94    }
95}
96#[doc = "Field `INT1` writer - SmartDMA hijack NVIC IRQ17"]
97pub type Int1W<'a, REG> = crate::BitWriter<'a, REG, Int1>;
98impl<'a, REG> Int1W<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Disable"]
103    #[inline(always)]
104    pub fn disable(self) -> &'a mut crate::W<REG> {
105        self.variant(Int1::Disable)
106    }
107    #[doc = "Enable"]
108    #[inline(always)]
109    pub fn enable(self) -> &'a mut crate::W<REG> {
110        self.variant(Int1::Enable)
111    }
112}
113#[doc = "SmartDMA hijack NVIC IRQ18\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Int2 {
117    #[doc = "0: Disable"]
118    Disable = 0,
119    #[doc = "1: Enable"]
120    Enable = 1,
121}
122impl From<Int2> for bool {
123    #[inline(always)]
124    fn from(variant: Int2) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `INT2` reader - SmartDMA hijack NVIC IRQ18"]
129pub type Int2R = crate::BitReader<Int2>;
130impl Int2R {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Int2 {
134        match self.bits {
135            false => Int2::Disable,
136            true => Int2::Enable,
137        }
138    }
139    #[doc = "Disable"]
140    #[inline(always)]
141    pub fn is_disable(&self) -> bool {
142        *self == Int2::Disable
143    }
144    #[doc = "Enable"]
145    #[inline(always)]
146    pub fn is_enable(&self) -> bool {
147        *self == Int2::Enable
148    }
149}
150#[doc = "Field `INT2` writer - SmartDMA hijack NVIC IRQ18"]
151pub type Int2W<'a, REG> = crate::BitWriter<'a, REG, Int2>;
152impl<'a, REG> Int2W<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Disable"]
157    #[inline(always)]
158    pub fn disable(self) -> &'a mut crate::W<REG> {
159        self.variant(Int2::Disable)
160    }
161    #[doc = "Enable"]
162    #[inline(always)]
163    pub fn enable(self) -> &'a mut crate::W<REG> {
164        self.variant(Int2::Enable)
165    }
166}
167#[doc = "SmartDMA hijack NVIC IRQ29\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Int3 {
171    #[doc = "0: Disable"]
172    Disable = 0,
173    #[doc = "1: Enable"]
174    Enable = 1,
175}
176impl From<Int3> for bool {
177    #[inline(always)]
178    fn from(variant: Int3) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `INT3` reader - SmartDMA hijack NVIC IRQ29"]
183pub type Int3R = crate::BitReader<Int3>;
184impl Int3R {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Int3 {
188        match self.bits {
189            false => Int3::Disable,
190            true => Int3::Enable,
191        }
192    }
193    #[doc = "Disable"]
194    #[inline(always)]
195    pub fn is_disable(&self) -> bool {
196        *self == Int3::Disable
197    }
198    #[doc = "Enable"]
199    #[inline(always)]
200    pub fn is_enable(&self) -> bool {
201        *self == Int3::Enable
202    }
203}
204#[doc = "Field `INT3` writer - SmartDMA hijack NVIC IRQ29"]
205pub type Int3W<'a, REG> = crate::BitWriter<'a, REG, Int3>;
206impl<'a, REG> Int3W<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Disable"]
211    #[inline(always)]
212    pub fn disable(self) -> &'a mut crate::W<REG> {
213        self.variant(Int3::Disable)
214    }
215    #[doc = "Enable"]
216    #[inline(always)]
217    pub fn enable(self) -> &'a mut crate::W<REG> {
218        self.variant(Int3::Enable)
219    }
220}
221#[doc = "SmartDMA hijack NVIC IRQ30\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Int4 {
225    #[doc = "0: Disable"]
226    Disable = 0,
227    #[doc = "1: Enable"]
228    Enable = 1,
229}
230impl From<Int4> for bool {
231    #[inline(always)]
232    fn from(variant: Int4) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `INT4` reader - SmartDMA hijack NVIC IRQ30"]
237pub type Int4R = crate::BitReader<Int4>;
238impl Int4R {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Int4 {
242        match self.bits {
243            false => Int4::Disable,
244            true => Int4::Enable,
245        }
246    }
247    #[doc = "Disable"]
248    #[inline(always)]
249    pub fn is_disable(&self) -> bool {
250        *self == Int4::Disable
251    }
252    #[doc = "Enable"]
253    #[inline(always)]
254    pub fn is_enable(&self) -> bool {
255        *self == Int4::Enable
256    }
257}
258#[doc = "Field `INT4` writer - SmartDMA hijack NVIC IRQ30"]
259pub type Int4W<'a, REG> = crate::BitWriter<'a, REG, Int4>;
260impl<'a, REG> Int4W<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Disable"]
265    #[inline(always)]
266    pub fn disable(self) -> &'a mut crate::W<REG> {
267        self.variant(Int4::Disable)
268    }
269    #[doc = "Enable"]
270    #[inline(always)]
271    pub fn enable(self) -> &'a mut crate::W<REG> {
272        self.variant(Int4::Enable)
273    }
274}
275#[doc = "SmartDMA hijack NVIC IRQ31\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Int5 {
279    #[doc = "0: Disable"]
280    Disable = 0,
281    #[doc = "1: Enable"]
282    Enable = 1,
283}
284impl From<Int5> for bool {
285    #[inline(always)]
286    fn from(variant: Int5) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `INT5` reader - SmartDMA hijack NVIC IRQ31"]
291pub type Int5R = crate::BitReader<Int5>;
292impl Int5R {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Int5 {
296        match self.bits {
297            false => Int5::Disable,
298            true => Int5::Enable,
299        }
300    }
301    #[doc = "Disable"]
302    #[inline(always)]
303    pub fn is_disable(&self) -> bool {
304        *self == Int5::Disable
305    }
306    #[doc = "Enable"]
307    #[inline(always)]
308    pub fn is_enable(&self) -> bool {
309        *self == Int5::Enable
310    }
311}
312#[doc = "Field `INT5` writer - SmartDMA hijack NVIC IRQ31"]
313pub type Int5W<'a, REG> = crate::BitWriter<'a, REG, Int5>;
314impl<'a, REG> Int5W<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "Disable"]
319    #[inline(always)]
320    pub fn disable(self) -> &'a mut crate::W<REG> {
321        self.variant(Int5::Disable)
322    }
323    #[doc = "Enable"]
324    #[inline(always)]
325    pub fn enable(self) -> &'a mut crate::W<REG> {
326        self.variant(Int5::Enable)
327    }
328}
329#[doc = "SmartDMA hijack NVIC IRQ32\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Int6 {
333    #[doc = "0: Disable"]
334    Disable = 0,
335    #[doc = "1: Enable"]
336    Enable = 1,
337}
338impl From<Int6> for bool {
339    #[inline(always)]
340    fn from(variant: Int6) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `INT6` reader - SmartDMA hijack NVIC IRQ32"]
345pub type Int6R = crate::BitReader<Int6>;
346impl Int6R {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> Int6 {
350        match self.bits {
351            false => Int6::Disable,
352            true => Int6::Enable,
353        }
354    }
355    #[doc = "Disable"]
356    #[inline(always)]
357    pub fn is_disable(&self) -> bool {
358        *self == Int6::Disable
359    }
360    #[doc = "Enable"]
361    #[inline(always)]
362    pub fn is_enable(&self) -> bool {
363        *self == Int6::Enable
364    }
365}
366#[doc = "Field `INT6` writer - SmartDMA hijack NVIC IRQ32"]
367pub type Int6W<'a, REG> = crate::BitWriter<'a, REG, Int6>;
368impl<'a, REG> Int6W<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "Disable"]
373    #[inline(always)]
374    pub fn disable(self) -> &'a mut crate::W<REG> {
375        self.variant(Int6::Disable)
376    }
377    #[doc = "Enable"]
378    #[inline(always)]
379    pub fn enable(self) -> &'a mut crate::W<REG> {
380        self.variant(Int6::Enable)
381    }
382}
383#[doc = "SmartDMA hijack NVIC IRQ33\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Int7 {
387    #[doc = "0: Disable"]
388    Disable = 0,
389    #[doc = "1: Enable"]
390    Enable = 1,
391}
392impl From<Int7> for bool {
393    #[inline(always)]
394    fn from(variant: Int7) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `INT7` reader - SmartDMA hijack NVIC IRQ33"]
399pub type Int7R = crate::BitReader<Int7>;
400impl Int7R {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> Int7 {
404        match self.bits {
405            false => Int7::Disable,
406            true => Int7::Enable,
407        }
408    }
409    #[doc = "Disable"]
410    #[inline(always)]
411    pub fn is_disable(&self) -> bool {
412        *self == Int7::Disable
413    }
414    #[doc = "Enable"]
415    #[inline(always)]
416    pub fn is_enable(&self) -> bool {
417        *self == Int7::Enable
418    }
419}
420#[doc = "Field `INT7` writer - SmartDMA hijack NVIC IRQ33"]
421pub type Int7W<'a, REG> = crate::BitWriter<'a, REG, Int7>;
422impl<'a, REG> Int7W<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "Disable"]
427    #[inline(always)]
428    pub fn disable(self) -> &'a mut crate::W<REG> {
429        self.variant(Int7::Disable)
430    }
431    #[doc = "Enable"]
432    #[inline(always)]
433    pub fn enable(self) -> &'a mut crate::W<REG> {
434        self.variant(Int7::Enable)
435    }
436}
437#[doc = "SmartDMA hijack NVIC IRQ34\n\nValue on reset: 0"]
438#[cfg_attr(feature = "defmt", derive(defmt::Format))]
439#[derive(Clone, Copy, Debug, PartialEq, Eq)]
440pub enum Int8 {
441    #[doc = "0: Disable"]
442    Disable = 0,
443    #[doc = "1: Enable"]
444    Enable = 1,
445}
446impl From<Int8> for bool {
447    #[inline(always)]
448    fn from(variant: Int8) -> Self {
449        variant as u8 != 0
450    }
451}
452#[doc = "Field `INT8` reader - SmartDMA hijack NVIC IRQ34"]
453pub type Int8R = crate::BitReader<Int8>;
454impl Int8R {
455    #[doc = "Get enumerated values variant"]
456    #[inline(always)]
457    pub const fn variant(&self) -> Int8 {
458        match self.bits {
459            false => Int8::Disable,
460            true => Int8::Enable,
461        }
462    }
463    #[doc = "Disable"]
464    #[inline(always)]
465    pub fn is_disable(&self) -> bool {
466        *self == Int8::Disable
467    }
468    #[doc = "Enable"]
469    #[inline(always)]
470    pub fn is_enable(&self) -> bool {
471        *self == Int8::Enable
472    }
473}
474#[doc = "Field `INT8` writer - SmartDMA hijack NVIC IRQ34"]
475pub type Int8W<'a, REG> = crate::BitWriter<'a, REG, Int8>;
476impl<'a, REG> Int8W<'a, REG>
477where
478    REG: crate::Writable + crate::RegisterSpec,
479{
480    #[doc = "Disable"]
481    #[inline(always)]
482    pub fn disable(self) -> &'a mut crate::W<REG> {
483        self.variant(Int8::Disable)
484    }
485    #[doc = "Enable"]
486    #[inline(always)]
487    pub fn enable(self) -> &'a mut crate::W<REG> {
488        self.variant(Int8::Enable)
489    }
490}
491#[doc = "SmartDMA hijack NVIC IRQ35\n\nValue on reset: 0"]
492#[cfg_attr(feature = "defmt", derive(defmt::Format))]
493#[derive(Clone, Copy, Debug, PartialEq, Eq)]
494pub enum Int9 {
495    #[doc = "0: Disable"]
496    Disable = 0,
497    #[doc = "1: Enable"]
498    Enable = 1,
499}
500impl From<Int9> for bool {
501    #[inline(always)]
502    fn from(variant: Int9) -> Self {
503        variant as u8 != 0
504    }
505}
506#[doc = "Field `INT9` reader - SmartDMA hijack NVIC IRQ35"]
507pub type Int9R = crate::BitReader<Int9>;
508impl Int9R {
509    #[doc = "Get enumerated values variant"]
510    #[inline(always)]
511    pub const fn variant(&self) -> Int9 {
512        match self.bits {
513            false => Int9::Disable,
514            true => Int9::Enable,
515        }
516    }
517    #[doc = "Disable"]
518    #[inline(always)]
519    pub fn is_disable(&self) -> bool {
520        *self == Int9::Disable
521    }
522    #[doc = "Enable"]
523    #[inline(always)]
524    pub fn is_enable(&self) -> bool {
525        *self == Int9::Enable
526    }
527}
528#[doc = "Field `INT9` writer - SmartDMA hijack NVIC IRQ35"]
529pub type Int9W<'a, REG> = crate::BitWriter<'a, REG, Int9>;
530impl<'a, REG> Int9W<'a, REG>
531where
532    REG: crate::Writable + crate::RegisterSpec,
533{
534    #[doc = "Disable"]
535    #[inline(always)]
536    pub fn disable(self) -> &'a mut crate::W<REG> {
537        self.variant(Int9::Disable)
538    }
539    #[doc = "Enable"]
540    #[inline(always)]
541    pub fn enable(self) -> &'a mut crate::W<REG> {
542        self.variant(Int9::Enable)
543    }
544}
545#[doc = "SmartDMA hijack NVIC IRQ36\n\nValue on reset: 0"]
546#[cfg_attr(feature = "defmt", derive(defmt::Format))]
547#[derive(Clone, Copy, Debug, PartialEq, Eq)]
548pub enum Int10 {
549    #[doc = "0: Disable"]
550    Disable = 0,
551    #[doc = "1: Enable"]
552    Enable = 1,
553}
554impl From<Int10> for bool {
555    #[inline(always)]
556    fn from(variant: Int10) -> Self {
557        variant as u8 != 0
558    }
559}
560#[doc = "Field `INT10` reader - SmartDMA hijack NVIC IRQ36"]
561pub type Int10R = crate::BitReader<Int10>;
562impl Int10R {
563    #[doc = "Get enumerated values variant"]
564    #[inline(always)]
565    pub const fn variant(&self) -> Int10 {
566        match self.bits {
567            false => Int10::Disable,
568            true => Int10::Enable,
569        }
570    }
571    #[doc = "Disable"]
572    #[inline(always)]
573    pub fn is_disable(&self) -> bool {
574        *self == Int10::Disable
575    }
576    #[doc = "Enable"]
577    #[inline(always)]
578    pub fn is_enable(&self) -> bool {
579        *self == Int10::Enable
580    }
581}
582#[doc = "Field `INT10` writer - SmartDMA hijack NVIC IRQ36"]
583pub type Int10W<'a, REG> = crate::BitWriter<'a, REG, Int10>;
584impl<'a, REG> Int10W<'a, REG>
585where
586    REG: crate::Writable + crate::RegisterSpec,
587{
588    #[doc = "Disable"]
589    #[inline(always)]
590    pub fn disable(self) -> &'a mut crate::W<REG> {
591        self.variant(Int10::Disable)
592    }
593    #[doc = "Enable"]
594    #[inline(always)]
595    pub fn enable(self) -> &'a mut crate::W<REG> {
596        self.variant(Int10::Enable)
597    }
598}
599#[doc = "SmartDMA hijack NVIC IRQ37\n\nValue on reset: 0"]
600#[cfg_attr(feature = "defmt", derive(defmt::Format))]
601#[derive(Clone, Copy, Debug, PartialEq, Eq)]
602pub enum Int11 {
603    #[doc = "0: Disable"]
604    Disable = 0,
605    #[doc = "1: Enable"]
606    Enable = 1,
607}
608impl From<Int11> for bool {
609    #[inline(always)]
610    fn from(variant: Int11) -> Self {
611        variant as u8 != 0
612    }
613}
614#[doc = "Field `INT11` reader - SmartDMA hijack NVIC IRQ37"]
615pub type Int11R = crate::BitReader<Int11>;
616impl Int11R {
617    #[doc = "Get enumerated values variant"]
618    #[inline(always)]
619    pub const fn variant(&self) -> Int11 {
620        match self.bits {
621            false => Int11::Disable,
622            true => Int11::Enable,
623        }
624    }
625    #[doc = "Disable"]
626    #[inline(always)]
627    pub fn is_disable(&self) -> bool {
628        *self == Int11::Disable
629    }
630    #[doc = "Enable"]
631    #[inline(always)]
632    pub fn is_enable(&self) -> bool {
633        *self == Int11::Enable
634    }
635}
636#[doc = "Field `INT11` writer - SmartDMA hijack NVIC IRQ37"]
637pub type Int11W<'a, REG> = crate::BitWriter<'a, REG, Int11>;
638impl<'a, REG> Int11W<'a, REG>
639where
640    REG: crate::Writable + crate::RegisterSpec,
641{
642    #[doc = "Disable"]
643    #[inline(always)]
644    pub fn disable(self) -> &'a mut crate::W<REG> {
645        self.variant(Int11::Disable)
646    }
647    #[doc = "Enable"]
648    #[inline(always)]
649    pub fn enable(self) -> &'a mut crate::W<REG> {
650        self.variant(Int11::Enable)
651    }
652}
653#[doc = "SmartDMA hijack NVIC IRQ38\n\nValue on reset: 0"]
654#[cfg_attr(feature = "defmt", derive(defmt::Format))]
655#[derive(Clone, Copy, Debug, PartialEq, Eq)]
656pub enum Int12 {
657    #[doc = "0: Disable"]
658    Disable = 0,
659    #[doc = "1: Enable"]
660    Enable = 1,
661}
662impl From<Int12> for bool {
663    #[inline(always)]
664    fn from(variant: Int12) -> Self {
665        variant as u8 != 0
666    }
667}
668#[doc = "Field `INT12` reader - SmartDMA hijack NVIC IRQ38"]
669pub type Int12R = crate::BitReader<Int12>;
670impl Int12R {
671    #[doc = "Get enumerated values variant"]
672    #[inline(always)]
673    pub const fn variant(&self) -> Int12 {
674        match self.bits {
675            false => Int12::Disable,
676            true => Int12::Enable,
677        }
678    }
679    #[doc = "Disable"]
680    #[inline(always)]
681    pub fn is_disable(&self) -> bool {
682        *self == Int12::Disable
683    }
684    #[doc = "Enable"]
685    #[inline(always)]
686    pub fn is_enable(&self) -> bool {
687        *self == Int12::Enable
688    }
689}
690#[doc = "Field `INT12` writer - SmartDMA hijack NVIC IRQ38"]
691pub type Int12W<'a, REG> = crate::BitWriter<'a, REG, Int12>;
692impl<'a, REG> Int12W<'a, REG>
693where
694    REG: crate::Writable + crate::RegisterSpec,
695{
696    #[doc = "Disable"]
697    #[inline(always)]
698    pub fn disable(self) -> &'a mut crate::W<REG> {
699        self.variant(Int12::Disable)
700    }
701    #[doc = "Enable"]
702    #[inline(always)]
703    pub fn enable(self) -> &'a mut crate::W<REG> {
704        self.variant(Int12::Enable)
705    }
706}
707#[doc = "SmartDMA hijack NVIC IRQ39\n\nValue on reset: 0"]
708#[cfg_attr(feature = "defmt", derive(defmt::Format))]
709#[derive(Clone, Copy, Debug, PartialEq, Eq)]
710pub enum Int13 {
711    #[doc = "0: Disable"]
712    Disable = 0,
713    #[doc = "1: Enable"]
714    Enable = 1,
715}
716impl From<Int13> for bool {
717    #[inline(always)]
718    fn from(variant: Int13) -> Self {
719        variant as u8 != 0
720    }
721}
722#[doc = "Field `INT13` reader - SmartDMA hijack NVIC IRQ39"]
723pub type Int13R = crate::BitReader<Int13>;
724impl Int13R {
725    #[doc = "Get enumerated values variant"]
726    #[inline(always)]
727    pub const fn variant(&self) -> Int13 {
728        match self.bits {
729            false => Int13::Disable,
730            true => Int13::Enable,
731        }
732    }
733    #[doc = "Disable"]
734    #[inline(always)]
735    pub fn is_disable(&self) -> bool {
736        *self == Int13::Disable
737    }
738    #[doc = "Enable"]
739    #[inline(always)]
740    pub fn is_enable(&self) -> bool {
741        *self == Int13::Enable
742    }
743}
744#[doc = "Field `INT13` writer - SmartDMA hijack NVIC IRQ39"]
745pub type Int13W<'a, REG> = crate::BitWriter<'a, REG, Int13>;
746impl<'a, REG> Int13W<'a, REG>
747where
748    REG: crate::Writable + crate::RegisterSpec,
749{
750    #[doc = "Disable"]
751    #[inline(always)]
752    pub fn disable(self) -> &'a mut crate::W<REG> {
753        self.variant(Int13::Disable)
754    }
755    #[doc = "Enable"]
756    #[inline(always)]
757    pub fn enable(self) -> &'a mut crate::W<REG> {
758        self.variant(Int13::Enable)
759    }
760}
761#[doc = "SmartDMA hijack NVIC IRQ40\n\nValue on reset: 0"]
762#[cfg_attr(feature = "defmt", derive(defmt::Format))]
763#[derive(Clone, Copy, Debug, PartialEq, Eq)]
764pub enum Int14 {
765    #[doc = "0: Disable"]
766    Disable = 0,
767    #[doc = "1: Enable"]
768    Enable = 1,
769}
770impl From<Int14> for bool {
771    #[inline(always)]
772    fn from(variant: Int14) -> Self {
773        variant as u8 != 0
774    }
775}
776#[doc = "Field `INT14` reader - SmartDMA hijack NVIC IRQ40"]
777pub type Int14R = crate::BitReader<Int14>;
778impl Int14R {
779    #[doc = "Get enumerated values variant"]
780    #[inline(always)]
781    pub const fn variant(&self) -> Int14 {
782        match self.bits {
783            false => Int14::Disable,
784            true => Int14::Enable,
785        }
786    }
787    #[doc = "Disable"]
788    #[inline(always)]
789    pub fn is_disable(&self) -> bool {
790        *self == Int14::Disable
791    }
792    #[doc = "Enable"]
793    #[inline(always)]
794    pub fn is_enable(&self) -> bool {
795        *self == Int14::Enable
796    }
797}
798#[doc = "Field `INT14` writer - SmartDMA hijack NVIC IRQ40"]
799pub type Int14W<'a, REG> = crate::BitWriter<'a, REG, Int14>;
800impl<'a, REG> Int14W<'a, REG>
801where
802    REG: crate::Writable + crate::RegisterSpec,
803{
804    #[doc = "Disable"]
805    #[inline(always)]
806    pub fn disable(self) -> &'a mut crate::W<REG> {
807        self.variant(Int14::Disable)
808    }
809    #[doc = "Enable"]
810    #[inline(always)]
811    pub fn enable(self) -> &'a mut crate::W<REG> {
812        self.variant(Int14::Enable)
813    }
814}
815#[doc = "SmartDMA hijack NVIC IRQ41\n\nValue on reset: 0"]
816#[cfg_attr(feature = "defmt", derive(defmt::Format))]
817#[derive(Clone, Copy, Debug, PartialEq, Eq)]
818pub enum Int15 {
819    #[doc = "0: Disable"]
820    Disable = 0,
821    #[doc = "1: Enable"]
822    Enable = 1,
823}
824impl From<Int15> for bool {
825    #[inline(always)]
826    fn from(variant: Int15) -> Self {
827        variant as u8 != 0
828    }
829}
830#[doc = "Field `INT15` reader - SmartDMA hijack NVIC IRQ41"]
831pub type Int15R = crate::BitReader<Int15>;
832impl Int15R {
833    #[doc = "Get enumerated values variant"]
834    #[inline(always)]
835    pub const fn variant(&self) -> Int15 {
836        match self.bits {
837            false => Int15::Disable,
838            true => Int15::Enable,
839        }
840    }
841    #[doc = "Disable"]
842    #[inline(always)]
843    pub fn is_disable(&self) -> bool {
844        *self == Int15::Disable
845    }
846    #[doc = "Enable"]
847    #[inline(always)]
848    pub fn is_enable(&self) -> bool {
849        *self == Int15::Enable
850    }
851}
852#[doc = "Field `INT15` writer - SmartDMA hijack NVIC IRQ41"]
853pub type Int15W<'a, REG> = crate::BitWriter<'a, REG, Int15>;
854impl<'a, REG> Int15W<'a, REG>
855where
856    REG: crate::Writable + crate::RegisterSpec,
857{
858    #[doc = "Disable"]
859    #[inline(always)]
860    pub fn disable(self) -> &'a mut crate::W<REG> {
861        self.variant(Int15::Disable)
862    }
863    #[doc = "Enable"]
864    #[inline(always)]
865    pub fn enable(self) -> &'a mut crate::W<REG> {
866        self.variant(Int15::Enable)
867    }
868}
869#[doc = "SmartDMA hijack NVIC IRQ42\n\nValue on reset: 0"]
870#[cfg_attr(feature = "defmt", derive(defmt::Format))]
871#[derive(Clone, Copy, Debug, PartialEq, Eq)]
872pub enum Int16 {
873    #[doc = "0: Disable"]
874    Disable = 0,
875    #[doc = "1: Enable"]
876    Enable = 1,
877}
878impl From<Int16> for bool {
879    #[inline(always)]
880    fn from(variant: Int16) -> Self {
881        variant as u8 != 0
882    }
883}
884#[doc = "Field `INT16` reader - SmartDMA hijack NVIC IRQ42"]
885pub type Int16R = crate::BitReader<Int16>;
886impl Int16R {
887    #[doc = "Get enumerated values variant"]
888    #[inline(always)]
889    pub const fn variant(&self) -> Int16 {
890        match self.bits {
891            false => Int16::Disable,
892            true => Int16::Enable,
893        }
894    }
895    #[doc = "Disable"]
896    #[inline(always)]
897    pub fn is_disable(&self) -> bool {
898        *self == Int16::Disable
899    }
900    #[doc = "Enable"]
901    #[inline(always)]
902    pub fn is_enable(&self) -> bool {
903        *self == Int16::Enable
904    }
905}
906#[doc = "Field `INT16` writer - SmartDMA hijack NVIC IRQ42"]
907pub type Int16W<'a, REG> = crate::BitWriter<'a, REG, Int16>;
908impl<'a, REG> Int16W<'a, REG>
909where
910    REG: crate::Writable + crate::RegisterSpec,
911{
912    #[doc = "Disable"]
913    #[inline(always)]
914    pub fn disable(self) -> &'a mut crate::W<REG> {
915        self.variant(Int16::Disable)
916    }
917    #[doc = "Enable"]
918    #[inline(always)]
919    pub fn enable(self) -> &'a mut crate::W<REG> {
920        self.variant(Int16::Enable)
921    }
922}
923#[doc = "SmartDMA hijack NVIC IRQ45\n\nValue on reset: 0"]
924#[cfg_attr(feature = "defmt", derive(defmt::Format))]
925#[derive(Clone, Copy, Debug, PartialEq, Eq)]
926pub enum Int17 {
927    #[doc = "0: Disable"]
928    Disable = 0,
929    #[doc = "1: Enable"]
930    Enable = 1,
931}
932impl From<Int17> for bool {
933    #[inline(always)]
934    fn from(variant: Int17) -> Self {
935        variant as u8 != 0
936    }
937}
938#[doc = "Field `INT17` reader - SmartDMA hijack NVIC IRQ45"]
939pub type Int17R = crate::BitReader<Int17>;
940impl Int17R {
941    #[doc = "Get enumerated values variant"]
942    #[inline(always)]
943    pub const fn variant(&self) -> Int17 {
944        match self.bits {
945            false => Int17::Disable,
946            true => Int17::Enable,
947        }
948    }
949    #[doc = "Disable"]
950    #[inline(always)]
951    pub fn is_disable(&self) -> bool {
952        *self == Int17::Disable
953    }
954    #[doc = "Enable"]
955    #[inline(always)]
956    pub fn is_enable(&self) -> bool {
957        *self == Int17::Enable
958    }
959}
960#[doc = "Field `INT17` writer - SmartDMA hijack NVIC IRQ45"]
961pub type Int17W<'a, REG> = crate::BitWriter<'a, REG, Int17>;
962impl<'a, REG> Int17W<'a, REG>
963where
964    REG: crate::Writable + crate::RegisterSpec,
965{
966    #[doc = "Disable"]
967    #[inline(always)]
968    pub fn disable(self) -> &'a mut crate::W<REG> {
969        self.variant(Int17::Disable)
970    }
971    #[doc = "Enable"]
972    #[inline(always)]
973    pub fn enable(self) -> &'a mut crate::W<REG> {
974        self.variant(Int17::Enable)
975    }
976}
977#[doc = "SmartDMA hijack NVIC IRQ47\n\nValue on reset: 0"]
978#[cfg_attr(feature = "defmt", derive(defmt::Format))]
979#[derive(Clone, Copy, Debug, PartialEq, Eq)]
980pub enum Int18 {
981    #[doc = "0: Disable"]
982    Disable = 0,
983    #[doc = "1: Enable"]
984    Enable = 1,
985}
986impl From<Int18> for bool {
987    #[inline(always)]
988    fn from(variant: Int18) -> Self {
989        variant as u8 != 0
990    }
991}
992#[doc = "Field `INT18` reader - SmartDMA hijack NVIC IRQ47"]
993pub type Int18R = crate::BitReader<Int18>;
994impl Int18R {
995    #[doc = "Get enumerated values variant"]
996    #[inline(always)]
997    pub const fn variant(&self) -> Int18 {
998        match self.bits {
999            false => Int18::Disable,
1000            true => Int18::Enable,
1001        }
1002    }
1003    #[doc = "Disable"]
1004    #[inline(always)]
1005    pub fn is_disable(&self) -> bool {
1006        *self == Int18::Disable
1007    }
1008    #[doc = "Enable"]
1009    #[inline(always)]
1010    pub fn is_enable(&self) -> bool {
1011        *self == Int18::Enable
1012    }
1013}
1014#[doc = "Field `INT18` writer - SmartDMA hijack NVIC IRQ47"]
1015pub type Int18W<'a, REG> = crate::BitWriter<'a, REG, Int18>;
1016impl<'a, REG> Int18W<'a, REG>
1017where
1018    REG: crate::Writable + crate::RegisterSpec,
1019{
1020    #[doc = "Disable"]
1021    #[inline(always)]
1022    pub fn disable(self) -> &'a mut crate::W<REG> {
1023        self.variant(Int18::Disable)
1024    }
1025    #[doc = "Enable"]
1026    #[inline(always)]
1027    pub fn enable(self) -> &'a mut crate::W<REG> {
1028        self.variant(Int18::Enable)
1029    }
1030}
1031#[doc = "SmartDMA hijack NVIC IRQ50\n\nValue on reset: 0"]
1032#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1033#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1034pub enum Int19 {
1035    #[doc = "0: Disable"]
1036    Disable = 0,
1037    #[doc = "1: Enable"]
1038    Enable = 1,
1039}
1040impl From<Int19> for bool {
1041    #[inline(always)]
1042    fn from(variant: Int19) -> Self {
1043        variant as u8 != 0
1044    }
1045}
1046#[doc = "Field `INT19` reader - SmartDMA hijack NVIC IRQ50"]
1047pub type Int19R = crate::BitReader<Int19>;
1048impl Int19R {
1049    #[doc = "Get enumerated values variant"]
1050    #[inline(always)]
1051    pub const fn variant(&self) -> Int19 {
1052        match self.bits {
1053            false => Int19::Disable,
1054            true => Int19::Enable,
1055        }
1056    }
1057    #[doc = "Disable"]
1058    #[inline(always)]
1059    pub fn is_disable(&self) -> bool {
1060        *self == Int19::Disable
1061    }
1062    #[doc = "Enable"]
1063    #[inline(always)]
1064    pub fn is_enable(&self) -> bool {
1065        *self == Int19::Enable
1066    }
1067}
1068#[doc = "Field `INT19` writer - SmartDMA hijack NVIC IRQ50"]
1069pub type Int19W<'a, REG> = crate::BitWriter<'a, REG, Int19>;
1070impl<'a, REG> Int19W<'a, REG>
1071where
1072    REG: crate::Writable + crate::RegisterSpec,
1073{
1074    #[doc = "Disable"]
1075    #[inline(always)]
1076    pub fn disable(self) -> &'a mut crate::W<REG> {
1077        self.variant(Int19::Disable)
1078    }
1079    #[doc = "Enable"]
1080    #[inline(always)]
1081    pub fn enable(self) -> &'a mut crate::W<REG> {
1082        self.variant(Int19::Enable)
1083    }
1084}
1085#[doc = "SmartDMA hijack NVIC IRQ51\n\nValue on reset: 0"]
1086#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1087#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1088pub enum Int20 {
1089    #[doc = "0: Disable"]
1090    Disable = 0,
1091    #[doc = "1: Enable"]
1092    Enable = 1,
1093}
1094impl From<Int20> for bool {
1095    #[inline(always)]
1096    fn from(variant: Int20) -> Self {
1097        variant as u8 != 0
1098    }
1099}
1100#[doc = "Field `INT20` reader - SmartDMA hijack NVIC IRQ51"]
1101pub type Int20R = crate::BitReader<Int20>;
1102impl Int20R {
1103    #[doc = "Get enumerated values variant"]
1104    #[inline(always)]
1105    pub const fn variant(&self) -> Int20 {
1106        match self.bits {
1107            false => Int20::Disable,
1108            true => Int20::Enable,
1109        }
1110    }
1111    #[doc = "Disable"]
1112    #[inline(always)]
1113    pub fn is_disable(&self) -> bool {
1114        *self == Int20::Disable
1115    }
1116    #[doc = "Enable"]
1117    #[inline(always)]
1118    pub fn is_enable(&self) -> bool {
1119        *self == Int20::Enable
1120    }
1121}
1122#[doc = "Field `INT20` writer - SmartDMA hijack NVIC IRQ51"]
1123pub type Int20W<'a, REG> = crate::BitWriter<'a, REG, Int20>;
1124impl<'a, REG> Int20W<'a, REG>
1125where
1126    REG: crate::Writable + crate::RegisterSpec,
1127{
1128    #[doc = "Disable"]
1129    #[inline(always)]
1130    pub fn disable(self) -> &'a mut crate::W<REG> {
1131        self.variant(Int20::Disable)
1132    }
1133    #[doc = "Enable"]
1134    #[inline(always)]
1135    pub fn enable(self) -> &'a mut crate::W<REG> {
1136        self.variant(Int20::Enable)
1137    }
1138}
1139#[doc = "SmartDMA hijack NVIC IRQ66\n\nValue on reset: 0"]
1140#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1141#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1142pub enum Int21 {
1143    #[doc = "0: Disable"]
1144    Disable = 0,
1145    #[doc = "1: Enable"]
1146    Enable = 1,
1147}
1148impl From<Int21> for bool {
1149    #[inline(always)]
1150    fn from(variant: Int21) -> Self {
1151        variant as u8 != 0
1152    }
1153}
1154#[doc = "Field `INT21` reader - SmartDMA hijack NVIC IRQ66"]
1155pub type Int21R = crate::BitReader<Int21>;
1156impl Int21R {
1157    #[doc = "Get enumerated values variant"]
1158    #[inline(always)]
1159    pub const fn variant(&self) -> Int21 {
1160        match self.bits {
1161            false => Int21::Disable,
1162            true => Int21::Enable,
1163        }
1164    }
1165    #[doc = "Disable"]
1166    #[inline(always)]
1167    pub fn is_disable(&self) -> bool {
1168        *self == Int21::Disable
1169    }
1170    #[doc = "Enable"]
1171    #[inline(always)]
1172    pub fn is_enable(&self) -> bool {
1173        *self == Int21::Enable
1174    }
1175}
1176#[doc = "Field `INT21` writer - SmartDMA hijack NVIC IRQ66"]
1177pub type Int21W<'a, REG> = crate::BitWriter<'a, REG, Int21>;
1178impl<'a, REG> Int21W<'a, REG>
1179where
1180    REG: crate::Writable + crate::RegisterSpec,
1181{
1182    #[doc = "Disable"]
1183    #[inline(always)]
1184    pub fn disable(self) -> &'a mut crate::W<REG> {
1185        self.variant(Int21::Disable)
1186    }
1187    #[doc = "Enable"]
1188    #[inline(always)]
1189    pub fn enable(self) -> &'a mut crate::W<REG> {
1190        self.variant(Int21::Enable)
1191    }
1192}
1193#[doc = "SmartDMA hijack NVIC IRQ67\n\nValue on reset: 0"]
1194#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1195#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1196pub enum Int22 {
1197    #[doc = "0: Disable"]
1198    Disable = 0,
1199    #[doc = "1: Enable"]
1200    Enable = 1,
1201}
1202impl From<Int22> for bool {
1203    #[inline(always)]
1204    fn from(variant: Int22) -> Self {
1205        variant as u8 != 0
1206    }
1207}
1208#[doc = "Field `INT22` reader - SmartDMA hijack NVIC IRQ67"]
1209pub type Int22R = crate::BitReader<Int22>;
1210impl Int22R {
1211    #[doc = "Get enumerated values variant"]
1212    #[inline(always)]
1213    pub const fn variant(&self) -> Int22 {
1214        match self.bits {
1215            false => Int22::Disable,
1216            true => Int22::Enable,
1217        }
1218    }
1219    #[doc = "Disable"]
1220    #[inline(always)]
1221    pub fn is_disable(&self) -> bool {
1222        *self == Int22::Disable
1223    }
1224    #[doc = "Enable"]
1225    #[inline(always)]
1226    pub fn is_enable(&self) -> bool {
1227        *self == Int22::Enable
1228    }
1229}
1230#[doc = "Field `INT22` writer - SmartDMA hijack NVIC IRQ67"]
1231pub type Int22W<'a, REG> = crate::BitWriter<'a, REG, Int22>;
1232impl<'a, REG> Int22W<'a, REG>
1233where
1234    REG: crate::Writable + crate::RegisterSpec,
1235{
1236    #[doc = "Disable"]
1237    #[inline(always)]
1238    pub fn disable(self) -> &'a mut crate::W<REG> {
1239        self.variant(Int22::Disable)
1240    }
1241    #[doc = "Enable"]
1242    #[inline(always)]
1243    pub fn enable(self) -> &'a mut crate::W<REG> {
1244        self.variant(Int22::Enable)
1245    }
1246}
1247#[doc = "SmartDMA hijack NVIC IRQ77\n\nValue on reset: 0"]
1248#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1249#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1250pub enum Int23 {
1251    #[doc = "0: Disable"]
1252    Disable = 0,
1253    #[doc = "1: Enable"]
1254    Enable = 1,
1255}
1256impl From<Int23> for bool {
1257    #[inline(always)]
1258    fn from(variant: Int23) -> Self {
1259        variant as u8 != 0
1260    }
1261}
1262#[doc = "Field `INT23` reader - SmartDMA hijack NVIC IRQ77"]
1263pub type Int23R = crate::BitReader<Int23>;
1264impl Int23R {
1265    #[doc = "Get enumerated values variant"]
1266    #[inline(always)]
1267    pub const fn variant(&self) -> Int23 {
1268        match self.bits {
1269            false => Int23::Disable,
1270            true => Int23::Enable,
1271        }
1272    }
1273    #[doc = "Disable"]
1274    #[inline(always)]
1275    pub fn is_disable(&self) -> bool {
1276        *self == Int23::Disable
1277    }
1278    #[doc = "Enable"]
1279    #[inline(always)]
1280    pub fn is_enable(&self) -> bool {
1281        *self == Int23::Enable
1282    }
1283}
1284#[doc = "Field `INT23` writer - SmartDMA hijack NVIC IRQ77"]
1285pub type Int23W<'a, REG> = crate::BitWriter<'a, REG, Int23>;
1286impl<'a, REG> Int23W<'a, REG>
1287where
1288    REG: crate::Writable + crate::RegisterSpec,
1289{
1290    #[doc = "Disable"]
1291    #[inline(always)]
1292    pub fn disable(self) -> &'a mut crate::W<REG> {
1293        self.variant(Int23::Disable)
1294    }
1295    #[doc = "Enable"]
1296    #[inline(always)]
1297    pub fn enable(self) -> &'a mut crate::W<REG> {
1298        self.variant(Int23::Enable)
1299    }
1300}
1301impl R {
1302    #[doc = "Bit 0 - SmartDMA hijack NVIC IRQ1"]
1303    #[inline(always)]
1304    pub fn int0(&self) -> Int0R {
1305        Int0R::new((self.bits & 1) != 0)
1306    }
1307    #[doc = "Bit 1 - SmartDMA hijack NVIC IRQ17"]
1308    #[inline(always)]
1309    pub fn int1(&self) -> Int1R {
1310        Int1R::new(((self.bits >> 1) & 1) != 0)
1311    }
1312    #[doc = "Bit 2 - SmartDMA hijack NVIC IRQ18"]
1313    #[inline(always)]
1314    pub fn int2(&self) -> Int2R {
1315        Int2R::new(((self.bits >> 2) & 1) != 0)
1316    }
1317    #[doc = "Bit 3 - SmartDMA hijack NVIC IRQ29"]
1318    #[inline(always)]
1319    pub fn int3(&self) -> Int3R {
1320        Int3R::new(((self.bits >> 3) & 1) != 0)
1321    }
1322    #[doc = "Bit 4 - SmartDMA hijack NVIC IRQ30"]
1323    #[inline(always)]
1324    pub fn int4(&self) -> Int4R {
1325        Int4R::new(((self.bits >> 4) & 1) != 0)
1326    }
1327    #[doc = "Bit 5 - SmartDMA hijack NVIC IRQ31"]
1328    #[inline(always)]
1329    pub fn int5(&self) -> Int5R {
1330        Int5R::new(((self.bits >> 5) & 1) != 0)
1331    }
1332    #[doc = "Bit 6 - SmartDMA hijack NVIC IRQ32"]
1333    #[inline(always)]
1334    pub fn int6(&self) -> Int6R {
1335        Int6R::new(((self.bits >> 6) & 1) != 0)
1336    }
1337    #[doc = "Bit 7 - SmartDMA hijack NVIC IRQ33"]
1338    #[inline(always)]
1339    pub fn int7(&self) -> Int7R {
1340        Int7R::new(((self.bits >> 7) & 1) != 0)
1341    }
1342    #[doc = "Bit 8 - SmartDMA hijack NVIC IRQ34"]
1343    #[inline(always)]
1344    pub fn int8(&self) -> Int8R {
1345        Int8R::new(((self.bits >> 8) & 1) != 0)
1346    }
1347    #[doc = "Bit 9 - SmartDMA hijack NVIC IRQ35"]
1348    #[inline(always)]
1349    pub fn int9(&self) -> Int9R {
1350        Int9R::new(((self.bits >> 9) & 1) != 0)
1351    }
1352    #[doc = "Bit 10 - SmartDMA hijack NVIC IRQ36"]
1353    #[inline(always)]
1354    pub fn int10(&self) -> Int10R {
1355        Int10R::new(((self.bits >> 10) & 1) != 0)
1356    }
1357    #[doc = "Bit 11 - SmartDMA hijack NVIC IRQ37"]
1358    #[inline(always)]
1359    pub fn int11(&self) -> Int11R {
1360        Int11R::new(((self.bits >> 11) & 1) != 0)
1361    }
1362    #[doc = "Bit 12 - SmartDMA hijack NVIC IRQ38"]
1363    #[inline(always)]
1364    pub fn int12(&self) -> Int12R {
1365        Int12R::new(((self.bits >> 12) & 1) != 0)
1366    }
1367    #[doc = "Bit 13 - SmartDMA hijack NVIC IRQ39"]
1368    #[inline(always)]
1369    pub fn int13(&self) -> Int13R {
1370        Int13R::new(((self.bits >> 13) & 1) != 0)
1371    }
1372    #[doc = "Bit 14 - SmartDMA hijack NVIC IRQ40"]
1373    #[inline(always)]
1374    pub fn int14(&self) -> Int14R {
1375        Int14R::new(((self.bits >> 14) & 1) != 0)
1376    }
1377    #[doc = "Bit 15 - SmartDMA hijack NVIC IRQ41"]
1378    #[inline(always)]
1379    pub fn int15(&self) -> Int15R {
1380        Int15R::new(((self.bits >> 15) & 1) != 0)
1381    }
1382    #[doc = "Bit 16 - SmartDMA hijack NVIC IRQ42"]
1383    #[inline(always)]
1384    pub fn int16(&self) -> Int16R {
1385        Int16R::new(((self.bits >> 16) & 1) != 0)
1386    }
1387    #[doc = "Bit 17 - SmartDMA hijack NVIC IRQ45"]
1388    #[inline(always)]
1389    pub fn int17(&self) -> Int17R {
1390        Int17R::new(((self.bits >> 17) & 1) != 0)
1391    }
1392    #[doc = "Bit 18 - SmartDMA hijack NVIC IRQ47"]
1393    #[inline(always)]
1394    pub fn int18(&self) -> Int18R {
1395        Int18R::new(((self.bits >> 18) & 1) != 0)
1396    }
1397    #[doc = "Bit 19 - SmartDMA hijack NVIC IRQ50"]
1398    #[inline(always)]
1399    pub fn int19(&self) -> Int19R {
1400        Int19R::new(((self.bits >> 19) & 1) != 0)
1401    }
1402    #[doc = "Bit 20 - SmartDMA hijack NVIC IRQ51"]
1403    #[inline(always)]
1404    pub fn int20(&self) -> Int20R {
1405        Int20R::new(((self.bits >> 20) & 1) != 0)
1406    }
1407    #[doc = "Bit 21 - SmartDMA hijack NVIC IRQ66"]
1408    #[inline(always)]
1409    pub fn int21(&self) -> Int21R {
1410        Int21R::new(((self.bits >> 21) & 1) != 0)
1411    }
1412    #[doc = "Bit 22 - SmartDMA hijack NVIC IRQ67"]
1413    #[inline(always)]
1414    pub fn int22(&self) -> Int22R {
1415        Int22R::new(((self.bits >> 22) & 1) != 0)
1416    }
1417    #[doc = "Bit 23 - SmartDMA hijack NVIC IRQ77"]
1418    #[inline(always)]
1419    pub fn int23(&self) -> Int23R {
1420        Int23R::new(((self.bits >> 23) & 1) != 0)
1421    }
1422}
1423#[cfg(feature = "debug")]
1424impl core::fmt::Debug for R {
1425    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1426        f.debug_struct("SmartDMAINT")
1427            .field("int0", &self.int0())
1428            .field("int1", &self.int1())
1429            .field("int2", &self.int2())
1430            .field("int3", &self.int3())
1431            .field("int4", &self.int4())
1432            .field("int5", &self.int5())
1433            .field("int6", &self.int6())
1434            .field("int7", &self.int7())
1435            .field("int8", &self.int8())
1436            .field("int9", &self.int9())
1437            .field("int10", &self.int10())
1438            .field("int11", &self.int11())
1439            .field("int12", &self.int12())
1440            .field("int13", &self.int13())
1441            .field("int14", &self.int14())
1442            .field("int15", &self.int15())
1443            .field("int16", &self.int16())
1444            .field("int17", &self.int17())
1445            .field("int18", &self.int18())
1446            .field("int19", &self.int19())
1447            .field("int20", &self.int20())
1448            .field("int21", &self.int21())
1449            .field("int22", &self.int22())
1450            .field("int23", &self.int23())
1451            .finish()
1452    }
1453}
1454impl W {
1455    #[doc = "Bit 0 - SmartDMA hijack NVIC IRQ1"]
1456    #[inline(always)]
1457    pub fn int0(&mut self) -> Int0W<'_, SmartDmaintSpec> {
1458        Int0W::new(self, 0)
1459    }
1460    #[doc = "Bit 1 - SmartDMA hijack NVIC IRQ17"]
1461    #[inline(always)]
1462    pub fn int1(&mut self) -> Int1W<'_, SmartDmaintSpec> {
1463        Int1W::new(self, 1)
1464    }
1465    #[doc = "Bit 2 - SmartDMA hijack NVIC IRQ18"]
1466    #[inline(always)]
1467    pub fn int2(&mut self) -> Int2W<'_, SmartDmaintSpec> {
1468        Int2W::new(self, 2)
1469    }
1470    #[doc = "Bit 3 - SmartDMA hijack NVIC IRQ29"]
1471    #[inline(always)]
1472    pub fn int3(&mut self) -> Int3W<'_, SmartDmaintSpec> {
1473        Int3W::new(self, 3)
1474    }
1475    #[doc = "Bit 4 - SmartDMA hijack NVIC IRQ30"]
1476    #[inline(always)]
1477    pub fn int4(&mut self) -> Int4W<'_, SmartDmaintSpec> {
1478        Int4W::new(self, 4)
1479    }
1480    #[doc = "Bit 5 - SmartDMA hijack NVIC IRQ31"]
1481    #[inline(always)]
1482    pub fn int5(&mut self) -> Int5W<'_, SmartDmaintSpec> {
1483        Int5W::new(self, 5)
1484    }
1485    #[doc = "Bit 6 - SmartDMA hijack NVIC IRQ32"]
1486    #[inline(always)]
1487    pub fn int6(&mut self) -> Int6W<'_, SmartDmaintSpec> {
1488        Int6W::new(self, 6)
1489    }
1490    #[doc = "Bit 7 - SmartDMA hijack NVIC IRQ33"]
1491    #[inline(always)]
1492    pub fn int7(&mut self) -> Int7W<'_, SmartDmaintSpec> {
1493        Int7W::new(self, 7)
1494    }
1495    #[doc = "Bit 8 - SmartDMA hijack NVIC IRQ34"]
1496    #[inline(always)]
1497    pub fn int8(&mut self) -> Int8W<'_, SmartDmaintSpec> {
1498        Int8W::new(self, 8)
1499    }
1500    #[doc = "Bit 9 - SmartDMA hijack NVIC IRQ35"]
1501    #[inline(always)]
1502    pub fn int9(&mut self) -> Int9W<'_, SmartDmaintSpec> {
1503        Int9W::new(self, 9)
1504    }
1505    #[doc = "Bit 10 - SmartDMA hijack NVIC IRQ36"]
1506    #[inline(always)]
1507    pub fn int10(&mut self) -> Int10W<'_, SmartDmaintSpec> {
1508        Int10W::new(self, 10)
1509    }
1510    #[doc = "Bit 11 - SmartDMA hijack NVIC IRQ37"]
1511    #[inline(always)]
1512    pub fn int11(&mut self) -> Int11W<'_, SmartDmaintSpec> {
1513        Int11W::new(self, 11)
1514    }
1515    #[doc = "Bit 12 - SmartDMA hijack NVIC IRQ38"]
1516    #[inline(always)]
1517    pub fn int12(&mut self) -> Int12W<'_, SmartDmaintSpec> {
1518        Int12W::new(self, 12)
1519    }
1520    #[doc = "Bit 13 - SmartDMA hijack NVIC IRQ39"]
1521    #[inline(always)]
1522    pub fn int13(&mut self) -> Int13W<'_, SmartDmaintSpec> {
1523        Int13W::new(self, 13)
1524    }
1525    #[doc = "Bit 14 - SmartDMA hijack NVIC IRQ40"]
1526    #[inline(always)]
1527    pub fn int14(&mut self) -> Int14W<'_, SmartDmaintSpec> {
1528        Int14W::new(self, 14)
1529    }
1530    #[doc = "Bit 15 - SmartDMA hijack NVIC IRQ41"]
1531    #[inline(always)]
1532    pub fn int15(&mut self) -> Int15W<'_, SmartDmaintSpec> {
1533        Int15W::new(self, 15)
1534    }
1535    #[doc = "Bit 16 - SmartDMA hijack NVIC IRQ42"]
1536    #[inline(always)]
1537    pub fn int16(&mut self) -> Int16W<'_, SmartDmaintSpec> {
1538        Int16W::new(self, 16)
1539    }
1540    #[doc = "Bit 17 - SmartDMA hijack NVIC IRQ45"]
1541    #[inline(always)]
1542    pub fn int17(&mut self) -> Int17W<'_, SmartDmaintSpec> {
1543        Int17W::new(self, 17)
1544    }
1545    #[doc = "Bit 18 - SmartDMA hijack NVIC IRQ47"]
1546    #[inline(always)]
1547    pub fn int18(&mut self) -> Int18W<'_, SmartDmaintSpec> {
1548        Int18W::new(self, 18)
1549    }
1550    #[doc = "Bit 19 - SmartDMA hijack NVIC IRQ50"]
1551    #[inline(always)]
1552    pub fn int19(&mut self) -> Int19W<'_, SmartDmaintSpec> {
1553        Int19W::new(self, 19)
1554    }
1555    #[doc = "Bit 20 - SmartDMA hijack NVIC IRQ51"]
1556    #[inline(always)]
1557    pub fn int20(&mut self) -> Int20W<'_, SmartDmaintSpec> {
1558        Int20W::new(self, 20)
1559    }
1560    #[doc = "Bit 21 - SmartDMA hijack NVIC IRQ66"]
1561    #[inline(always)]
1562    pub fn int21(&mut self) -> Int21W<'_, SmartDmaintSpec> {
1563        Int21W::new(self, 21)
1564    }
1565    #[doc = "Bit 22 - SmartDMA hijack NVIC IRQ67"]
1566    #[inline(always)]
1567    pub fn int22(&mut self) -> Int22W<'_, SmartDmaintSpec> {
1568        Int22W::new(self, 22)
1569    }
1570    #[doc = "Bit 23 - SmartDMA hijack NVIC IRQ77"]
1571    #[inline(always)]
1572    pub fn int23(&mut self) -> Int23W<'_, SmartDmaintSpec> {
1573        Int23W::new(self, 23)
1574    }
1575}
1576#[doc = "SmartDMA Interrupt Hijack\n\nYou can [`read`](crate::Reg::read) this register and get [`smart_dmaint::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`smart_dmaint::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1577pub struct SmartDmaintSpec;
1578impl crate::RegisterSpec for SmartDmaintSpec {
1579    type Ux = u32;
1580}
1581#[doc = "`read()` method returns [`smart_dmaint::R`](R) reader structure"]
1582impl crate::Readable for SmartDmaintSpec {}
1583#[doc = "`write(|w| ..)` method takes [`smart_dmaint::W`](W) writer structure"]
1584impl crate::Writable for SmartDmaintSpec {
1585    type Safety = crate::Unsafe;
1586}
1587#[doc = "`reset()` method sets SmartDMAINT to value 0"]
1588impl crate::Resettable for SmartDmaintSpec {}
mcxa_pac/syscon/smart_dmaint.rs

mcxa_pac/syscon/
smart_dmaint.rs
