mcxa_pac/syscon/
debug_lock_en.rs1#[doc = "Register `DEBUG_LOCK_EN` reader"]
2pub type R = crate::R<DebugLockEnSpec>;
3#[doc = "Register `DEBUG_LOCK_EN` writer"]
4pub type W = crate::W<DebugLockEnSpec>;
5#[doc = "Controls write access to the security registers\n\nValue on reset: 10"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum LockAll {
10 #[doc = "0: Any other value than b1010: disables write access to all registers"]
11 Disable = 0,
12 #[doc = "10: Enables write access to all registers"]
13 Enable = 10,
14}
15impl From<LockAll> for u8 {
16 #[inline(always)]
17 fn from(variant: LockAll) -> Self {
18 variant as _
19 }
20}
21impl crate::FieldSpec for LockAll {
22 type Ux = u8;
23}
24impl crate::IsEnum for LockAll {}
25#[doc = "Field `LOCK_ALL` reader - Controls write access to the security registers"]
26pub type LockAllR = crate::FieldReader<LockAll>;
27impl LockAllR {
28 #[doc = "Get enumerated values variant"]
29 #[inline(always)]
30 pub const fn variant(&self) -> Option<LockAll> {
31 match self.bits {
32 0 => Some(LockAll::Disable),
33 10 => Some(LockAll::Enable),
34 _ => None,
35 }
36 }
37 #[doc = "Any other value than b1010: disables write access to all registers"]
38 #[inline(always)]
39 pub fn is_disable(&self) -> bool {
40 *self == LockAll::Disable
41 }
42 #[doc = "Enables write access to all registers"]
43 #[inline(always)]
44 pub fn is_enable(&self) -> bool {
45 *self == LockAll::Enable
46 }
47}
48#[doc = "Field `LOCK_ALL` writer - Controls write access to the security registers"]
49pub type LockAllW<'a, REG> = crate::FieldWriter<'a, REG, 4, LockAll>;
50impl<'a, REG> LockAllW<'a, REG>
51where
52 REG: crate::Writable + crate::RegisterSpec,
53 REG::Ux: From<u8>,
54{
55 #[doc = "Any other value than b1010: disables write access to all registers"]
56 #[inline(always)]
57 pub fn disable(self) -> &'a mut crate::W<REG> {
58 self.variant(LockAll::Disable)
59 }
60 #[doc = "Enables write access to all registers"]
61 #[inline(always)]
62 pub fn enable(self) -> &'a mut crate::W<REG> {
63 self.variant(LockAll::Enable)
64 }
65}
66impl R {
67 #[doc = "Bits 0:3 - Controls write access to the security registers"]
68 #[inline(always)]
69 pub fn lock_all(&self) -> LockAllR {
70 LockAllR::new((self.bits & 0x0f) as u8)
71 }
72}
73#[cfg(feature = "debug")]
74impl core::fmt::Debug for R {
75 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
76 f.debug_struct("DEBUG_LOCK_EN")
77 .field("lock_all", &self.lock_all())
78 .finish()
79 }
80}
81impl W {
82 #[doc = "Bits 0:3 - Controls write access to the security registers"]
83 #[inline(always)]
84 pub fn lock_all(&mut self) -> LockAllW<'_, DebugLockEnSpec> {
85 LockAllW::new(self, 0)
86 }
87}
88#[doc = "Control Write Access to Security\n\nYou can [`read`](crate::Reg::read) this register and get [`debug_lock_en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`debug_lock_en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
89pub struct DebugLockEnSpec;
90impl crate::RegisterSpec for DebugLockEnSpec {
91 type Ux = u32;
92}
93#[doc = "`read()` method returns [`debug_lock_en::R`](R) reader structure"]
94impl crate::Readable for DebugLockEnSpec {}
95#[doc = "`write(|w| ..)` method takes [`debug_lock_en::W`](W) writer structure"]
96impl crate::Writable for DebugLockEnSpec {
97 type Safety = crate::Unsafe;
98}
99#[doc = "`reset()` method sets DEBUG_LOCK_EN to value 0x0a"]
100impl crate::Resettable for DebugLockEnSpec {
101 const RESET_VALUE: u32 = 0x0a;
102}