mcxa_pac/spc0/
active_vdelay.rs1#[doc = "Register `ACTIVE_VDELAY` reader"]
2pub type R = crate::R<ActiveVdelaySpec>;
3#[doc = "Register `ACTIVE_VDELAY` writer"]
4pub type W = crate::W<ActiveVdelaySpec>;
5#[doc = "Field `ACTIVE_VDELAY` reader - Active Voltage Delay"]
6pub type ActiveVdelayR = crate::FieldReader<u16>;
7#[doc = "Field `ACTIVE_VDELAY` writer - Active Voltage Delay"]
8pub type ActiveVdelayW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9impl R {
10 #[doc = "Bits 0:15 - Active Voltage Delay"]
11 #[inline(always)]
12 pub fn active_vdelay(&self) -> ActiveVdelayR {
13 ActiveVdelayR::new((self.bits & 0xffff) as u16)
14 }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19 f.debug_struct("ACTIVE_VDELAY")
20 .field("active_vdelay", &self.active_vdelay())
21 .finish()
22 }
23}
24impl W {
25 #[doc = "Bits 0:15 - Active Voltage Delay"]
26 #[inline(always)]
27 pub fn active_vdelay(&mut self) -> ActiveVdelayW<'_, ActiveVdelaySpec> {
28 ActiveVdelayW::new(self, 0)
29 }
30}
31#[doc = "Active Voltage Trim Delay\n\nYou can [`read`](crate::Reg::read) this register and get [`active_vdelay::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`active_vdelay::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct ActiveVdelaySpec;
33impl crate::RegisterSpec for ActiveVdelaySpec {
34 type Ux = u32;
35}
36#[doc = "`read()` method returns [`active_vdelay::R`](R) reader structure"]
37impl crate::Readable for ActiveVdelaySpec {}
38#[doc = "`write(|w| ..)` method takes [`active_vdelay::W`](W) writer structure"]
39impl crate::Writable for ActiveVdelaySpec {
40 type Safety = crate::Unsafe;
41}
42#[doc = "`reset()` method sets ACTIVE_VDELAY to value 0xc8"]
43impl crate::Resettable for ActiveVdelaySpec {
44 const RESET_VALUE: u32 = 0xc8;
45}