mcxa_pac/spc0/
active_cfg1.rs

1#[doc = "Register `ACTIVE_CFG1` reader"]
2pub type R = crate::R<ActiveCfg1Spec>;
3#[doc = "Register `ACTIVE_CFG1` writer"]
4pub type W = crate::W<ActiveCfg1Spec>;
5#[doc = "Field `SOC_CNTRL` reader - Active Config Chip Control"]
6pub type SocCntrlR = crate::FieldReader<u32>;
7#[doc = "Field `SOC_CNTRL` writer - Active Config Chip Control"]
8pub type SocCntrlW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    #[doc = "Bits 0:31 - Active Config Chip Control"]
11    #[inline(always)]
12    pub fn soc_cntrl(&self) -> SocCntrlR {
13        SocCntrlR::new(self.bits)
14    }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("ACTIVE_CFG1")
20            .field("soc_cntrl", &self.soc_cntrl())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bits 0:31 - Active Config Chip Control"]
26    #[inline(always)]
27    pub fn soc_cntrl(&mut self) -> SocCntrlW<'_, ActiveCfg1Spec> {
28        SocCntrlW::new(self, 0)
29    }
30}
31#[doc = "Active Power Mode Configuration 1\n\nYou can [`read`](crate::Reg::read) this register and get [`active_cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`active_cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct ActiveCfg1Spec;
33impl crate::RegisterSpec for ActiveCfg1Spec {
34    type Ux = u32;
35}
36#[doc = "`read()` method returns [`active_cfg1::R`](R) reader structure"]
37impl crate::Readable for ActiveCfg1Spec {}
38#[doc = "`write(|w| ..)` method takes [`active_cfg1::W`](W) writer structure"]
39impl crate::Writable for ActiveCfg1Spec {
40    type Safety = crate::Unsafe;
41}
42#[doc = "`reset()` method sets ACTIVE_CFG1 to value 0x02"]
43impl crate::Resettable for ActiveCfg1Spec {
44    const RESET_VALUE: u32 = 0x02;
45}
mcxa_pac/spc0/active_cfg1.rs

mcxa_pac/spc0/
active_cfg1.rs
