mcxa_pac/scg0/
spllsscg0.rs

1#[doc = "Register `SPLLSSCG0` reader"]
2pub type R = crate::R<Spllsscg0Spec>;
3#[doc = "Register `SPLLSSCG0` writer"]
4pub type W = crate::W<Spllsscg0Spec>;
5#[doc = "Field `SS_MDIV_LSB` reader - SS_MDIV\\[31:0\\]"]
6pub type SsMdivLsbR = crate::FieldReader<u32>;
7#[doc = "Field `SS_MDIV_LSB` writer - SS_MDIV\\[31:0\\]"]
8pub type SsMdivLsbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    #[doc = "Bits 0:31 - SS_MDIV\\[31:0\\]"]
11    #[inline(always)]
12    pub fn ss_mdiv_lsb(&self) -> SsMdivLsbR {
13        SsMdivLsbR::new(self.bits)
14    }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("SPLLSSCG0")
20            .field("ss_mdiv_lsb", &self.ss_mdiv_lsb())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bits 0:31 - SS_MDIV\\[31:0\\]"]
26    #[inline(always)]
27    pub fn ss_mdiv_lsb(&mut self) -> SsMdivLsbW<'_, Spllsscg0Spec> {
28        SsMdivLsbW::new(self, 0)
29    }
30}
31#[doc = "SPLL Spread Spectrum Control 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllsscg0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spllsscg0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct Spllsscg0Spec;
33impl crate::RegisterSpec for Spllsscg0Spec {
34    type Ux = u32;
35}
36#[doc = "`read()` method returns [`spllsscg0::R`](R) reader structure"]
37impl crate::Readable for Spllsscg0Spec {}
38#[doc = "`write(|w| ..)` method takes [`spllsscg0::W`](W) writer structure"]
39impl crate::Writable for Spllsscg0Spec {
40    type Safety = crate::Unsafe;
41}
42#[doc = "`reset()` method sets SPLLSSCG0 to value 0"]
43impl crate::Resettable for Spllsscg0Spec {}
mcxa_pac/scg0/spllsscg0.rs

mcxa_pac/scg0/
spllsscg0.rs
