mcxa_pac/lpspi0/
cfgr0.rs

1#[doc = "Register `CFGR0` reader"]
2pub type R = crate::R<Cfgr0Spec>;
3#[doc = "Register `CFGR0` writer"]
4pub type W = crate::W<Cfgr0Spec>;
5#[doc = "Host Request Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Hren {
9    #[doc = "0: Disable"]
10    Disable = 0,
11    #[doc = "1: Enable"]
12    Enable = 1,
13}
14impl From<Hren> for bool {
15    #[inline(always)]
16    fn from(variant: Hren) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `HREN` reader - Host Request Enable"]
21pub type HrenR = crate::BitReader<Hren>;
22impl HrenR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Hren {
26        match self.bits {
27            false => Hren::Disable,
28            true => Hren::Enable,
29        }
30    }
31    #[doc = "Disable"]
32    #[inline(always)]
33    pub fn is_disable(&self) -> bool {
34        *self == Hren::Disable
35    }
36    #[doc = "Enable"]
37    #[inline(always)]
38    pub fn is_enable(&self) -> bool {
39        *self == Hren::Enable
40    }
41}
42#[doc = "Field `HREN` writer - Host Request Enable"]
43pub type HrenW<'a, REG> = crate::BitWriter<'a, REG, Hren>;
44impl<'a, REG> HrenW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disable"]
49    #[inline(always)]
50    pub fn disable(self) -> &'a mut crate::W<REG> {
51        self.variant(Hren::Disable)
52    }
53    #[doc = "Enable"]
54    #[inline(always)]
55    pub fn enable(self) -> &'a mut crate::W<REG> {
56        self.variant(Hren::Enable)
57    }
58}
59#[doc = "Host Request Polarity\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Hrpol {
63    #[doc = "0: Active high"]
64    Disabled = 0,
65    #[doc = "1: Active low"]
66    Enabled = 1,
67}
68impl From<Hrpol> for bool {
69    #[inline(always)]
70    fn from(variant: Hrpol) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `HRPOL` reader - Host Request Polarity"]
75pub type HrpolR = crate::BitReader<Hrpol>;
76impl HrpolR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Hrpol {
80        match self.bits {
81            false => Hrpol::Disabled,
82            true => Hrpol::Enabled,
83        }
84    }
85    #[doc = "Active high"]
86    #[inline(always)]
87    pub fn is_disabled(&self) -> bool {
88        *self == Hrpol::Disabled
89    }
90    #[doc = "Active low"]
91    #[inline(always)]
92    pub fn is_enabled(&self) -> bool {
93        *self == Hrpol::Enabled
94    }
95}
96#[doc = "Field `HRPOL` writer - Host Request Polarity"]
97pub type HrpolW<'a, REG> = crate::BitWriter<'a, REG, Hrpol>;
98impl<'a, REG> HrpolW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Active high"]
103    #[inline(always)]
104    pub fn disabled(self) -> &'a mut crate::W<REG> {
105        self.variant(Hrpol::Disabled)
106    }
107    #[doc = "Active low"]
108    #[inline(always)]
109    pub fn enabled(self) -> &'a mut crate::W<REG> {
110        self.variant(Hrpol::Enabled)
111    }
112}
113#[doc = "Host Request Select\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Hrsel {
117    #[doc = "0: HREQ pin"]
118    Hreqpin = 0,
119    #[doc = "1: Input trigger"]
120    InputTrigger = 1,
121}
122impl From<Hrsel> for bool {
123    #[inline(always)]
124    fn from(variant: Hrsel) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `HRSEL` reader - Host Request Select"]
129pub type HrselR = crate::BitReader<Hrsel>;
130impl HrselR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Hrsel {
134        match self.bits {
135            false => Hrsel::Hreqpin,
136            true => Hrsel::InputTrigger,
137        }
138    }
139    #[doc = "HREQ pin"]
140    #[inline(always)]
141    pub fn is_hreqpin(&self) -> bool {
142        *self == Hrsel::Hreqpin
143    }
144    #[doc = "Input trigger"]
145    #[inline(always)]
146    pub fn is_input_trigger(&self) -> bool {
147        *self == Hrsel::InputTrigger
148    }
149}
150#[doc = "Field `HRSEL` writer - Host Request Select"]
151pub type HrselW<'a, REG> = crate::BitWriter<'a, REG, Hrsel>;
152impl<'a, REG> HrselW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "HREQ pin"]
157    #[inline(always)]
158    pub fn hreqpin(self) -> &'a mut crate::W<REG> {
159        self.variant(Hrsel::Hreqpin)
160    }
161    #[doc = "Input trigger"]
162    #[inline(always)]
163    pub fn input_trigger(self) -> &'a mut crate::W<REG> {
164        self.variant(Hrsel::InputTrigger)
165    }
166}
167#[doc = "Host Request Direction\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Hrdir {
171    #[doc = "0: Input"]
172    Input = 0,
173    #[doc = "1: Output"]
174    Output = 1,
175}
176impl From<Hrdir> for bool {
177    #[inline(always)]
178    fn from(variant: Hrdir) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `HRDIR` reader - Host Request Direction"]
183pub type HrdirR = crate::BitReader<Hrdir>;
184impl HrdirR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Hrdir {
188        match self.bits {
189            false => Hrdir::Input,
190            true => Hrdir::Output,
191        }
192    }
193    #[doc = "Input"]
194    #[inline(always)]
195    pub fn is_input(&self) -> bool {
196        *self == Hrdir::Input
197    }
198    #[doc = "Output"]
199    #[inline(always)]
200    pub fn is_output(&self) -> bool {
201        *self == Hrdir::Output
202    }
203}
204#[doc = "Field `HRDIR` writer - Host Request Direction"]
205pub type HrdirW<'a, REG> = crate::BitWriter<'a, REG, Hrdir>;
206impl<'a, REG> HrdirW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Input"]
211    #[inline(always)]
212    pub fn input(self) -> &'a mut crate::W<REG> {
213        self.variant(Hrdir::Input)
214    }
215    #[doc = "Output"]
216    #[inline(always)]
217    pub fn output(self) -> &'a mut crate::W<REG> {
218        self.variant(Hrdir::Output)
219    }
220}
221#[doc = "Circular FIFO Enable\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Cirfifo {
225    #[doc = "0: Disable"]
226    Disable = 0,
227    #[doc = "1: Enable"]
228    Enable = 1,
229}
230impl From<Cirfifo> for bool {
231    #[inline(always)]
232    fn from(variant: Cirfifo) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `CIRFIFO` reader - Circular FIFO Enable"]
237pub type CirfifoR = crate::BitReader<Cirfifo>;
238impl CirfifoR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Cirfifo {
242        match self.bits {
243            false => Cirfifo::Disable,
244            true => Cirfifo::Enable,
245        }
246    }
247    #[doc = "Disable"]
248    #[inline(always)]
249    pub fn is_disable(&self) -> bool {
250        *self == Cirfifo::Disable
251    }
252    #[doc = "Enable"]
253    #[inline(always)]
254    pub fn is_enable(&self) -> bool {
255        *self == Cirfifo::Enable
256    }
257}
258#[doc = "Field `CIRFIFO` writer - Circular FIFO Enable"]
259pub type CirfifoW<'a, REG> = crate::BitWriter<'a, REG, Cirfifo>;
260impl<'a, REG> CirfifoW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Disable"]
265    #[inline(always)]
266    pub fn disable(self) -> &'a mut crate::W<REG> {
267        self.variant(Cirfifo::Disable)
268    }
269    #[doc = "Enable"]
270    #[inline(always)]
271    pub fn enable(self) -> &'a mut crate::W<REG> {
272        self.variant(Cirfifo::Enable)
273    }
274}
275#[doc = "Receive Data Match Only\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Rdmo {
279    #[doc = "0: Disable"]
280    Stored = 0,
281    #[doc = "1: Enable"]
282    Discarded = 1,
283}
284impl From<Rdmo> for bool {
285    #[inline(always)]
286    fn from(variant: Rdmo) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `RDMO` reader - Receive Data Match Only"]
291pub type RdmoR = crate::BitReader<Rdmo>;
292impl RdmoR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Rdmo {
296        match self.bits {
297            false => Rdmo::Stored,
298            true => Rdmo::Discarded,
299        }
300    }
301    #[doc = "Disable"]
302    #[inline(always)]
303    pub fn is_stored(&self) -> bool {
304        *self == Rdmo::Stored
305    }
306    #[doc = "Enable"]
307    #[inline(always)]
308    pub fn is_discarded(&self) -> bool {
309        *self == Rdmo::Discarded
310    }
311}
312#[doc = "Field `RDMO` writer - Receive Data Match Only"]
313pub type RdmoW<'a, REG> = crate::BitWriter<'a, REG, Rdmo>;
314impl<'a, REG> RdmoW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "Disable"]
319    #[inline(always)]
320    pub fn stored(self) -> &'a mut crate::W<REG> {
321        self.variant(Rdmo::Stored)
322    }
323    #[doc = "Enable"]
324    #[inline(always)]
325    pub fn discarded(self) -> &'a mut crate::W<REG> {
326        self.variant(Rdmo::Discarded)
327    }
328}
329impl R {
330    #[doc = "Bit 0 - Host Request Enable"]
331    #[inline(always)]
332    pub fn hren(&self) -> HrenR {
333        HrenR::new((self.bits & 1) != 0)
334    }
335    #[doc = "Bit 1 - Host Request Polarity"]
336    #[inline(always)]
337    pub fn hrpol(&self) -> HrpolR {
338        HrpolR::new(((self.bits >> 1) & 1) != 0)
339    }
340    #[doc = "Bit 2 - Host Request Select"]
341    #[inline(always)]
342    pub fn hrsel(&self) -> HrselR {
343        HrselR::new(((self.bits >> 2) & 1) != 0)
344    }
345    #[doc = "Bit 3 - Host Request Direction"]
346    #[inline(always)]
347    pub fn hrdir(&self) -> HrdirR {
348        HrdirR::new(((self.bits >> 3) & 1) != 0)
349    }
350    #[doc = "Bit 8 - Circular FIFO Enable"]
351    #[inline(always)]
352    pub fn cirfifo(&self) -> CirfifoR {
353        CirfifoR::new(((self.bits >> 8) & 1) != 0)
354    }
355    #[doc = "Bit 9 - Receive Data Match Only"]
356    #[inline(always)]
357    pub fn rdmo(&self) -> RdmoR {
358        RdmoR::new(((self.bits >> 9) & 1) != 0)
359    }
360}
361#[cfg(feature = "debug")]
362impl core::fmt::Debug for R {
363    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
364        f.debug_struct("CFGR0")
365            .field("hren", &self.hren())
366            .field("hrpol", &self.hrpol())
367            .field("hrsel", &self.hrsel())
368            .field("hrdir", &self.hrdir())
369            .field("cirfifo", &self.cirfifo())
370            .field("rdmo", &self.rdmo())
371            .finish()
372    }
373}
374impl W {
375    #[doc = "Bit 0 - Host Request Enable"]
376    #[inline(always)]
377    pub fn hren(&mut self) -> HrenW<'_, Cfgr0Spec> {
378        HrenW::new(self, 0)
379    }
380    #[doc = "Bit 1 - Host Request Polarity"]
381    #[inline(always)]
382    pub fn hrpol(&mut self) -> HrpolW<'_, Cfgr0Spec> {
383        HrpolW::new(self, 1)
384    }
385    #[doc = "Bit 2 - Host Request Select"]
386    #[inline(always)]
387    pub fn hrsel(&mut self) -> HrselW<'_, Cfgr0Spec> {
388        HrselW::new(self, 2)
389    }
390    #[doc = "Bit 3 - Host Request Direction"]
391    #[inline(always)]
392    pub fn hrdir(&mut self) -> HrdirW<'_, Cfgr0Spec> {
393        HrdirW::new(self, 3)
394    }
395    #[doc = "Bit 8 - Circular FIFO Enable"]
396    #[inline(always)]
397    pub fn cirfifo(&mut self) -> CirfifoW<'_, Cfgr0Spec> {
398        CirfifoW::new(self, 8)
399    }
400    #[doc = "Bit 9 - Receive Data Match Only"]
401    #[inline(always)]
402    pub fn rdmo(&mut self) -> RdmoW<'_, Cfgr0Spec> {
403        RdmoW::new(self, 9)
404    }
405}
406#[doc = "Configuration 0\n\nYou can [`read`](crate::Reg::read) this register and get [`cfgr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
407pub struct Cfgr0Spec;
408impl crate::RegisterSpec for Cfgr0Spec {
409    type Ux = u32;
410}
411#[doc = "`read()` method returns [`cfgr0::R`](R) reader structure"]
412impl crate::Readable for Cfgr0Spec {}
413#[doc = "`write(|w| ..)` method takes [`cfgr0::W`](W) writer structure"]
414impl crate::Writable for Cfgr0Spec {
415    type Safety = crate::Unsafe;
416}
417#[doc = "`reset()` method sets CFGR0 to value 0"]
418impl crate::Resettable for Cfgr0Spec {}
mcxa_pac/lpspi0/cfgr0.rs

mcxa_pac/lpspi0/
cfgr0.rs
