1#[doc = "Register `MCFGR0` reader"]
2pub type R = crate::R<Mcfgr0Spec>;
3#[doc = "Register `MCFGR0` writer"]
4pub type W = crate::W<Mcfgr0Spec>;
5#[doc = "Host Request Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Hren {
9 #[doc = "0: Disable"]
10 Disabled = 0,
11 #[doc = "1: Enable"]
12 Enabled = 1,
13}
14impl From<Hren> for bool {
15 #[inline(always)]
16 fn from(variant: Hren) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `HREN` reader - Host Request Enable"]
21pub type HrenR = crate::BitReader<Hren>;
22impl HrenR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> Hren {
26 match self.bits {
27 false => Hren::Disabled,
28 true => Hren::Enabled,
29 }
30 }
31 #[doc = "Disable"]
32 #[inline(always)]
33 pub fn is_disabled(&self) -> bool {
34 *self == Hren::Disabled
35 }
36 #[doc = "Enable"]
37 #[inline(always)]
38 pub fn is_enabled(&self) -> bool {
39 *self == Hren::Enabled
40 }
41}
42#[doc = "Field `HREN` writer - Host Request Enable"]
43pub type HrenW<'a, REG> = crate::BitWriter<'a, REG, Hren>;
44impl<'a, REG> HrenW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Disable"]
49 #[inline(always)]
50 pub fn disabled(self) -> &'a mut crate::W<REG> {
51 self.variant(Hren::Disabled)
52 }
53 #[doc = "Enable"]
54 #[inline(always)]
55 pub fn enabled(self) -> &'a mut crate::W<REG> {
56 self.variant(Hren::Enabled)
57 }
58}
59#[doc = "Host Request Polarity\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Hrpol {
63 #[doc = "0: Active low"]
64 ActiveLow = 0,
65 #[doc = "1: Active high"]
66 ActiveHigh = 1,
67}
68impl From<Hrpol> for bool {
69 #[inline(always)]
70 fn from(variant: Hrpol) -> Self {
71 variant as u8 != 0
72 }
73}
74#[doc = "Field `HRPOL` reader - Host Request Polarity"]
75pub type HrpolR = crate::BitReader<Hrpol>;
76impl HrpolR {
77 #[doc = "Get enumerated values variant"]
78 #[inline(always)]
79 pub const fn variant(&self) -> Hrpol {
80 match self.bits {
81 false => Hrpol::ActiveLow,
82 true => Hrpol::ActiveHigh,
83 }
84 }
85 #[doc = "Active low"]
86 #[inline(always)]
87 pub fn is_active_low(&self) -> bool {
88 *self == Hrpol::ActiveLow
89 }
90 #[doc = "Active high"]
91 #[inline(always)]
92 pub fn is_active_high(&self) -> bool {
93 *self == Hrpol::ActiveHigh
94 }
95}
96#[doc = "Field `HRPOL` writer - Host Request Polarity"]
97pub type HrpolW<'a, REG> = crate::BitWriter<'a, REG, Hrpol>;
98impl<'a, REG> HrpolW<'a, REG>
99where
100 REG: crate::Writable + crate::RegisterSpec,
101{
102 #[doc = "Active low"]
103 #[inline(always)]
104 pub fn active_low(self) -> &'a mut crate::W<REG> {
105 self.variant(Hrpol::ActiveLow)
106 }
107 #[doc = "Active high"]
108 #[inline(always)]
109 pub fn active_high(self) -> &'a mut crate::W<REG> {
110 self.variant(Hrpol::ActiveHigh)
111 }
112}
113#[doc = "Host Request Select\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Hrsel {
117 #[doc = "0: Host request input is pin HREQ"]
118 Disabled = 0,
119 #[doc = "1: Host request input is input trigger"]
120 Enabled = 1,
121}
122impl From<Hrsel> for bool {
123 #[inline(always)]
124 fn from(variant: Hrsel) -> Self {
125 variant as u8 != 0
126 }
127}
128#[doc = "Field `HRSEL` reader - Host Request Select"]
129pub type HrselR = crate::BitReader<Hrsel>;
130impl HrselR {
131 #[doc = "Get enumerated values variant"]
132 #[inline(always)]
133 pub const fn variant(&self) -> Hrsel {
134 match self.bits {
135 false => Hrsel::Disabled,
136 true => Hrsel::Enabled,
137 }
138 }
139 #[doc = "Host request input is pin HREQ"]
140 #[inline(always)]
141 pub fn is_disabled(&self) -> bool {
142 *self == Hrsel::Disabled
143 }
144 #[doc = "Host request input is input trigger"]
145 #[inline(always)]
146 pub fn is_enabled(&self) -> bool {
147 *self == Hrsel::Enabled
148 }
149}
150#[doc = "Field `HRSEL` writer - Host Request Select"]
151pub type HrselW<'a, REG> = crate::BitWriter<'a, REG, Hrsel>;
152impl<'a, REG> HrselW<'a, REG>
153where
154 REG: crate::Writable + crate::RegisterSpec,
155{
156 #[doc = "Host request input is pin HREQ"]
157 #[inline(always)]
158 pub fn disabled(self) -> &'a mut crate::W<REG> {
159 self.variant(Hrsel::Disabled)
160 }
161 #[doc = "Host request input is input trigger"]
162 #[inline(always)]
163 pub fn enabled(self) -> &'a mut crate::W<REG> {
164 self.variant(Hrsel::Enabled)
165 }
166}
167#[doc = "Host Request Direction\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Hrdir {
171 #[doc = "0: HREQ pin is input (for LPI2C controller)"]
172 Input = 0,
173 #[doc = "1: HREQ pin is output (for LPI2C target)"]
174 Output = 1,
175}
176impl From<Hrdir> for bool {
177 #[inline(always)]
178 fn from(variant: Hrdir) -> Self {
179 variant as u8 != 0
180 }
181}
182#[doc = "Field `HRDIR` reader - Host Request Direction"]
183pub type HrdirR = crate::BitReader<Hrdir>;
184impl HrdirR {
185 #[doc = "Get enumerated values variant"]
186 #[inline(always)]
187 pub const fn variant(&self) -> Hrdir {
188 match self.bits {
189 false => Hrdir::Input,
190 true => Hrdir::Output,
191 }
192 }
193 #[doc = "HREQ pin is input (for LPI2C controller)"]
194 #[inline(always)]
195 pub fn is_input(&self) -> bool {
196 *self == Hrdir::Input
197 }
198 #[doc = "HREQ pin is output (for LPI2C target)"]
199 #[inline(always)]
200 pub fn is_output(&self) -> bool {
201 *self == Hrdir::Output
202 }
203}
204#[doc = "Field `HRDIR` writer - Host Request Direction"]
205pub type HrdirW<'a, REG> = crate::BitWriter<'a, REG, Hrdir>;
206impl<'a, REG> HrdirW<'a, REG>
207where
208 REG: crate::Writable + crate::RegisterSpec,
209{
210 #[doc = "HREQ pin is input (for LPI2C controller)"]
211 #[inline(always)]
212 pub fn input(self) -> &'a mut crate::W<REG> {
213 self.variant(Hrdir::Input)
214 }
215 #[doc = "HREQ pin is output (for LPI2C target)"]
216 #[inline(always)]
217 pub fn output(self) -> &'a mut crate::W<REG> {
218 self.variant(Hrdir::Output)
219 }
220}
221#[doc = "Circular FIFO Enable\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Cirfifo {
225 #[doc = "0: Disable"]
226 Disabled = 0,
227 #[doc = "1: Enable"]
228 Enabled = 1,
229}
230impl From<Cirfifo> for bool {
231 #[inline(always)]
232 fn from(variant: Cirfifo) -> Self {
233 variant as u8 != 0
234 }
235}
236#[doc = "Field `CIRFIFO` reader - Circular FIFO Enable"]
237pub type CirfifoR = crate::BitReader<Cirfifo>;
238impl CirfifoR {
239 #[doc = "Get enumerated values variant"]
240 #[inline(always)]
241 pub const fn variant(&self) -> Cirfifo {
242 match self.bits {
243 false => Cirfifo::Disabled,
244 true => Cirfifo::Enabled,
245 }
246 }
247 #[doc = "Disable"]
248 #[inline(always)]
249 pub fn is_disabled(&self) -> bool {
250 *self == Cirfifo::Disabled
251 }
252 #[doc = "Enable"]
253 #[inline(always)]
254 pub fn is_enabled(&self) -> bool {
255 *self == Cirfifo::Enabled
256 }
257}
258#[doc = "Field `CIRFIFO` writer - Circular FIFO Enable"]
259pub type CirfifoW<'a, REG> = crate::BitWriter<'a, REG, Cirfifo>;
260impl<'a, REG> CirfifoW<'a, REG>
261where
262 REG: crate::Writable + crate::RegisterSpec,
263{
264 #[doc = "Disable"]
265 #[inline(always)]
266 pub fn disabled(self) -> &'a mut crate::W<REG> {
267 self.variant(Cirfifo::Disabled)
268 }
269 #[doc = "Enable"]
270 #[inline(always)]
271 pub fn enabled(self) -> &'a mut crate::W<REG> {
272 self.variant(Cirfifo::Enabled)
273 }
274}
275#[doc = "Receive Data Match Only\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Rdmo {
279 #[doc = "0: Received data is stored in the receive FIFO"]
280 Disabled = 0,
281 #[doc = "1: Received data is discarded unless MSR\\[DMF\\] is set"]
282 Enabled = 1,
283}
284impl From<Rdmo> for bool {
285 #[inline(always)]
286 fn from(variant: Rdmo) -> Self {
287 variant as u8 != 0
288 }
289}
290#[doc = "Field `RDMO` reader - Receive Data Match Only"]
291pub type RdmoR = crate::BitReader<Rdmo>;
292impl RdmoR {
293 #[doc = "Get enumerated values variant"]
294 #[inline(always)]
295 pub const fn variant(&self) -> Rdmo {
296 match self.bits {
297 false => Rdmo::Disabled,
298 true => Rdmo::Enabled,
299 }
300 }
301 #[doc = "Received data is stored in the receive FIFO"]
302 #[inline(always)]
303 pub fn is_disabled(&self) -> bool {
304 *self == Rdmo::Disabled
305 }
306 #[doc = "Received data is discarded unless MSR\\[DMF\\] is set"]
307 #[inline(always)]
308 pub fn is_enabled(&self) -> bool {
309 *self == Rdmo::Enabled
310 }
311}
312#[doc = "Field `RDMO` writer - Receive Data Match Only"]
313pub type RdmoW<'a, REG> = crate::BitWriter<'a, REG, Rdmo>;
314impl<'a, REG> RdmoW<'a, REG>
315where
316 REG: crate::Writable + crate::RegisterSpec,
317{
318 #[doc = "Received data is stored in the receive FIFO"]
319 #[inline(always)]
320 pub fn disabled(self) -> &'a mut crate::W<REG> {
321 self.variant(Rdmo::Disabled)
322 }
323 #[doc = "Received data is discarded unless MSR\\[DMF\\] is set"]
324 #[inline(always)]
325 pub fn enabled(self) -> &'a mut crate::W<REG> {
326 self.variant(Rdmo::Enabled)
327 }
328}
329#[doc = "Relaxed Mode\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Relax {
333 #[doc = "0: Normal transfer"]
334 NormalTransfer = 0,
335 #[doc = "1: Relaxed transfer"]
336 RelaxedTransfer = 1,
337}
338impl From<Relax> for bool {
339 #[inline(always)]
340 fn from(variant: Relax) -> Self {
341 variant as u8 != 0
342 }
343}
344#[doc = "Field `RELAX` reader - Relaxed Mode"]
345pub type RelaxR = crate::BitReader<Relax>;
346impl RelaxR {
347 #[doc = "Get enumerated values variant"]
348 #[inline(always)]
349 pub const fn variant(&self) -> Relax {
350 match self.bits {
351 false => Relax::NormalTransfer,
352 true => Relax::RelaxedTransfer,
353 }
354 }
355 #[doc = "Normal transfer"]
356 #[inline(always)]
357 pub fn is_normal_transfer(&self) -> bool {
358 *self == Relax::NormalTransfer
359 }
360 #[doc = "Relaxed transfer"]
361 #[inline(always)]
362 pub fn is_relaxed_transfer(&self) -> bool {
363 *self == Relax::RelaxedTransfer
364 }
365}
366#[doc = "Field `RELAX` writer - Relaxed Mode"]
367pub type RelaxW<'a, REG> = crate::BitWriter<'a, REG, Relax>;
368impl<'a, REG> RelaxW<'a, REG>
369where
370 REG: crate::Writable + crate::RegisterSpec,
371{
372 #[doc = "Normal transfer"]
373 #[inline(always)]
374 pub fn normal_transfer(self) -> &'a mut crate::W<REG> {
375 self.variant(Relax::NormalTransfer)
376 }
377 #[doc = "Relaxed transfer"]
378 #[inline(always)]
379 pub fn relaxed_transfer(self) -> &'a mut crate::W<REG> {
380 self.variant(Relax::RelaxedTransfer)
381 }
382}
383#[doc = "Abort Transfer\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Abort {
387 #[doc = "0: Normal transfer"]
388 Disabled = 0,
389 #[doc = "1: Abort existing transfer and do not start a new one"]
390 Enabled = 1,
391}
392impl From<Abort> for bool {
393 #[inline(always)]
394 fn from(variant: Abort) -> Self {
395 variant as u8 != 0
396 }
397}
398#[doc = "Field `ABORT` reader - Abort Transfer"]
399pub type AbortR = crate::BitReader<Abort>;
400impl AbortR {
401 #[doc = "Get enumerated values variant"]
402 #[inline(always)]
403 pub const fn variant(&self) -> Abort {
404 match self.bits {
405 false => Abort::Disabled,
406 true => Abort::Enabled,
407 }
408 }
409 #[doc = "Normal transfer"]
410 #[inline(always)]
411 pub fn is_disabled(&self) -> bool {
412 *self == Abort::Disabled
413 }
414 #[doc = "Abort existing transfer and do not start a new one"]
415 #[inline(always)]
416 pub fn is_enabled(&self) -> bool {
417 *self == Abort::Enabled
418 }
419}
420#[doc = "Field `ABORT` writer - Abort Transfer"]
421pub type AbortW<'a, REG> = crate::BitWriter<'a, REG, Abort>;
422impl<'a, REG> AbortW<'a, REG>
423where
424 REG: crate::Writable + crate::RegisterSpec,
425{
426 #[doc = "Normal transfer"]
427 #[inline(always)]
428 pub fn disabled(self) -> &'a mut crate::W<REG> {
429 self.variant(Abort::Disabled)
430 }
431 #[doc = "Abort existing transfer and do not start a new one"]
432 #[inline(always)]
433 pub fn enabled(self) -> &'a mut crate::W<REG> {
434 self.variant(Abort::Enabled)
435 }
436}
437impl R {
438 #[doc = "Bit 0 - Host Request Enable"]
439 #[inline(always)]
440 pub fn hren(&self) -> HrenR {
441 HrenR::new((self.bits & 1) != 0)
442 }
443 #[doc = "Bit 1 - Host Request Polarity"]
444 #[inline(always)]
445 pub fn hrpol(&self) -> HrpolR {
446 HrpolR::new(((self.bits >> 1) & 1) != 0)
447 }
448 #[doc = "Bit 2 - Host Request Select"]
449 #[inline(always)]
450 pub fn hrsel(&self) -> HrselR {
451 HrselR::new(((self.bits >> 2) & 1) != 0)
452 }
453 #[doc = "Bit 3 - Host Request Direction"]
454 #[inline(always)]
455 pub fn hrdir(&self) -> HrdirR {
456 HrdirR::new(((self.bits >> 3) & 1) != 0)
457 }
458 #[doc = "Bit 8 - Circular FIFO Enable"]
459 #[inline(always)]
460 pub fn cirfifo(&self) -> CirfifoR {
461 CirfifoR::new(((self.bits >> 8) & 1) != 0)
462 }
463 #[doc = "Bit 9 - Receive Data Match Only"]
464 #[inline(always)]
465 pub fn rdmo(&self) -> RdmoR {
466 RdmoR::new(((self.bits >> 9) & 1) != 0)
467 }
468 #[doc = "Bit 16 - Relaxed Mode"]
469 #[inline(always)]
470 pub fn relax(&self) -> RelaxR {
471 RelaxR::new(((self.bits >> 16) & 1) != 0)
472 }
473 #[doc = "Bit 17 - Abort Transfer"]
474 #[inline(always)]
475 pub fn abort(&self) -> AbortR {
476 AbortR::new(((self.bits >> 17) & 1) != 0)
477 }
478}
479#[cfg(feature = "debug")]
480impl core::fmt::Debug for R {
481 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
482 f.debug_struct("MCFGR0")
483 .field("hren", &self.hren())
484 .field("hrpol", &self.hrpol())
485 .field("hrsel", &self.hrsel())
486 .field("hrdir", &self.hrdir())
487 .field("cirfifo", &self.cirfifo())
488 .field("rdmo", &self.rdmo())
489 .field("relax", &self.relax())
490 .field("abort", &self.abort())
491 .finish()
492 }
493}
494impl W {
495 #[doc = "Bit 0 - Host Request Enable"]
496 #[inline(always)]
497 pub fn hren(&mut self) -> HrenW<'_, Mcfgr0Spec> {
498 HrenW::new(self, 0)
499 }
500 #[doc = "Bit 1 - Host Request Polarity"]
501 #[inline(always)]
502 pub fn hrpol(&mut self) -> HrpolW<'_, Mcfgr0Spec> {
503 HrpolW::new(self, 1)
504 }
505 #[doc = "Bit 2 - Host Request Select"]
506 #[inline(always)]
507 pub fn hrsel(&mut self) -> HrselW<'_, Mcfgr0Spec> {
508 HrselW::new(self, 2)
509 }
510 #[doc = "Bit 3 - Host Request Direction"]
511 #[inline(always)]
512 pub fn hrdir(&mut self) -> HrdirW<'_, Mcfgr0Spec> {
513 HrdirW::new(self, 3)
514 }
515 #[doc = "Bit 8 - Circular FIFO Enable"]
516 #[inline(always)]
517 pub fn cirfifo(&mut self) -> CirfifoW<'_, Mcfgr0Spec> {
518 CirfifoW::new(self, 8)
519 }
520 #[doc = "Bit 9 - Receive Data Match Only"]
521 #[inline(always)]
522 pub fn rdmo(&mut self) -> RdmoW<'_, Mcfgr0Spec> {
523 RdmoW::new(self, 9)
524 }
525 #[doc = "Bit 16 - Relaxed Mode"]
526 #[inline(always)]
527 pub fn relax(&mut self) -> RelaxW<'_, Mcfgr0Spec> {
528 RelaxW::new(self, 16)
529 }
530 #[doc = "Bit 17 - Abort Transfer"]
531 #[inline(always)]
532 pub fn abort(&mut self) -> AbortW<'_, Mcfgr0Spec> {
533 AbortW::new(self, 17)
534 }
535}
536#[doc = "Controller Configuration 0\n\nYou can [`read`](crate::Reg::read) this register and get [`mcfgr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcfgr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
537pub struct Mcfgr0Spec;
538impl crate::RegisterSpec for Mcfgr0Spec {
539 type Ux = u32;
540}
541#[doc = "`read()` method returns [`mcfgr0::R`](R) reader structure"]
542impl crate::Readable for Mcfgr0Spec {}
543#[doc = "`write(|w| ..)` method takes [`mcfgr0::W`](W) writer structure"]
544impl crate::Writable for Mcfgr0Spec {
545 type Safety = crate::Unsafe;
546}
547#[doc = "`reset()` method sets MCFGR0 to value 0"]
548impl crate::Resettable for Mcfgr0Spec {}