mcxa_pac/i3c0/
sintmasked.rs1#[doc = "Register `SINTMASKED` reader"]
2pub type R = crate::R<SintmaskedSpec>;
3#[doc = "Field `START` reader - START Interrupt Mask"]
4pub type StartR = crate::BitReader;
5#[doc = "Field `MATCHED` reader - MATCHED Interrupt Mask"]
6pub type MatchedR = crate::BitReader;
7#[doc = "Field `STOP` reader - STOP Interrupt Mask"]
8pub type StopR = crate::BitReader;
9#[doc = "Field `RXPEND` reader - RXPEND Interrupt Mask"]
10pub type RxpendR = crate::BitReader;
11#[doc = "Field `TXSEND` reader - TXSEND Interrupt Mask"]
12pub type TxsendR = crate::BitReader;
13#[doc = "Field `DACHG` reader - DACHG Interrupt Mask"]
14pub type DachgR = crate::BitReader;
15#[doc = "Field `CCC` reader - CCC Interrupt Mask"]
16pub type CccR = crate::BitReader;
17#[doc = "Field `ERRWARN` reader - ERRWARN Interrupt Mask"]
18pub type ErrwarnR = crate::BitReader;
19#[doc = "Field `DDRMATCHED` reader - DDRMATCHED Interrupt Mask"]
20pub type DdrmatchedR = crate::BitReader;
21#[doc = "Field `CHANDLED` reader - CHANDLED Interrupt Mask"]
22pub type ChandledR = crate::BitReader;
23#[doc = "Field `EVENT` reader - EVENT Interrupt Mask"]
24pub type EventR = crate::BitReader;
25impl R {
26 #[doc = "Bit 8 - START Interrupt Mask"]
27 #[inline(always)]
28 pub fn start(&self) -> StartR {
29 StartR::new(((self.bits >> 8) & 1) != 0)
30 }
31 #[doc = "Bit 9 - MATCHED Interrupt Mask"]
32 #[inline(always)]
33 pub fn matched(&self) -> MatchedR {
34 MatchedR::new(((self.bits >> 9) & 1) != 0)
35 }
36 #[doc = "Bit 10 - STOP Interrupt Mask"]
37 #[inline(always)]
38 pub fn stop(&self) -> StopR {
39 StopR::new(((self.bits >> 10) & 1) != 0)
40 }
41 #[doc = "Bit 11 - RXPEND Interrupt Mask"]
42 #[inline(always)]
43 pub fn rxpend(&self) -> RxpendR {
44 RxpendR::new(((self.bits >> 11) & 1) != 0)
45 }
46 #[doc = "Bit 12 - TXSEND Interrupt Mask"]
47 #[inline(always)]
48 pub fn txsend(&self) -> TxsendR {
49 TxsendR::new(((self.bits >> 12) & 1) != 0)
50 }
51 #[doc = "Bit 13 - DACHG Interrupt Mask"]
52 #[inline(always)]
53 pub fn dachg(&self) -> DachgR {
54 DachgR::new(((self.bits >> 13) & 1) != 0)
55 }
56 #[doc = "Bit 14 - CCC Interrupt Mask"]
57 #[inline(always)]
58 pub fn ccc(&self) -> CccR {
59 CccR::new(((self.bits >> 14) & 1) != 0)
60 }
61 #[doc = "Bit 15 - ERRWARN Interrupt Mask"]
62 #[inline(always)]
63 pub fn errwarn(&self) -> ErrwarnR {
64 ErrwarnR::new(((self.bits >> 15) & 1) != 0)
65 }
66 #[doc = "Bit 16 - DDRMATCHED Interrupt Mask"]
67 #[inline(always)]
68 pub fn ddrmatched(&self) -> DdrmatchedR {
69 DdrmatchedR::new(((self.bits >> 16) & 1) != 0)
70 }
71 #[doc = "Bit 17 - CHANDLED Interrupt Mask"]
72 #[inline(always)]
73 pub fn chandled(&self) -> ChandledR {
74 ChandledR::new(((self.bits >> 17) & 1) != 0)
75 }
76 #[doc = "Bit 18 - EVENT Interrupt Mask"]
77 #[inline(always)]
78 pub fn event(&self) -> EventR {
79 EventR::new(((self.bits >> 18) & 1) != 0)
80 }
81}
82#[cfg(feature = "debug")]
83impl core::fmt::Debug for R {
84 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
85 f.debug_struct("SINTMASKED")
86 .field("start", &self.start())
87 .field("matched", &self.matched())
88 .field("stop", &self.stop())
89 .field("rxpend", &self.rxpend())
90 .field("txsend", &self.txsend())
91 .field("dachg", &self.dachg())
92 .field("ccc", &self.ccc())
93 .field("errwarn", &self.errwarn())
94 .field("ddrmatched", &self.ddrmatched())
95 .field("chandled", &self.chandled())
96 .field("event", &self.event())
97 .finish()
98 }
99}
100#[doc = "Target Interrupt Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`sintmasked::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
101pub struct SintmaskedSpec;
102impl crate::RegisterSpec for SintmaskedSpec {
103 type Ux = u32;
104}
105#[doc = "`read()` method returns [`sintmasked::R`](R) reader structure"]
106impl crate::Readable for SintmaskedSpec {}
107#[doc = "`reset()` method sets SINTMASKED to value 0"]
108impl crate::Resettable for SintmaskedSpec {}