mcxa_pac/i3c0/
mwmsg_sdr_control.rs

1#[doc = "Register `MWMSG_SDR_CONTROL` writer"]
2pub type W = crate::W<MwmsgSdrControlSpec>;
3#[doc = "Direction\n\nValue on reset: 0"]
4#[cfg_attr(feature = "defmt", derive(defmt::Format))]
5#[derive(Clone, Copy, Debug, PartialEq, Eq)]
6pub enum Dir {
7    #[doc = "0: Write"]
8    Write = 0,
9    #[doc = "1: Read"]
10    Read = 1,
11}
12impl From<Dir> for bool {
13    #[inline(always)]
14    fn from(variant: Dir) -> Self {
15        variant as u8 != 0
16    }
17}
18#[doc = "Field `DIR` writer - Direction"]
19pub type DirW<'a, REG> = crate::BitWriter<'a, REG, Dir>;
20impl<'a, REG> DirW<'a, REG>
21where
22    REG: crate::Writable + crate::RegisterSpec,
23{
24    #[doc = "Write"]
25    #[inline(always)]
26    pub fn write(self) -> &'a mut crate::W<REG> {
27        self.variant(Dir::Write)
28    }
29    #[doc = "Read"]
30    #[inline(always)]
31    pub fn read(self) -> &'a mut crate::W<REG> {
32        self.variant(Dir::Read)
33    }
34}
35#[doc = "Field `ADDR` writer - Address"]
36pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 7>;
37#[doc = "End of SDR Message\n\nValue on reset: 0"]
38#[cfg_attr(feature = "defmt", derive(defmt::Format))]
39#[derive(Clone, Copy, Debug, PartialEq, Eq)]
40pub enum End {
41    #[doc = "0: Not the end"]
42    NotEnd = 0,
43    #[doc = "1: End"]
44    End = 1,
45}
46impl From<End> for bool {
47    #[inline(always)]
48    fn from(variant: End) -> Self {
49        variant as u8 != 0
50    }
51}
52#[doc = "Field `END` writer - End of SDR Message"]
53pub type EndW<'a, REG> = crate::BitWriter<'a, REG, End>;
54impl<'a, REG> EndW<'a, REG>
55where
56    REG: crate::Writable + crate::RegisterSpec,
57{
58    #[doc = "Not the end"]
59    #[inline(always)]
60    pub fn not_end(self) -> &'a mut crate::W<REG> {
61        self.variant(End::NotEnd)
62    }
63    #[doc = "End"]
64    #[inline(always)]
65    pub fn end(self) -> &'a mut crate::W<REG> {
66        self.variant(End::End)
67    }
68}
69#[doc = "I2C\n\nValue on reset: 0"]
70#[cfg_attr(feature = "defmt", derive(defmt::Format))]
71#[derive(Clone, Copy, Debug, PartialEq, Eq)]
72pub enum I2c {
73    #[doc = "0: I3C message"]
74    I3cmessage = 0,
75    #[doc = "1: I2C message"]
76    I2cmessage = 1,
77}
78impl From<I2c> for bool {
79    #[inline(always)]
80    fn from(variant: I2c) -> Self {
81        variant as u8 != 0
82    }
83}
84#[doc = "Field `I2C` writer - I2C"]
85pub type I2cW<'a, REG> = crate::BitWriter<'a, REG, I2c>;
86impl<'a, REG> I2cW<'a, REG>
87where
88    REG: crate::Writable + crate::RegisterSpec,
89{
90    #[doc = "I3C message"]
91    #[inline(always)]
92    pub fn i3cmessage(self) -> &'a mut crate::W<REG> {
93        self.variant(I2c::I3cmessage)
94    }
95    #[doc = "I2C message"]
96    #[inline(always)]
97    pub fn i2cmessage(self) -> &'a mut crate::W<REG> {
98        self.variant(I2c::I2cmessage)
99    }
100}
101#[doc = "Field `LEN` writer - Length"]
102pub type LenW<'a, REG> = crate::FieldWriter<'a, REG, 5>;
103#[cfg(feature = "debug")]
104impl core::fmt::Debug for crate::generic::Reg<MwmsgSdrControlSpec> {
105    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
106        write!(f, "(not readable)")
107    }
108}
109impl W {
110    #[doc = "Bit 0 - Direction"]
111    #[inline(always)]
112    pub fn dir(&mut self) -> DirW<'_, MwmsgSdrControlSpec> {
113        DirW::new(self, 0)
114    }
115    #[doc = "Bits 1:7 - Address"]
116    #[inline(always)]
117    pub fn addr(&mut self) -> AddrW<'_, MwmsgSdrControlSpec> {
118        AddrW::new(self, 1)
119    }
120    #[doc = "Bit 8 - End of SDR Message"]
121    #[inline(always)]
122    pub fn end(&mut self) -> EndW<'_, MwmsgSdrControlSpec> {
123        EndW::new(self, 8)
124    }
125    #[doc = "Bit 10 - I2C"]
126    #[inline(always)]
127    pub fn i2c(&mut self) -> I2cW<'_, MwmsgSdrControlSpec> {
128        I2cW::new(self, 10)
129    }
130    #[doc = "Bits 11:15 - Length"]
131    #[inline(always)]
132    pub fn len(&mut self) -> LenW<'_, MwmsgSdrControlSpec> {
133        LenW::new(self, 11)
134    }
135}
136#[doc = "Controller Write Message Control in SDR mode\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_sdr_control::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
137pub struct MwmsgSdrControlSpec;
138impl crate::RegisterSpec for MwmsgSdrControlSpec {
139    type Ux = u32;
140}
141#[doc = "`write(|w| ..)` method takes [`mwmsg_sdr_control::W`](W) writer structure"]
142impl crate::Writable for MwmsgSdrControlSpec {
143    type Safety = crate::Unsafe;
144}
145#[doc = "`reset()` method sets MWMSG_SDR_CONTROL to value 0"]
146impl crate::Resettable for MwmsgSdrControlSpec {}
mcxa_pac/i3c0/mwmsg_sdr_control.rs

mcxa_pac/i3c0/
mwmsg_sdr_control.rs
