mcxa_pac/eqdc0/
lcomp1.rs

1#[doc = "Register `LCOMP1` writer"]
2pub type W = crate::W<Lcomp1Spec>;
3#[doc = "Field `LCOMP1` writer - LCOMP1"]
4pub type Lcomp1W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
5#[cfg(feature = "debug")]
6impl core::fmt::Debug for crate::generic::Reg<Lcomp1Spec> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bits 0:15 - LCOMP1"]
13    #[inline(always)]
14    pub fn lcomp1(&mut self) -> Lcomp1W<'_, Lcomp1Spec> {
15        Lcomp1W::new(self, 0)
16    }
17}
18#[doc = "Lower Position Compare 1\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcomp1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct Lcomp1Spec;
20impl crate::RegisterSpec for Lcomp1Spec {
21    type Ux = u16;
22}
23#[doc = "`write(|w| ..)` method takes [`lcomp1::W`](W) writer structure"]
24impl crate::Writable for Lcomp1Spec {
25    type Safety = crate::Unsafe;
26}
27#[doc = "`reset()` method sets LCOMP1 to value 0"]
28impl crate::Resettable for Lcomp1Spec {}
mcxa_pac/eqdc0/lcomp1.rs

mcxa_pac/eqdc0/
lcomp1.rs
