mcxa_pac/cmp0/
dcr.rs

1#[doc = "Register `DCR` reader"]
2pub type R = crate::R<DcrSpec>;
3#[doc = "Register `DCR` writer"]
4pub type W = crate::W<DcrSpec>;
5#[doc = "DAC Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum DacEn {
9    #[doc = "0: Disable"]
10    Disable = 0,
11    #[doc = "1: Enable"]
12    Enable = 1,
13}
14impl From<DacEn> for bool {
15    #[inline(always)]
16    fn from(variant: DacEn) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `DAC_EN` reader - DAC Enable"]
21pub type DacEnR = crate::BitReader<DacEn>;
22impl DacEnR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> DacEn {
26        match self.bits {
27            false => DacEn::Disable,
28            true => DacEn::Enable,
29        }
30    }
31    #[doc = "Disable"]
32    #[inline(always)]
33    pub fn is_disable(&self) -> bool {
34        *self == DacEn::Disable
35    }
36    #[doc = "Enable"]
37    #[inline(always)]
38    pub fn is_enable(&self) -> bool {
39        *self == DacEn::Enable
40    }
41}
42#[doc = "Field `DAC_EN` writer - DAC Enable"]
43pub type DacEnW<'a, REG> = crate::BitWriter<'a, REG, DacEn>;
44impl<'a, REG> DacEnW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disable"]
49    #[inline(always)]
50    pub fn disable(self) -> &'a mut crate::W<REG> {
51        self.variant(DacEn::Disable)
52    }
53    #[doc = "Enable"]
54    #[inline(always)]
55    pub fn enable(self) -> &'a mut crate::W<REG> {
56        self.variant(DacEn::Enable)
57    }
58}
59#[doc = "DAC High Power Mode\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum DacHpmd {
63    #[doc = "0: Disable"]
64    Disable = 0,
65    #[doc = "1: Enable"]
66    Enable = 1,
67}
68impl From<DacHpmd> for bool {
69    #[inline(always)]
70    fn from(variant: DacHpmd) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `DAC_HPMD` reader - DAC High Power Mode"]
75pub type DacHpmdR = crate::BitReader<DacHpmd>;
76impl DacHpmdR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> DacHpmd {
80        match self.bits {
81            false => DacHpmd::Disable,
82            true => DacHpmd::Enable,
83        }
84    }
85    #[doc = "Disable"]
86    #[inline(always)]
87    pub fn is_disable(&self) -> bool {
88        *self == DacHpmd::Disable
89    }
90    #[doc = "Enable"]
91    #[inline(always)]
92    pub fn is_enable(&self) -> bool {
93        *self == DacHpmd::Enable
94    }
95}
96#[doc = "Field `DAC_HPMD` writer - DAC High Power Mode"]
97pub type DacHpmdW<'a, REG> = crate::BitWriter<'a, REG, DacHpmd>;
98impl<'a, REG> DacHpmdW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Disable"]
103    #[inline(always)]
104    pub fn disable(self) -> &'a mut crate::W<REG> {
105        self.variant(DacHpmd::Disable)
106    }
107    #[doc = "Enable"]
108    #[inline(always)]
109    pub fn enable(self) -> &'a mut crate::W<REG> {
110        self.variant(DacHpmd::Enable)
111    }
112}
113#[doc = "DAC Reference High Voltage Source Select\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Vrsel {
117    #[doc = "0: VREFH0"]
118    Vref0 = 0,
119    #[doc = "1: VREFH1"]
120    Vref1 = 1,
121}
122impl From<Vrsel> for bool {
123    #[inline(always)]
124    fn from(variant: Vrsel) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `VRSEL` reader - DAC Reference High Voltage Source Select"]
129pub type VrselR = crate::BitReader<Vrsel>;
130impl VrselR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Vrsel {
134        match self.bits {
135            false => Vrsel::Vref0,
136            true => Vrsel::Vref1,
137        }
138    }
139    #[doc = "VREFH0"]
140    #[inline(always)]
141    pub fn is_vref0(&self) -> bool {
142        *self == Vrsel::Vref0
143    }
144    #[doc = "VREFH1"]
145    #[inline(always)]
146    pub fn is_vref1(&self) -> bool {
147        *self == Vrsel::Vref1
148    }
149}
150#[doc = "Field `VRSEL` writer - DAC Reference High Voltage Source Select"]
151pub type VrselW<'a, REG> = crate::BitWriter<'a, REG, Vrsel>;
152impl<'a, REG> VrselW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "VREFH0"]
157    #[inline(always)]
158    pub fn vref0(self) -> &'a mut crate::W<REG> {
159        self.variant(Vrsel::Vref0)
160    }
161    #[doc = "VREFH1"]
162    #[inline(always)]
163    pub fn vref1(self) -> &'a mut crate::W<REG> {
164        self.variant(Vrsel::Vref1)
165    }
166}
167#[doc = "Field `DAC_DATA` reader - DAC Output Voltage Select"]
168pub type DacDataR = crate::FieldReader;
169#[doc = "Field `DAC_DATA` writer - DAC Output Voltage Select"]
170pub type DacDataW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
171impl R {
172    #[doc = "Bit 0 - DAC Enable"]
173    #[inline(always)]
174    pub fn dac_en(&self) -> DacEnR {
175        DacEnR::new((self.bits & 1) != 0)
176    }
177    #[doc = "Bit 1 - DAC High Power Mode"]
178    #[inline(always)]
179    pub fn dac_hpmd(&self) -> DacHpmdR {
180        DacHpmdR::new(((self.bits >> 1) & 1) != 0)
181    }
182    #[doc = "Bit 8 - DAC Reference High Voltage Source Select"]
183    #[inline(always)]
184    pub fn vrsel(&self) -> VrselR {
185        VrselR::new(((self.bits >> 8) & 1) != 0)
186    }
187    #[doc = "Bits 16:23 - DAC Output Voltage Select"]
188    #[inline(always)]
189    pub fn dac_data(&self) -> DacDataR {
190        DacDataR::new(((self.bits >> 16) & 0xff) as u8)
191    }
192}
193#[cfg(feature = "debug")]
194impl core::fmt::Debug for R {
195    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
196        f.debug_struct("DCR")
197            .field("dac_en", &self.dac_en())
198            .field("dac_hpmd", &self.dac_hpmd())
199            .field("vrsel", &self.vrsel())
200            .field("dac_data", &self.dac_data())
201            .finish()
202    }
203}
204impl W {
205    #[doc = "Bit 0 - DAC Enable"]
206    #[inline(always)]
207    pub fn dac_en(&mut self) -> DacEnW<'_, DcrSpec> {
208        DacEnW::new(self, 0)
209    }
210    #[doc = "Bit 1 - DAC High Power Mode"]
211    #[inline(always)]
212    pub fn dac_hpmd(&mut self) -> DacHpmdW<'_, DcrSpec> {
213        DacHpmdW::new(self, 1)
214    }
215    #[doc = "Bit 8 - DAC Reference High Voltage Source Select"]
216    #[inline(always)]
217    pub fn vrsel(&mut self) -> VrselW<'_, DcrSpec> {
218        VrselW::new(self, 8)
219    }
220    #[doc = "Bits 16:23 - DAC Output Voltage Select"]
221    #[inline(always)]
222    pub fn dac_data(&mut self) -> DacDataW<'_, DcrSpec> {
223        DacDataW::new(self, 16)
224    }
225}
226#[doc = "DAC Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dcr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
227pub struct DcrSpec;
228impl crate::RegisterSpec for DcrSpec {
229    type Ux = u32;
230}
231#[doc = "`read()` method returns [`dcr::R`](R) reader structure"]
232impl crate::Readable for DcrSpec {}
233#[doc = "`write(|w| ..)` method takes [`dcr::W`](W) writer structure"]
234impl crate::Writable for DcrSpec {
235    type Safety = crate::Unsafe;
236}
237#[doc = "`reset()` method sets DCR to value 0"]
238impl crate::Resettable for DcrSpec {}
mcxa_pac/cmp0/dcr.rs

mcxa_pac/cmp0/
dcr.rs
