mcxa_pac/can0/
mb5_32b_word1.rs

1#[doc = "Register `MB5_32B_WORD1` reader"]
2pub type R = crate::R<Mb5_32bWord1Spec>;
3#[doc = "Register `MB5_32B_WORD1` writer"]
4pub type W = crate::W<Mb5_32bWord1Spec>;
5#[doc = "Field `DATA_BYTE_7` reader - Data byte 0 of Rx/Tx frame."]
6pub type DataByte7R = crate::FieldReader;
7#[doc = "Field `DATA_BYTE_7` writer - Data byte 0 of Rx/Tx frame."]
8pub type DataByte7W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `DATA_BYTE_6` reader - Data byte 1 of Rx/Tx frame."]
10pub type DataByte6R = crate::FieldReader;
11#[doc = "Field `DATA_BYTE_6` writer - Data byte 1 of Rx/Tx frame."]
12pub type DataByte6W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `DATA_BYTE_5` reader - Data byte 2 of Rx/Tx frame."]
14pub type DataByte5R = crate::FieldReader;
15#[doc = "Field `DATA_BYTE_5` writer - Data byte 2 of Rx/Tx frame."]
16pub type DataByte5W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17#[doc = "Field `DATA_BYTE_4` reader - Data byte 3 of Rx/Tx frame."]
18pub type DataByte4R = crate::FieldReader;
19#[doc = "Field `DATA_BYTE_4` writer - Data byte 3 of Rx/Tx frame."]
20pub type DataByte4W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21impl R {
22    #[doc = "Bits 0:7 - Data byte 0 of Rx/Tx frame."]
23    #[inline(always)]
24    pub fn data_byte_7(&self) -> DataByte7R {
25        DataByte7R::new((self.bits & 0xff) as u8)
26    }
27    #[doc = "Bits 8:15 - Data byte 1 of Rx/Tx frame."]
28    #[inline(always)]
29    pub fn data_byte_6(&self) -> DataByte6R {
30        DataByte6R::new(((self.bits >> 8) & 0xff) as u8)
31    }
32    #[doc = "Bits 16:23 - Data byte 2 of Rx/Tx frame."]
33    #[inline(always)]
34    pub fn data_byte_5(&self) -> DataByte5R {
35        DataByte5R::new(((self.bits >> 16) & 0xff) as u8)
36    }
37    #[doc = "Bits 24:31 - Data byte 3 of Rx/Tx frame."]
38    #[inline(always)]
39    pub fn data_byte_4(&self) -> DataByte4R {
40        DataByte4R::new(((self.bits >> 24) & 0xff) as u8)
41    }
42}
43#[cfg(feature = "debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("MB5_32B_WORD1")
47            .field("data_byte_7", &self.data_byte_7())
48            .field("data_byte_6", &self.data_byte_6())
49            .field("data_byte_5", &self.data_byte_5())
50            .field("data_byte_4", &self.data_byte_4())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bits 0:7 - Data byte 0 of Rx/Tx frame."]
56    #[inline(always)]
57    pub fn data_byte_7(&mut self) -> DataByte7W<'_, Mb5_32bWord1Spec> {
58        DataByte7W::new(self, 0)
59    }
60    #[doc = "Bits 8:15 - Data byte 1 of Rx/Tx frame."]
61    #[inline(always)]
62    pub fn data_byte_6(&mut self) -> DataByte6W<'_, Mb5_32bWord1Spec> {
63        DataByte6W::new(self, 8)
64    }
65    #[doc = "Bits 16:23 - Data byte 2 of Rx/Tx frame."]
66    #[inline(always)]
67    pub fn data_byte_5(&mut self) -> DataByte5W<'_, Mb5_32bWord1Spec> {
68        DataByte5W::new(self, 16)
69    }
70    #[doc = "Bits 24:31 - Data byte 3 of Rx/Tx frame."]
71    #[inline(always)]
72    pub fn data_byte_4(&mut self) -> DataByte4W<'_, Mb5_32bWord1Spec> {
73        DataByte4W::new(self, 24)
74    }
75}
76#[doc = "Message Buffer 5 WORD_32B Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mb5_32b_word1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mb5_32b_word1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct Mb5_32bWord1Spec;
78impl crate::RegisterSpec for Mb5_32bWord1Spec {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`mb5_32b_word1::R`](R) reader structure"]
82impl crate::Readable for Mb5_32bWord1Spec {}
83#[doc = "`write(|w| ..)` method takes [`mb5_32b_word1::W`](W) writer structure"]
84impl crate::Writable for Mb5_32bWord1Spec {
85    type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets MB5_32B_WORD1 to value 0"]
88impl crate::Resettable for Mb5_32bWord1Spec {}
mcxa_pac/can0/mb5_32b_word1.rs

mcxa_pac/can0/
mb5_32b_word1.rs
