mcxa_pac/can0/
ctrl2.rs

1#[doc = "Register `CTRL2` reader"]
2pub type R = crate::R<Ctrl2Spec>;
3#[doc = "Register `CTRL2` writer"]
4pub type W = crate::W<Ctrl2Spec>;
5#[doc = "Payload Byte and Bit Order Selection\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Pes {
9    #[doc = "0: Big-endian"]
10    BigEnd = 0,
11    #[doc = "1: Little-endian"]
12    LittleEnd = 1,
13}
14impl From<Pes> for bool {
15    #[inline(always)]
16    fn from(variant: Pes) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `PES` reader - Payload Byte and Bit Order Selection"]
21pub type PesR = crate::BitReader<Pes>;
22impl PesR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Pes {
26        match self.bits {
27            false => Pes::BigEnd,
28            true => Pes::LittleEnd,
29        }
30    }
31    #[doc = "Big-endian"]
32    #[inline(always)]
33    pub fn is_big_end(&self) -> bool {
34        *self == Pes::BigEnd
35    }
36    #[doc = "Little-endian"]
37    #[inline(always)]
38    pub fn is_little_end(&self) -> bool {
39        *self == Pes::LittleEnd
40    }
41}
42#[doc = "Field `PES` writer - Payload Byte and Bit Order Selection"]
43pub type PesW<'a, REG> = crate::BitWriter<'a, REG, Pes>;
44impl<'a, REG> PesW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Big-endian"]
49    #[inline(always)]
50    pub fn big_end(self) -> &'a mut crate::W<REG> {
51        self.variant(Pes::BigEnd)
52    }
53    #[doc = "Little-endian"]
54    #[inline(always)]
55    pub fn little_end(self) -> &'a mut crate::W<REG> {
56        self.variant(Pes::LittleEnd)
57    }
58}
59#[doc = "ACK Suppression Disable\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Asd {
63    #[doc = "0: Enabled"]
64    Enable = 0,
65    #[doc = "1: Disabled"]
66    Disable = 1,
67}
68impl From<Asd> for bool {
69    #[inline(always)]
70    fn from(variant: Asd) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `ASD` reader - ACK Suppression Disable"]
75pub type AsdR = crate::BitReader<Asd>;
76impl AsdR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Asd {
80        match self.bits {
81            false => Asd::Enable,
82            true => Asd::Disable,
83        }
84    }
85    #[doc = "Enabled"]
86    #[inline(always)]
87    pub fn is_enable(&self) -> bool {
88        *self == Asd::Enable
89    }
90    #[doc = "Disabled"]
91    #[inline(always)]
92    pub fn is_disable(&self) -> bool {
93        *self == Asd::Disable
94    }
95}
96#[doc = "Field `ASD` writer - ACK Suppression Disable"]
97pub type AsdW<'a, REG> = crate::BitWriter<'a, REG, Asd>;
98impl<'a, REG> AsdW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Enabled"]
103    #[inline(always)]
104    pub fn enable(self) -> &'a mut crate::W<REG> {
105        self.variant(Asd::Enable)
106    }
107    #[doc = "Disabled"]
108    #[inline(always)]
109    pub fn disable(self) -> &'a mut crate::W<REG> {
110        self.variant(Asd::Disable)
111    }
112}
113#[doc = "Edge Filter Disable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Edfltdis {
117    #[doc = "0: Enabled"]
118    Enable = 0,
119    #[doc = "1: Disabled"]
120    Disable = 1,
121}
122impl From<Edfltdis> for bool {
123    #[inline(always)]
124    fn from(variant: Edfltdis) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `EDFLTDIS` reader - Edge Filter Disable"]
129pub type EdfltdisR = crate::BitReader<Edfltdis>;
130impl EdfltdisR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Edfltdis {
134        match self.bits {
135            false => Edfltdis::Enable,
136            true => Edfltdis::Disable,
137        }
138    }
139    #[doc = "Enabled"]
140    #[inline(always)]
141    pub fn is_enable(&self) -> bool {
142        *self == Edfltdis::Enable
143    }
144    #[doc = "Disabled"]
145    #[inline(always)]
146    pub fn is_disable(&self) -> bool {
147        *self == Edfltdis::Disable
148    }
149}
150#[doc = "Field `EDFLTDIS` writer - Edge Filter Disable"]
151pub type EdfltdisW<'a, REG> = crate::BitWriter<'a, REG, Edfltdis>;
152impl<'a, REG> EdfltdisW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Enabled"]
157    #[inline(always)]
158    pub fn enable(self) -> &'a mut crate::W<REG> {
159        self.variant(Edfltdis::Enable)
160    }
161    #[doc = "Disabled"]
162    #[inline(always)]
163    pub fn disable(self) -> &'a mut crate::W<REG> {
164        self.variant(Edfltdis::Disable)
165    }
166}
167#[doc = "ISO CAN FD Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Isocanfden {
171    #[doc = "0: Disable"]
172    NonIso = 0,
173    #[doc = "1: Enable"]
174    Iso = 1,
175}
176impl From<Isocanfden> for bool {
177    #[inline(always)]
178    fn from(variant: Isocanfden) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `ISOCANFDEN` reader - ISO CAN FD Enable"]
183pub type IsocanfdenR = crate::BitReader<Isocanfden>;
184impl IsocanfdenR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Isocanfden {
188        match self.bits {
189            false => Isocanfden::NonIso,
190            true => Isocanfden::Iso,
191        }
192    }
193    #[doc = "Disable"]
194    #[inline(always)]
195    pub fn is_non_iso(&self) -> bool {
196        *self == Isocanfden::NonIso
197    }
198    #[doc = "Enable"]
199    #[inline(always)]
200    pub fn is_iso(&self) -> bool {
201        *self == Isocanfden::Iso
202    }
203}
204#[doc = "Field `ISOCANFDEN` writer - ISO CAN FD Enable"]
205pub type IsocanfdenW<'a, REG> = crate::BitWriter<'a, REG, Isocanfden>;
206impl<'a, REG> IsocanfdenW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Disable"]
211    #[inline(always)]
212    pub fn non_iso(self) -> &'a mut crate::W<REG> {
213        self.variant(Isocanfden::NonIso)
214    }
215    #[doc = "Enable"]
216    #[inline(always)]
217    pub fn iso(self) -> &'a mut crate::W<REG> {
218        self.variant(Isocanfden::Iso)
219    }
220}
221#[doc = "Bit Timing Expansion Enable\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Bte {
225    #[doc = "0: Disable"]
226    Disable = 0,
227    #[doc = "1: Enable"]
228    Enable = 1,
229}
230impl From<Bte> for bool {
231    #[inline(always)]
232    fn from(variant: Bte) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `BTE` reader - Bit Timing Expansion Enable"]
237pub type BteR = crate::BitReader<Bte>;
238impl BteR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Bte {
242        match self.bits {
243            false => Bte::Disable,
244            true => Bte::Enable,
245        }
246    }
247    #[doc = "Disable"]
248    #[inline(always)]
249    pub fn is_disable(&self) -> bool {
250        *self == Bte::Disable
251    }
252    #[doc = "Enable"]
253    #[inline(always)]
254    pub fn is_enable(&self) -> bool {
255        *self == Bte::Enable
256    }
257}
258#[doc = "Field `BTE` writer - Bit Timing Expansion Enable"]
259pub type BteW<'a, REG> = crate::BitWriter<'a, REG, Bte>;
260impl<'a, REG> BteW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Disable"]
265    #[inline(always)]
266    pub fn disable(self) -> &'a mut crate::W<REG> {
267        self.variant(Bte::Disable)
268    }
269    #[doc = "Enable"]
270    #[inline(always)]
271    pub fn enable(self) -> &'a mut crate::W<REG> {
272        self.variant(Bte::Enable)
273    }
274}
275#[doc = "Protocol Exception Enable\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Prexcen {
279    #[doc = "0: Disabled"]
280    Disable = 0,
281    #[doc = "1: Enabled"]
282    Enable = 1,
283}
284impl From<Prexcen> for bool {
285    #[inline(always)]
286    fn from(variant: Prexcen) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `PREXCEN` reader - Protocol Exception Enable"]
291pub type PrexcenR = crate::BitReader<Prexcen>;
292impl PrexcenR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Prexcen {
296        match self.bits {
297            false => Prexcen::Disable,
298            true => Prexcen::Enable,
299        }
300    }
301    #[doc = "Disabled"]
302    #[inline(always)]
303    pub fn is_disable(&self) -> bool {
304        *self == Prexcen::Disable
305    }
306    #[doc = "Enabled"]
307    #[inline(always)]
308    pub fn is_enable(&self) -> bool {
309        *self == Prexcen::Enable
310    }
311}
312#[doc = "Field `PREXCEN` writer - Protocol Exception Enable"]
313pub type PrexcenW<'a, REG> = crate::BitWriter<'a, REG, Prexcen>;
314impl<'a, REG> PrexcenW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "Disabled"]
319    #[inline(always)]
320    pub fn disable(self) -> &'a mut crate::W<REG> {
321        self.variant(Prexcen::Disable)
322    }
323    #[doc = "Enabled"]
324    #[inline(always)]
325    pub fn enable(self) -> &'a mut crate::W<REG> {
326        self.variant(Prexcen::Enable)
327    }
328}
329#[doc = "Entire Frame Arbitration Field Comparison Enable for RX Message Buffers\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Eacen {
333    #[doc = "0: Disable"]
334    RtrCompareNo = 0,
335    #[doc = "1: Enable"]
336    RtrCompareYes = 1,
337}
338impl From<Eacen> for bool {
339    #[inline(always)]
340    fn from(variant: Eacen) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `EACEN` reader - Entire Frame Arbitration Field Comparison Enable for RX Message Buffers"]
345pub type EacenR = crate::BitReader<Eacen>;
346impl EacenR {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> Eacen {
350        match self.bits {
351            false => Eacen::RtrCompareNo,
352            true => Eacen::RtrCompareYes,
353        }
354    }
355    #[doc = "Disable"]
356    #[inline(always)]
357    pub fn is_rtr_compare_no(&self) -> bool {
358        *self == Eacen::RtrCompareNo
359    }
360    #[doc = "Enable"]
361    #[inline(always)]
362    pub fn is_rtr_compare_yes(&self) -> bool {
363        *self == Eacen::RtrCompareYes
364    }
365}
366#[doc = "Field `EACEN` writer - Entire Frame Arbitration Field Comparison Enable for RX Message Buffers"]
367pub type EacenW<'a, REG> = crate::BitWriter<'a, REG, Eacen>;
368impl<'a, REG> EacenW<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "Disable"]
373    #[inline(always)]
374    pub fn rtr_compare_no(self) -> &'a mut crate::W<REG> {
375        self.variant(Eacen::RtrCompareNo)
376    }
377    #[doc = "Enable"]
378    #[inline(always)]
379    pub fn rtr_compare_yes(self) -> &'a mut crate::W<REG> {
380        self.variant(Eacen::RtrCompareYes)
381    }
382}
383#[doc = "Remote Request Storing\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Rrs {
387    #[doc = "0: Generated"]
388    RemoteResponseFrameNotGenerated = 0,
389    #[doc = "1: Stored"]
390    RemoteResponseFrameGenerated = 1,
391}
392impl From<Rrs> for bool {
393    #[inline(always)]
394    fn from(variant: Rrs) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `RRS` reader - Remote Request Storing"]
399pub type RrsR = crate::BitReader<Rrs>;
400impl RrsR {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> Rrs {
404        match self.bits {
405            false => Rrs::RemoteResponseFrameNotGenerated,
406            true => Rrs::RemoteResponseFrameGenerated,
407        }
408    }
409    #[doc = "Generated"]
410    #[inline(always)]
411    pub fn is_remote_response_frame_not_generated(&self) -> bool {
412        *self == Rrs::RemoteResponseFrameNotGenerated
413    }
414    #[doc = "Stored"]
415    #[inline(always)]
416    pub fn is_remote_response_frame_generated(&self) -> bool {
417        *self == Rrs::RemoteResponseFrameGenerated
418    }
419}
420#[doc = "Field `RRS` writer - Remote Request Storing"]
421pub type RrsW<'a, REG> = crate::BitWriter<'a, REG, Rrs>;
422impl<'a, REG> RrsW<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "Generated"]
427    #[inline(always)]
428    pub fn remote_response_frame_not_generated(self) -> &'a mut crate::W<REG> {
429        self.variant(Rrs::RemoteResponseFrameNotGenerated)
430    }
431    #[doc = "Stored"]
432    #[inline(always)]
433    pub fn remote_response_frame_generated(self) -> &'a mut crate::W<REG> {
434        self.variant(Rrs::RemoteResponseFrameGenerated)
435    }
436}
437#[doc = "Message Buffers Reception Priority\n\nValue on reset: 0"]
438#[cfg_attr(feature = "defmt", derive(defmt::Format))]
439#[derive(Clone, Copy, Debug, PartialEq, Eq)]
440pub enum Mrp {
441    #[doc = "0: Matching starts from Legacy RX FIFO or Enhanced RX FIFO and continues on message buffers."]
442    Id1 = 0,
443    #[doc = "1: Matching starts from message buffers and continues on Legacy RX FIFO or Enhanced RX FIFO."]
444    Id3 = 1,
445}
446impl From<Mrp> for bool {
447    #[inline(always)]
448    fn from(variant: Mrp) -> Self {
449        variant as u8 != 0
450    }
451}
452#[doc = "Field `MRP` reader - Message Buffers Reception Priority"]
453pub type MrpR = crate::BitReader<Mrp>;
454impl MrpR {
455    #[doc = "Get enumerated values variant"]
456    #[inline(always)]
457    pub const fn variant(&self) -> Mrp {
458        match self.bits {
459            false => Mrp::Id1,
460            true => Mrp::Id3,
461        }
462    }
463    #[doc = "Matching starts from Legacy RX FIFO or Enhanced RX FIFO and continues on message buffers."]
464    #[inline(always)]
465    pub fn is_id1(&self) -> bool {
466        *self == Mrp::Id1
467    }
468    #[doc = "Matching starts from message buffers and continues on Legacy RX FIFO or Enhanced RX FIFO."]
469    #[inline(always)]
470    pub fn is_id3(&self) -> bool {
471        *self == Mrp::Id3
472    }
473}
474#[doc = "Field `MRP` writer - Message Buffers Reception Priority"]
475pub type MrpW<'a, REG> = crate::BitWriter<'a, REG, Mrp>;
476impl<'a, REG> MrpW<'a, REG>
477where
478    REG: crate::Writable + crate::RegisterSpec,
479{
480    #[doc = "Matching starts from Legacy RX FIFO or Enhanced RX FIFO and continues on message buffers."]
481    #[inline(always)]
482    pub fn id1(self) -> &'a mut crate::W<REG> {
483        self.variant(Mrp::Id1)
484    }
485    #[doc = "Matching starts from message buffers and continues on Legacy RX FIFO or Enhanced RX FIFO."]
486    #[inline(always)]
487    pub fn id3(self) -> &'a mut crate::W<REG> {
488        self.variant(Mrp::Id3)
489    }
490}
491#[doc = "Field `TASD` reader - Transmission Arbitration Start Delay"]
492pub type TasdR = crate::FieldReader;
493#[doc = "Field `TASD` writer - Transmission Arbitration Start Delay"]
494pub type TasdW<'a, REG> = crate::FieldWriter<'a, REG, 5>;
495#[doc = "Field `RFFN` reader - Number of Legacy Receive FIFO Filters"]
496pub type RffnR = crate::FieldReader;
497#[doc = "Field `RFFN` writer - Number of Legacy Receive FIFO Filters"]
498pub type RffnW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
499#[doc = "Bus Off Done Interrupt Mask\n\nValue on reset: 0"]
500#[cfg_attr(feature = "defmt", derive(defmt::Format))]
501#[derive(Clone, Copy, Debug, PartialEq, Eq)]
502pub enum Boffdonemsk {
503    #[doc = "0: Disable"]
504    Disable = 0,
505    #[doc = "1: Enable"]
506    Enable = 1,
507}
508impl From<Boffdonemsk> for bool {
509    #[inline(always)]
510    fn from(variant: Boffdonemsk) -> Self {
511        variant as u8 != 0
512    }
513}
514#[doc = "Field `BOFFDONEMSK` reader - Bus Off Done Interrupt Mask"]
515pub type BoffdonemskR = crate::BitReader<Boffdonemsk>;
516impl BoffdonemskR {
517    #[doc = "Get enumerated values variant"]
518    #[inline(always)]
519    pub const fn variant(&self) -> Boffdonemsk {
520        match self.bits {
521            false => Boffdonemsk::Disable,
522            true => Boffdonemsk::Enable,
523        }
524    }
525    #[doc = "Disable"]
526    #[inline(always)]
527    pub fn is_disable(&self) -> bool {
528        *self == Boffdonemsk::Disable
529    }
530    #[doc = "Enable"]
531    #[inline(always)]
532    pub fn is_enable(&self) -> bool {
533        *self == Boffdonemsk::Enable
534    }
535}
536#[doc = "Field `BOFFDONEMSK` writer - Bus Off Done Interrupt Mask"]
537pub type BoffdonemskW<'a, REG> = crate::BitWriter<'a, REG, Boffdonemsk>;
538impl<'a, REG> BoffdonemskW<'a, REG>
539where
540    REG: crate::Writable + crate::RegisterSpec,
541{
542    #[doc = "Disable"]
543    #[inline(always)]
544    pub fn disable(self) -> &'a mut crate::W<REG> {
545        self.variant(Boffdonemsk::Disable)
546    }
547    #[doc = "Enable"]
548    #[inline(always)]
549    pub fn enable(self) -> &'a mut crate::W<REG> {
550        self.variant(Boffdonemsk::Enable)
551    }
552}
553#[doc = "Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames\n\nValue on reset: 0"]
554#[cfg_attr(feature = "defmt", derive(defmt::Format))]
555#[derive(Clone, Copy, Debug, PartialEq, Eq)]
556pub enum ErrmskFast {
557    #[doc = "0: Disable"]
558    Disable = 0,
559    #[doc = "1: Enable"]
560    Enable = 1,
561}
562impl From<ErrmskFast> for bool {
563    #[inline(always)]
564    fn from(variant: ErrmskFast) -> Self {
565        variant as u8 != 0
566    }
567}
568#[doc = "Field `ERRMSK_FAST` reader - Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames"]
569pub type ErrmskFastR = crate::BitReader<ErrmskFast>;
570impl ErrmskFastR {
571    #[doc = "Get enumerated values variant"]
572    #[inline(always)]
573    pub const fn variant(&self) -> ErrmskFast {
574        match self.bits {
575            false => ErrmskFast::Disable,
576            true => ErrmskFast::Enable,
577        }
578    }
579    #[doc = "Disable"]
580    #[inline(always)]
581    pub fn is_disable(&self) -> bool {
582        *self == ErrmskFast::Disable
583    }
584    #[doc = "Enable"]
585    #[inline(always)]
586    pub fn is_enable(&self) -> bool {
587        *self == ErrmskFast::Enable
588    }
589}
590#[doc = "Field `ERRMSK_FAST` writer - Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames"]
591pub type ErrmskFastW<'a, REG> = crate::BitWriter<'a, REG, ErrmskFast>;
592impl<'a, REG> ErrmskFastW<'a, REG>
593where
594    REG: crate::Writable + crate::RegisterSpec,
595{
596    #[doc = "Disable"]
597    #[inline(always)]
598    pub fn disable(self) -> &'a mut crate::W<REG> {
599        self.variant(ErrmskFast::Disable)
600    }
601    #[doc = "Enable"]
602    #[inline(always)]
603    pub fn enable(self) -> &'a mut crate::W<REG> {
604        self.variant(ErrmskFast::Enable)
605    }
606}
607impl R {
608    #[doc = "Bit 0 - Payload Byte and Bit Order Selection"]
609    #[inline(always)]
610    pub fn pes(&self) -> PesR {
611        PesR::new((self.bits & 1) != 0)
612    }
613    #[doc = "Bit 1 - ACK Suppression Disable"]
614    #[inline(always)]
615    pub fn asd(&self) -> AsdR {
616        AsdR::new(((self.bits >> 1) & 1) != 0)
617    }
618    #[doc = "Bit 11 - Edge Filter Disable"]
619    #[inline(always)]
620    pub fn edfltdis(&self) -> EdfltdisR {
621        EdfltdisR::new(((self.bits >> 11) & 1) != 0)
622    }
623    #[doc = "Bit 12 - ISO CAN FD Enable"]
624    #[inline(always)]
625    pub fn isocanfden(&self) -> IsocanfdenR {
626        IsocanfdenR::new(((self.bits >> 12) & 1) != 0)
627    }
628    #[doc = "Bit 13 - Bit Timing Expansion Enable"]
629    #[inline(always)]
630    pub fn bte(&self) -> BteR {
631        BteR::new(((self.bits >> 13) & 1) != 0)
632    }
633    #[doc = "Bit 14 - Protocol Exception Enable"]
634    #[inline(always)]
635    pub fn prexcen(&self) -> PrexcenR {
636        PrexcenR::new(((self.bits >> 14) & 1) != 0)
637    }
638    #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable for RX Message Buffers"]
639    #[inline(always)]
640    pub fn eacen(&self) -> EacenR {
641        EacenR::new(((self.bits >> 16) & 1) != 0)
642    }
643    #[doc = "Bit 17 - Remote Request Storing"]
644    #[inline(always)]
645    pub fn rrs(&self) -> RrsR {
646        RrsR::new(((self.bits >> 17) & 1) != 0)
647    }
648    #[doc = "Bit 18 - Message Buffers Reception Priority"]
649    #[inline(always)]
650    pub fn mrp(&self) -> MrpR {
651        MrpR::new(((self.bits >> 18) & 1) != 0)
652    }
653    #[doc = "Bits 19:23 - Transmission Arbitration Start Delay"]
654    #[inline(always)]
655    pub fn tasd(&self) -> TasdR {
656        TasdR::new(((self.bits >> 19) & 0x1f) as u8)
657    }
658    #[doc = "Bits 24:27 - Number of Legacy Receive FIFO Filters"]
659    #[inline(always)]
660    pub fn rffn(&self) -> RffnR {
661        RffnR::new(((self.bits >> 24) & 0x0f) as u8)
662    }
663    #[doc = "Bit 30 - Bus Off Done Interrupt Mask"]
664    #[inline(always)]
665    pub fn boffdonemsk(&self) -> BoffdonemskR {
666        BoffdonemskR::new(((self.bits >> 30) & 1) != 0)
667    }
668    #[doc = "Bit 31 - Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames"]
669    #[inline(always)]
670    pub fn errmsk_fast(&self) -> ErrmskFastR {
671        ErrmskFastR::new(((self.bits >> 31) & 1) != 0)
672    }
673}
674#[cfg(feature = "debug")]
675impl core::fmt::Debug for R {
676    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
677        f.debug_struct("CTRL2")
678            .field("pes", &self.pes())
679            .field("asd", &self.asd())
680            .field("edfltdis", &self.edfltdis())
681            .field("isocanfden", &self.isocanfden())
682            .field("bte", &self.bte())
683            .field("prexcen", &self.prexcen())
684            .field("eacen", &self.eacen())
685            .field("rrs", &self.rrs())
686            .field("mrp", &self.mrp())
687            .field("tasd", &self.tasd())
688            .field("rffn", &self.rffn())
689            .field("boffdonemsk", &self.boffdonemsk())
690            .field("errmsk_fast", &self.errmsk_fast())
691            .finish()
692    }
693}
694impl W {
695    #[doc = "Bit 0 - Payload Byte and Bit Order Selection"]
696    #[inline(always)]
697    pub fn pes(&mut self) -> PesW<'_, Ctrl2Spec> {
698        PesW::new(self, 0)
699    }
700    #[doc = "Bit 1 - ACK Suppression Disable"]
701    #[inline(always)]
702    pub fn asd(&mut self) -> AsdW<'_, Ctrl2Spec> {
703        AsdW::new(self, 1)
704    }
705    #[doc = "Bit 11 - Edge Filter Disable"]
706    #[inline(always)]
707    pub fn edfltdis(&mut self) -> EdfltdisW<'_, Ctrl2Spec> {
708        EdfltdisW::new(self, 11)
709    }
710    #[doc = "Bit 12 - ISO CAN FD Enable"]
711    #[inline(always)]
712    pub fn isocanfden(&mut self) -> IsocanfdenW<'_, Ctrl2Spec> {
713        IsocanfdenW::new(self, 12)
714    }
715    #[doc = "Bit 13 - Bit Timing Expansion Enable"]
716    #[inline(always)]
717    pub fn bte(&mut self) -> BteW<'_, Ctrl2Spec> {
718        BteW::new(self, 13)
719    }
720    #[doc = "Bit 14 - Protocol Exception Enable"]
721    #[inline(always)]
722    pub fn prexcen(&mut self) -> PrexcenW<'_, Ctrl2Spec> {
723        PrexcenW::new(self, 14)
724    }
725    #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable for RX Message Buffers"]
726    #[inline(always)]
727    pub fn eacen(&mut self) -> EacenW<'_, Ctrl2Spec> {
728        EacenW::new(self, 16)
729    }
730    #[doc = "Bit 17 - Remote Request Storing"]
731    #[inline(always)]
732    pub fn rrs(&mut self) -> RrsW<'_, Ctrl2Spec> {
733        RrsW::new(self, 17)
734    }
735    #[doc = "Bit 18 - Message Buffers Reception Priority"]
736    #[inline(always)]
737    pub fn mrp(&mut self) -> MrpW<'_, Ctrl2Spec> {
738        MrpW::new(self, 18)
739    }
740    #[doc = "Bits 19:23 - Transmission Arbitration Start Delay"]
741    #[inline(always)]
742    pub fn tasd(&mut self) -> TasdW<'_, Ctrl2Spec> {
743        TasdW::new(self, 19)
744    }
745    #[doc = "Bits 24:27 - Number of Legacy Receive FIFO Filters"]
746    #[inline(always)]
747    pub fn rffn(&mut self) -> RffnW<'_, Ctrl2Spec> {
748        RffnW::new(self, 24)
749    }
750    #[doc = "Bit 30 - Bus Off Done Interrupt Mask"]
751    #[inline(always)]
752    pub fn boffdonemsk(&mut self) -> BoffdonemskW<'_, Ctrl2Spec> {
753        BoffdonemskW::new(self, 30)
754    }
755    #[doc = "Bit 31 - Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames"]
756    #[inline(always)]
757    pub fn errmsk_fast(&mut self) -> ErrmskFastW<'_, Ctrl2Spec> {
758        ErrmskFastW::new(self, 31)
759    }
760}
761#[doc = "Control 2\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
762pub struct Ctrl2Spec;
763impl crate::RegisterSpec for Ctrl2Spec {
764    type Ux = u32;
765}
766#[doc = "`read()` method returns [`ctrl2::R`](R) reader structure"]
767impl crate::Readable for Ctrl2Spec {}
768#[doc = "`write(|w| ..)` method takes [`ctrl2::W`](W) writer structure"]
769impl crate::Writable for Ctrl2Spec {
770    type Safety = crate::Unsafe;
771}
772#[doc = "`reset()` method sets CTRL2 to value 0x00a0_0000"]
773impl crate::Resettable for Ctrl2Spec {
774    const RESET_VALUE: u32 = 0x00a0_0000;
775}
mcxa_pac/can0/ctrl2.rs

mcxa_pac/can0/
ctrl2.rs
