1#[doc = "Register `STALL_OH_DIS` reader"]
2pub type R = crate::R<StallOhDisSpec>;
3#[doc = "Register `STALL_OH_DIS` writer"]
4pub type W = crate::W<StallOhDisSpec>;
5#[doc = "Disable Endpoint 8 OUT Direction\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum StallODis8 {
9 #[doc = "0: Enable"]
10 EnEp8OutStall = 0,
11 #[doc = "1: Disable"]
12 DisEp8OutStall = 1,
13}
14impl From<StallODis8> for bool {
15 #[inline(always)]
16 fn from(variant: StallODis8) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `STALL_O_DIS8` reader - Disable Endpoint 8 OUT Direction"]
21pub type StallODis8R = crate::BitReader<StallODis8>;
22impl StallODis8R {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> StallODis8 {
26 match self.bits {
27 false => StallODis8::EnEp8OutStall,
28 true => StallODis8::DisEp8OutStall,
29 }
30 }
31 #[doc = "Enable"]
32 #[inline(always)]
33 pub fn is_en_ep8_out_stall(&self) -> bool {
34 *self == StallODis8::EnEp8OutStall
35 }
36 #[doc = "Disable"]
37 #[inline(always)]
38 pub fn is_dis_ep8_out_stall(&self) -> bool {
39 *self == StallODis8::DisEp8OutStall
40 }
41}
42#[doc = "Field `STALL_O_DIS8` writer - Disable Endpoint 8 OUT Direction"]
43pub type StallODis8W<'a, REG> = crate::BitWriter<'a, REG, StallODis8>;
44impl<'a, REG> StallODis8W<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Enable"]
49 #[inline(always)]
50 pub fn en_ep8_out_stall(self) -> &'a mut crate::W<REG> {
51 self.variant(StallODis8::EnEp8OutStall)
52 }
53 #[doc = "Disable"]
54 #[inline(always)]
55 pub fn dis_ep8_out_stall(self) -> &'a mut crate::W<REG> {
56 self.variant(StallODis8::DisEp8OutStall)
57 }
58}
59#[doc = "Disable Endpoint 9 OUT Direction\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum StallODis9 {
63 #[doc = "0: Enable"]
64 EnEp9OutStall = 0,
65 #[doc = "1: Disable"]
66 DisEp9OutStall = 1,
67}
68impl From<StallODis9> for bool {
69 #[inline(always)]
70 fn from(variant: StallODis9) -> Self {
71 variant as u8 != 0
72 }
73}
74#[doc = "Field `STALL_O_DIS9` reader - Disable Endpoint 9 OUT Direction"]
75pub type StallODis9R = crate::BitReader<StallODis9>;
76impl StallODis9R {
77 #[doc = "Get enumerated values variant"]
78 #[inline(always)]
79 pub const fn variant(&self) -> StallODis9 {
80 match self.bits {
81 false => StallODis9::EnEp9OutStall,
82 true => StallODis9::DisEp9OutStall,
83 }
84 }
85 #[doc = "Enable"]
86 #[inline(always)]
87 pub fn is_en_ep9_out_stall(&self) -> bool {
88 *self == StallODis9::EnEp9OutStall
89 }
90 #[doc = "Disable"]
91 #[inline(always)]
92 pub fn is_dis_ep9_out_stall(&self) -> bool {
93 *self == StallODis9::DisEp9OutStall
94 }
95}
96#[doc = "Field `STALL_O_DIS9` writer - Disable Endpoint 9 OUT Direction"]
97pub type StallODis9W<'a, REG> = crate::BitWriter<'a, REG, StallODis9>;
98impl<'a, REG> StallODis9W<'a, REG>
99where
100 REG: crate::Writable + crate::RegisterSpec,
101{
102 #[doc = "Enable"]
103 #[inline(always)]
104 pub fn en_ep9_out_stall(self) -> &'a mut crate::W<REG> {
105 self.variant(StallODis9::EnEp9OutStall)
106 }
107 #[doc = "Disable"]
108 #[inline(always)]
109 pub fn dis_ep9_out_stall(self) -> &'a mut crate::W<REG> {
110 self.variant(StallODis9::DisEp9OutStall)
111 }
112}
113#[doc = "Disable Endpoint 10 OUT Direction\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum StallODis10 {
117 #[doc = "0: Enable"]
118 EnEp10OutStall = 0,
119 #[doc = "1: Disable"]
120 DisEp10OutStall = 1,
121}
122impl From<StallODis10> for bool {
123 #[inline(always)]
124 fn from(variant: StallODis10) -> Self {
125 variant as u8 != 0
126 }
127}
128#[doc = "Field `STALL_O_DIS10` reader - Disable Endpoint 10 OUT Direction"]
129pub type StallODis10R = crate::BitReader<StallODis10>;
130impl StallODis10R {
131 #[doc = "Get enumerated values variant"]
132 #[inline(always)]
133 pub const fn variant(&self) -> StallODis10 {
134 match self.bits {
135 false => StallODis10::EnEp10OutStall,
136 true => StallODis10::DisEp10OutStall,
137 }
138 }
139 #[doc = "Enable"]
140 #[inline(always)]
141 pub fn is_en_ep10_out_stall(&self) -> bool {
142 *self == StallODis10::EnEp10OutStall
143 }
144 #[doc = "Disable"]
145 #[inline(always)]
146 pub fn is_dis_ep10_out_stall(&self) -> bool {
147 *self == StallODis10::DisEp10OutStall
148 }
149}
150#[doc = "Field `STALL_O_DIS10` writer - Disable Endpoint 10 OUT Direction"]
151pub type StallODis10W<'a, REG> = crate::BitWriter<'a, REG, StallODis10>;
152impl<'a, REG> StallODis10W<'a, REG>
153where
154 REG: crate::Writable + crate::RegisterSpec,
155{
156 #[doc = "Enable"]
157 #[inline(always)]
158 pub fn en_ep10_out_stall(self) -> &'a mut crate::W<REG> {
159 self.variant(StallODis10::EnEp10OutStall)
160 }
161 #[doc = "Disable"]
162 #[inline(always)]
163 pub fn dis_ep10_out_stall(self) -> &'a mut crate::W<REG> {
164 self.variant(StallODis10::DisEp10OutStall)
165 }
166}
167#[doc = "Disable Endpoint 11 OUT Direction\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum StallODis11 {
171 #[doc = "0: Enable"]
172 EnEp11OutStall = 0,
173 #[doc = "1: Disable"]
174 DisEp11OutStall = 1,
175}
176impl From<StallODis11> for bool {
177 #[inline(always)]
178 fn from(variant: StallODis11) -> Self {
179 variant as u8 != 0
180 }
181}
182#[doc = "Field `STALL_O_DIS11` reader - Disable Endpoint 11 OUT Direction"]
183pub type StallODis11R = crate::BitReader<StallODis11>;
184impl StallODis11R {
185 #[doc = "Get enumerated values variant"]
186 #[inline(always)]
187 pub const fn variant(&self) -> StallODis11 {
188 match self.bits {
189 false => StallODis11::EnEp11OutStall,
190 true => StallODis11::DisEp11OutStall,
191 }
192 }
193 #[doc = "Enable"]
194 #[inline(always)]
195 pub fn is_en_ep11_out_stall(&self) -> bool {
196 *self == StallODis11::EnEp11OutStall
197 }
198 #[doc = "Disable"]
199 #[inline(always)]
200 pub fn is_dis_ep11_out_stall(&self) -> bool {
201 *self == StallODis11::DisEp11OutStall
202 }
203}
204#[doc = "Field `STALL_O_DIS11` writer - Disable Endpoint 11 OUT Direction"]
205pub type StallODis11W<'a, REG> = crate::BitWriter<'a, REG, StallODis11>;
206impl<'a, REG> StallODis11W<'a, REG>
207where
208 REG: crate::Writable + crate::RegisterSpec,
209{
210 #[doc = "Enable"]
211 #[inline(always)]
212 pub fn en_ep11_out_stall(self) -> &'a mut crate::W<REG> {
213 self.variant(StallODis11::EnEp11OutStall)
214 }
215 #[doc = "Disable"]
216 #[inline(always)]
217 pub fn dis_ep11_out_stall(self) -> &'a mut crate::W<REG> {
218 self.variant(StallODis11::DisEp11OutStall)
219 }
220}
221#[doc = "Disable endpoint 12 OUT direction\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum StallODis12 {
225 #[doc = "0: Enable"]
226 EnEp12OutStall = 0,
227 #[doc = "1: Disable"]
228 DisEp12OutStall = 1,
229}
230impl From<StallODis12> for bool {
231 #[inline(always)]
232 fn from(variant: StallODis12) -> Self {
233 variant as u8 != 0
234 }
235}
236#[doc = "Field `STALL_O_DIS12` reader - Disable endpoint 12 OUT direction"]
237pub type StallODis12R = crate::BitReader<StallODis12>;
238impl StallODis12R {
239 #[doc = "Get enumerated values variant"]
240 #[inline(always)]
241 pub const fn variant(&self) -> StallODis12 {
242 match self.bits {
243 false => StallODis12::EnEp12OutStall,
244 true => StallODis12::DisEp12OutStall,
245 }
246 }
247 #[doc = "Enable"]
248 #[inline(always)]
249 pub fn is_en_ep12_out_stall(&self) -> bool {
250 *self == StallODis12::EnEp12OutStall
251 }
252 #[doc = "Disable"]
253 #[inline(always)]
254 pub fn is_dis_ep12_out_stall(&self) -> bool {
255 *self == StallODis12::DisEp12OutStall
256 }
257}
258#[doc = "Field `STALL_O_DIS12` writer - Disable endpoint 12 OUT direction"]
259pub type StallODis12W<'a, REG> = crate::BitWriter<'a, REG, StallODis12>;
260impl<'a, REG> StallODis12W<'a, REG>
261where
262 REG: crate::Writable + crate::RegisterSpec,
263{
264 #[doc = "Enable"]
265 #[inline(always)]
266 pub fn en_ep12_out_stall(self) -> &'a mut crate::W<REG> {
267 self.variant(StallODis12::EnEp12OutStall)
268 }
269 #[doc = "Disable"]
270 #[inline(always)]
271 pub fn dis_ep12_out_stall(self) -> &'a mut crate::W<REG> {
272 self.variant(StallODis12::DisEp12OutStall)
273 }
274}
275#[doc = "Disable Endpoint 13 OUT Direction\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum StallODis13 {
279 #[doc = "0: Enable"]
280 EnEp13OutStall = 0,
281 #[doc = "1: Disable"]
282 DisEp13OutStall = 1,
283}
284impl From<StallODis13> for bool {
285 #[inline(always)]
286 fn from(variant: StallODis13) -> Self {
287 variant as u8 != 0
288 }
289}
290#[doc = "Field `STALL_O_DIS13` reader - Disable Endpoint 13 OUT Direction"]
291pub type StallODis13R = crate::BitReader<StallODis13>;
292impl StallODis13R {
293 #[doc = "Get enumerated values variant"]
294 #[inline(always)]
295 pub const fn variant(&self) -> StallODis13 {
296 match self.bits {
297 false => StallODis13::EnEp13OutStall,
298 true => StallODis13::DisEp13OutStall,
299 }
300 }
301 #[doc = "Enable"]
302 #[inline(always)]
303 pub fn is_en_ep13_out_stall(&self) -> bool {
304 *self == StallODis13::EnEp13OutStall
305 }
306 #[doc = "Disable"]
307 #[inline(always)]
308 pub fn is_dis_ep13_out_stall(&self) -> bool {
309 *self == StallODis13::DisEp13OutStall
310 }
311}
312#[doc = "Field `STALL_O_DIS13` writer - Disable Endpoint 13 OUT Direction"]
313pub type StallODis13W<'a, REG> = crate::BitWriter<'a, REG, StallODis13>;
314impl<'a, REG> StallODis13W<'a, REG>
315where
316 REG: crate::Writable + crate::RegisterSpec,
317{
318 #[doc = "Enable"]
319 #[inline(always)]
320 pub fn en_ep13_out_stall(self) -> &'a mut crate::W<REG> {
321 self.variant(StallODis13::EnEp13OutStall)
322 }
323 #[doc = "Disable"]
324 #[inline(always)]
325 pub fn dis_ep13_out_stall(self) -> &'a mut crate::W<REG> {
326 self.variant(StallODis13::DisEp13OutStall)
327 }
328}
329#[doc = "Disable Endpoint 14 OUT Direction\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum StallODis14 {
333 #[doc = "0: Enable"]
334 EnEp14OutStall = 0,
335 #[doc = "1: Disable"]
336 DisEp14OutStall = 1,
337}
338impl From<StallODis14> for bool {
339 #[inline(always)]
340 fn from(variant: StallODis14) -> Self {
341 variant as u8 != 0
342 }
343}
344#[doc = "Field `STALL_O_DIS14` reader - Disable Endpoint 14 OUT Direction"]
345pub type StallODis14R = crate::BitReader<StallODis14>;
346impl StallODis14R {
347 #[doc = "Get enumerated values variant"]
348 #[inline(always)]
349 pub const fn variant(&self) -> StallODis14 {
350 match self.bits {
351 false => StallODis14::EnEp14OutStall,
352 true => StallODis14::DisEp14OutStall,
353 }
354 }
355 #[doc = "Enable"]
356 #[inline(always)]
357 pub fn is_en_ep14_out_stall(&self) -> bool {
358 *self == StallODis14::EnEp14OutStall
359 }
360 #[doc = "Disable"]
361 #[inline(always)]
362 pub fn is_dis_ep14_out_stall(&self) -> bool {
363 *self == StallODis14::DisEp14OutStall
364 }
365}
366#[doc = "Field `STALL_O_DIS14` writer - Disable Endpoint 14 OUT Direction"]
367pub type StallODis14W<'a, REG> = crate::BitWriter<'a, REG, StallODis14>;
368impl<'a, REG> StallODis14W<'a, REG>
369where
370 REG: crate::Writable + crate::RegisterSpec,
371{
372 #[doc = "Enable"]
373 #[inline(always)]
374 pub fn en_ep14_out_stall(self) -> &'a mut crate::W<REG> {
375 self.variant(StallODis14::EnEp14OutStall)
376 }
377 #[doc = "Disable"]
378 #[inline(always)]
379 pub fn dis_ep14_out_stall(self) -> &'a mut crate::W<REG> {
380 self.variant(StallODis14::DisEp14OutStall)
381 }
382}
383#[doc = "Disable Endpoint 15 OUT Direction\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum StallODis15 {
387 #[doc = "0: Enable"]
388 EnEp15OutStall = 0,
389 #[doc = "1: Disable"]
390 DisEp15OutStall = 1,
391}
392impl From<StallODis15> for bool {
393 #[inline(always)]
394 fn from(variant: StallODis15) -> Self {
395 variant as u8 != 0
396 }
397}
398#[doc = "Field `STALL_O_DIS15` reader - Disable Endpoint 15 OUT Direction"]
399pub type StallODis15R = crate::BitReader<StallODis15>;
400impl StallODis15R {
401 #[doc = "Get enumerated values variant"]
402 #[inline(always)]
403 pub const fn variant(&self) -> StallODis15 {
404 match self.bits {
405 false => StallODis15::EnEp15OutStall,
406 true => StallODis15::DisEp15OutStall,
407 }
408 }
409 #[doc = "Enable"]
410 #[inline(always)]
411 pub fn is_en_ep15_out_stall(&self) -> bool {
412 *self == StallODis15::EnEp15OutStall
413 }
414 #[doc = "Disable"]
415 #[inline(always)]
416 pub fn is_dis_ep15_out_stall(&self) -> bool {
417 *self == StallODis15::DisEp15OutStall
418 }
419}
420#[doc = "Field `STALL_O_DIS15` writer - Disable Endpoint 15 OUT Direction"]
421pub type StallODis15W<'a, REG> = crate::BitWriter<'a, REG, StallODis15>;
422impl<'a, REG> StallODis15W<'a, REG>
423where
424 REG: crate::Writable + crate::RegisterSpec,
425{
426 #[doc = "Enable"]
427 #[inline(always)]
428 pub fn en_ep15_out_stall(self) -> &'a mut crate::W<REG> {
429 self.variant(StallODis15::EnEp15OutStall)
430 }
431 #[doc = "Disable"]
432 #[inline(always)]
433 pub fn dis_ep15_out_stall(self) -> &'a mut crate::W<REG> {
434 self.variant(StallODis15::DisEp15OutStall)
435 }
436}
437impl R {
438 #[doc = "Bit 0 - Disable Endpoint 8 OUT Direction"]
439 #[inline(always)]
440 pub fn stall_o_dis8(&self) -> StallODis8R {
441 StallODis8R::new((self.bits & 1) != 0)
442 }
443 #[doc = "Bit 1 - Disable Endpoint 9 OUT Direction"]
444 #[inline(always)]
445 pub fn stall_o_dis9(&self) -> StallODis9R {
446 StallODis9R::new(((self.bits >> 1) & 1) != 0)
447 }
448 #[doc = "Bit 2 - Disable Endpoint 10 OUT Direction"]
449 #[inline(always)]
450 pub fn stall_o_dis10(&self) -> StallODis10R {
451 StallODis10R::new(((self.bits >> 2) & 1) != 0)
452 }
453 #[doc = "Bit 3 - Disable Endpoint 11 OUT Direction"]
454 #[inline(always)]
455 pub fn stall_o_dis11(&self) -> StallODis11R {
456 StallODis11R::new(((self.bits >> 3) & 1) != 0)
457 }
458 #[doc = "Bit 4 - Disable endpoint 12 OUT direction"]
459 #[inline(always)]
460 pub fn stall_o_dis12(&self) -> StallODis12R {
461 StallODis12R::new(((self.bits >> 4) & 1) != 0)
462 }
463 #[doc = "Bit 5 - Disable Endpoint 13 OUT Direction"]
464 #[inline(always)]
465 pub fn stall_o_dis13(&self) -> StallODis13R {
466 StallODis13R::new(((self.bits >> 5) & 1) != 0)
467 }
468 #[doc = "Bit 6 - Disable Endpoint 14 OUT Direction"]
469 #[inline(always)]
470 pub fn stall_o_dis14(&self) -> StallODis14R {
471 StallODis14R::new(((self.bits >> 6) & 1) != 0)
472 }
473 #[doc = "Bit 7 - Disable Endpoint 15 OUT Direction"]
474 #[inline(always)]
475 pub fn stall_o_dis15(&self) -> StallODis15R {
476 StallODis15R::new(((self.bits >> 7) & 1) != 0)
477 }
478}
479#[cfg(feature = "debug")]
480impl core::fmt::Debug for R {
481 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
482 f.debug_struct("STALL_OH_DIS")
483 .field("stall_o_dis8", &self.stall_o_dis8())
484 .field("stall_o_dis9", &self.stall_o_dis9())
485 .field("stall_o_dis10", &self.stall_o_dis10())
486 .field("stall_o_dis11", &self.stall_o_dis11())
487 .field("stall_o_dis12", &self.stall_o_dis12())
488 .field("stall_o_dis13", &self.stall_o_dis13())
489 .field("stall_o_dis14", &self.stall_o_dis14())
490 .field("stall_o_dis15", &self.stall_o_dis15())
491 .finish()
492 }
493}
494impl W {
495 #[doc = "Bit 0 - Disable Endpoint 8 OUT Direction"]
496 #[inline(always)]
497 pub fn stall_o_dis8(&mut self) -> StallODis8W<'_, StallOhDisSpec> {
498 StallODis8W::new(self, 0)
499 }
500 #[doc = "Bit 1 - Disable Endpoint 9 OUT Direction"]
501 #[inline(always)]
502 pub fn stall_o_dis9(&mut self) -> StallODis9W<'_, StallOhDisSpec> {
503 StallODis9W::new(self, 1)
504 }
505 #[doc = "Bit 2 - Disable Endpoint 10 OUT Direction"]
506 #[inline(always)]
507 pub fn stall_o_dis10(&mut self) -> StallODis10W<'_, StallOhDisSpec> {
508 StallODis10W::new(self, 2)
509 }
510 #[doc = "Bit 3 - Disable Endpoint 11 OUT Direction"]
511 #[inline(always)]
512 pub fn stall_o_dis11(&mut self) -> StallODis11W<'_, StallOhDisSpec> {
513 StallODis11W::new(self, 3)
514 }
515 #[doc = "Bit 4 - Disable endpoint 12 OUT direction"]
516 #[inline(always)]
517 pub fn stall_o_dis12(&mut self) -> StallODis12W<'_, StallOhDisSpec> {
518 StallODis12W::new(self, 4)
519 }
520 #[doc = "Bit 5 - Disable Endpoint 13 OUT Direction"]
521 #[inline(always)]
522 pub fn stall_o_dis13(&mut self) -> StallODis13W<'_, StallOhDisSpec> {
523 StallODis13W::new(self, 5)
524 }
525 #[doc = "Bit 6 - Disable Endpoint 14 OUT Direction"]
526 #[inline(always)]
527 pub fn stall_o_dis14(&mut self) -> StallODis14W<'_, StallOhDisSpec> {
528 StallODis14W::new(self, 6)
529 }
530 #[doc = "Bit 7 - Disable Endpoint 15 OUT Direction"]
531 #[inline(always)]
532 pub fn stall_o_dis15(&mut self) -> StallODis15W<'_, StallOhDisSpec> {
533 StallODis15W::new(self, 7)
534 }
535}
536#[doc = "Peripheral Mode Stall Disable for Endpoints 15 to 8 in OUT Direction\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_oh_dis::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_oh_dis::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
537pub struct StallOhDisSpec;
538impl crate::RegisterSpec for StallOhDisSpec {
539 type Ux = u8;
540}
541#[doc = "`read()` method returns [`stall_oh_dis::R`](R) reader structure"]
542impl crate::Readable for StallOhDisSpec {}
543#[doc = "`write(|w| ..)` method takes [`stall_oh_dis::W`](W) writer structure"]
544impl crate::Writable for StallOhDisSpec {
545 type Safety = crate::Unsafe;
546}
547#[doc = "`reset()` method sets STALL_OH_DIS to value 0"]
548impl crate::Resettable for StallOhDisSpec {}