mcxa_pac/spc0/
lpreq_cfg.rs1#[doc = "Register `LPREQ_CFG` reader"]
2pub type R = crate::R<LpreqCfgSpec>;
3#[doc = "Register `LPREQ_CFG` writer"]
4pub type W = crate::W<LpreqCfgSpec>;
5#[doc = "Low-Power Request Output Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Lpreqoe {
9 #[doc = "0: Disable"]
10 Disable = 0,
11 #[doc = "1: Enable"]
12 Enable = 1,
13}
14impl From<Lpreqoe> for bool {
15 #[inline(always)]
16 fn from(variant: Lpreqoe) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `LPREQOE` reader - Low-Power Request Output Enable"]
21pub type LpreqoeR = crate::BitReader<Lpreqoe>;
22impl LpreqoeR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> Lpreqoe {
26 match self.bits {
27 false => Lpreqoe::Disable,
28 true => Lpreqoe::Enable,
29 }
30 }
31 #[doc = "Disable"]
32 #[inline(always)]
33 pub fn is_disable(&self) -> bool {
34 *self == Lpreqoe::Disable
35 }
36 #[doc = "Enable"]
37 #[inline(always)]
38 pub fn is_enable(&self) -> bool {
39 *self == Lpreqoe::Enable
40 }
41}
42#[doc = "Field `LPREQOE` writer - Low-Power Request Output Enable"]
43pub type LpreqoeW<'a, REG> = crate::BitWriter<'a, REG, Lpreqoe>;
44impl<'a, REG> LpreqoeW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Disable"]
49 #[inline(always)]
50 pub fn disable(self) -> &'a mut crate::W<REG> {
51 self.variant(Lpreqoe::Disable)
52 }
53 #[doc = "Enable"]
54 #[inline(always)]
55 pub fn enable(self) -> &'a mut crate::W<REG> {
56 self.variant(Lpreqoe::Enable)
57 }
58}
59#[doc = "Low-Power Request Output Pin Polarity Control\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Lpreqpol {
63 #[doc = "0: High"]
64 High = 0,
65 #[doc = "1: Low"]
66 Low = 1,
67}
68impl From<Lpreqpol> for bool {
69 #[inline(always)]
70 fn from(variant: Lpreqpol) -> Self {
71 variant as u8 != 0
72 }
73}
74#[doc = "Field `LPREQPOL` reader - Low-Power Request Output Pin Polarity Control"]
75pub type LpreqpolR = crate::BitReader<Lpreqpol>;
76impl LpreqpolR {
77 #[doc = "Get enumerated values variant"]
78 #[inline(always)]
79 pub const fn variant(&self) -> Lpreqpol {
80 match self.bits {
81 false => Lpreqpol::High,
82 true => Lpreqpol::Low,
83 }
84 }
85 #[doc = "High"]
86 #[inline(always)]
87 pub fn is_high(&self) -> bool {
88 *self == Lpreqpol::High
89 }
90 #[doc = "Low"]
91 #[inline(always)]
92 pub fn is_low(&self) -> bool {
93 *self == Lpreqpol::Low
94 }
95}
96#[doc = "Field `LPREQPOL` writer - Low-Power Request Output Pin Polarity Control"]
97pub type LpreqpolW<'a, REG> = crate::BitWriter<'a, REG, Lpreqpol>;
98impl<'a, REG> LpreqpolW<'a, REG>
99where
100 REG: crate::Writable + crate::RegisterSpec,
101{
102 #[doc = "High"]
103 #[inline(always)]
104 pub fn high(self) -> &'a mut crate::W<REG> {
105 self.variant(Lpreqpol::High)
106 }
107 #[doc = "Low"]
108 #[inline(always)]
109 pub fn low(self) -> &'a mut crate::W<REG> {
110 self.variant(Lpreqpol::Low)
111 }
112}
113#[doc = "Low-Power Request Output Override\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116#[repr(u8)]
117pub enum Lpreqov {
118 #[doc = "0: Not forced"]
119 ForceNo = 0,
120 #[doc = "2: Forced low (ignore LPREQPOL settings)"]
121 ForceLow = 2,
122 #[doc = "3: Forced high (ignore LPREQPOL settings)"]
123 ForceHigh = 3,
124}
125impl From<Lpreqov> for u8 {
126 #[inline(always)]
127 fn from(variant: Lpreqov) -> Self {
128 variant as _
129 }
130}
131impl crate::FieldSpec for Lpreqov {
132 type Ux = u8;
133}
134impl crate::IsEnum for Lpreqov {}
135#[doc = "Field `LPREQOV` reader - Low-Power Request Output Override"]
136pub type LpreqovR = crate::FieldReader<Lpreqov>;
137impl LpreqovR {
138 #[doc = "Get enumerated values variant"]
139 #[inline(always)]
140 pub const fn variant(&self) -> Option<Lpreqov> {
141 match self.bits {
142 0 => Some(Lpreqov::ForceNo),
143 2 => Some(Lpreqov::ForceLow),
144 3 => Some(Lpreqov::ForceHigh),
145 _ => None,
146 }
147 }
148 #[doc = "Not forced"]
149 #[inline(always)]
150 pub fn is_force_no(&self) -> bool {
151 *self == Lpreqov::ForceNo
152 }
153 #[doc = "Forced low (ignore LPREQPOL settings)"]
154 #[inline(always)]
155 pub fn is_force_low(&self) -> bool {
156 *self == Lpreqov::ForceLow
157 }
158 #[doc = "Forced high (ignore LPREQPOL settings)"]
159 #[inline(always)]
160 pub fn is_force_high(&self) -> bool {
161 *self == Lpreqov::ForceHigh
162 }
163}
164#[doc = "Field `LPREQOV` writer - Low-Power Request Output Override"]
165pub type LpreqovW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lpreqov>;
166impl<'a, REG> LpreqovW<'a, REG>
167where
168 REG: crate::Writable + crate::RegisterSpec,
169 REG::Ux: From<u8>,
170{
171 #[doc = "Not forced"]
172 #[inline(always)]
173 pub fn force_no(self) -> &'a mut crate::W<REG> {
174 self.variant(Lpreqov::ForceNo)
175 }
176 #[doc = "Forced low (ignore LPREQPOL settings)"]
177 #[inline(always)]
178 pub fn force_low(self) -> &'a mut crate::W<REG> {
179 self.variant(Lpreqov::ForceLow)
180 }
181 #[doc = "Forced high (ignore LPREQPOL settings)"]
182 #[inline(always)]
183 pub fn force_high(self) -> &'a mut crate::W<REG> {
184 self.variant(Lpreqov::ForceHigh)
185 }
186}
187impl R {
188 #[doc = "Bit 0 - Low-Power Request Output Enable"]
189 #[inline(always)]
190 pub fn lpreqoe(&self) -> LpreqoeR {
191 LpreqoeR::new((self.bits & 1) != 0)
192 }
193 #[doc = "Bit 1 - Low-Power Request Output Pin Polarity Control"]
194 #[inline(always)]
195 pub fn lpreqpol(&self) -> LpreqpolR {
196 LpreqpolR::new(((self.bits >> 1) & 1) != 0)
197 }
198 #[doc = "Bits 2:3 - Low-Power Request Output Override"]
199 #[inline(always)]
200 pub fn lpreqov(&self) -> LpreqovR {
201 LpreqovR::new(((self.bits >> 2) & 3) as u8)
202 }
203}
204#[cfg(feature = "debug")]
205impl core::fmt::Debug for R {
206 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
207 f.debug_struct("LPREQ_CFG")
208 .field("lpreqoe", &self.lpreqoe())
209 .field("lpreqpol", &self.lpreqpol())
210 .field("lpreqov", &self.lpreqov())
211 .finish()
212 }
213}
214impl W {
215 #[doc = "Bit 0 - Low-Power Request Output Enable"]
216 #[inline(always)]
217 pub fn lpreqoe(&mut self) -> LpreqoeW<'_, LpreqCfgSpec> {
218 LpreqoeW::new(self, 0)
219 }
220 #[doc = "Bit 1 - Low-Power Request Output Pin Polarity Control"]
221 #[inline(always)]
222 pub fn lpreqpol(&mut self) -> LpreqpolW<'_, LpreqCfgSpec> {
223 LpreqpolW::new(self, 1)
224 }
225 #[doc = "Bits 2:3 - Low-Power Request Output Override"]
226 #[inline(always)]
227 pub fn lpreqov(&mut self) -> LpreqovW<'_, LpreqCfgSpec> {
228 LpreqovW::new(self, 2)
229 }
230}
231#[doc = "Low-Power Request Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`lpreq_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpreq_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
232pub struct LpreqCfgSpec;
233impl crate::RegisterSpec for LpreqCfgSpec {
234 type Ux = u32;
235}
236#[doc = "`read()` method returns [`lpreq_cfg::R`](R) reader structure"]
237impl crate::Readable for LpreqCfgSpec {}
238#[doc = "`write(|w| ..)` method takes [`lpreq_cfg::W`](W) writer structure"]
239impl crate::Writable for LpreqCfgSpec {
240 type Safety = crate::Unsafe;
241}
242#[doc = "`reset()` method sets LPREQ_CFG to value 0"]
243impl crate::Resettable for LpreqCfgSpec {}