1#[doc = "Register `LP_CFG` reader"]
2pub type R = crate::R<LpCfgSpec>;
3#[doc = "Register `LP_CFG` writer"]
4pub type W = crate::W<LpCfgSpec>;
5#[doc = "LDO_CORE VDD Drive Strength\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum CoreldoVddDs {
9 #[doc = "0: Low"]
10 Low = 0,
11 #[doc = "1: Normal"]
12 Normal = 1,
13}
14impl From<CoreldoVddDs> for bool {
15 #[inline(always)]
16 fn from(variant: CoreldoVddDs) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `CORELDO_VDD_DS` reader - LDO_CORE VDD Drive Strength"]
21pub type CoreldoVddDsR = crate::BitReader<CoreldoVddDs>;
22impl CoreldoVddDsR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> CoreldoVddDs {
26 match self.bits {
27 false => CoreldoVddDs::Low,
28 true => CoreldoVddDs::Normal,
29 }
30 }
31 #[doc = "Low"]
32 #[inline(always)]
33 pub fn is_low(&self) -> bool {
34 *self == CoreldoVddDs::Low
35 }
36 #[doc = "Normal"]
37 #[inline(always)]
38 pub fn is_normal(&self) -> bool {
39 *self == CoreldoVddDs::Normal
40 }
41}
42#[doc = "Field `CORELDO_VDD_DS` writer - LDO_CORE VDD Drive Strength"]
43pub type CoreldoVddDsW<'a, REG> = crate::BitWriter<'a, REG, CoreldoVddDs>;
44impl<'a, REG> CoreldoVddDsW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Low"]
49 #[inline(always)]
50 pub fn low(self) -> &'a mut crate::W<REG> {
51 self.variant(CoreldoVddDs::Low)
52 }
53 #[doc = "Normal"]
54 #[inline(always)]
55 pub fn normal(self) -> &'a mut crate::W<REG> {
56 self.variant(CoreldoVddDs::Normal)
57 }
58}
59#[doc = "LDO_CORE VDD Regulator Voltage Level\n\nValue on reset: 1"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62#[repr(u8)]
63pub enum CoreldoVddLvl {
64 #[doc = "1: Mid voltage (1.0 V)"]
65 Mid = 1,
66 #[doc = "2: Normal voltage (1.1 V)"]
67 Normal = 2,
68 #[doc = "3: Overdrive voltage (1.15 V)"]
69 Over = 3,
70}
71impl From<CoreldoVddLvl> for u8 {
72 #[inline(always)]
73 fn from(variant: CoreldoVddLvl) -> Self {
74 variant as _
75 }
76}
77impl crate::FieldSpec for CoreldoVddLvl {
78 type Ux = u8;
79}
80impl crate::IsEnum for CoreldoVddLvl {}
81#[doc = "Field `CORELDO_VDD_LVL` reader - LDO_CORE VDD Regulator Voltage Level"]
82pub type CoreldoVddLvlR = crate::FieldReader<CoreldoVddLvl>;
83impl CoreldoVddLvlR {
84 #[doc = "Get enumerated values variant"]
85 #[inline(always)]
86 pub const fn variant(&self) -> Option<CoreldoVddLvl> {
87 match self.bits {
88 1 => Some(CoreldoVddLvl::Mid),
89 2 => Some(CoreldoVddLvl::Normal),
90 3 => Some(CoreldoVddLvl::Over),
91 _ => None,
92 }
93 }
94 #[doc = "Mid voltage (1.0 V)"]
95 #[inline(always)]
96 pub fn is_mid(&self) -> bool {
97 *self == CoreldoVddLvl::Mid
98 }
99 #[doc = "Normal voltage (1.1 V)"]
100 #[inline(always)]
101 pub fn is_normal(&self) -> bool {
102 *self == CoreldoVddLvl::Normal
103 }
104 #[doc = "Overdrive voltage (1.15 V)"]
105 #[inline(always)]
106 pub fn is_over(&self) -> bool {
107 *self == CoreldoVddLvl::Over
108 }
109}
110#[doc = "Field `CORELDO_VDD_LVL` writer - LDO_CORE VDD Regulator Voltage Level"]
111pub type CoreldoVddLvlW<'a, REG> = crate::FieldWriter<'a, REG, 2, CoreldoVddLvl>;
112impl<'a, REG> CoreldoVddLvlW<'a, REG>
113where
114 REG: crate::Writable + crate::RegisterSpec,
115 REG::Ux: From<u8>,
116{
117 #[doc = "Mid voltage (1.0 V)"]
118 #[inline(always)]
119 pub fn mid(self) -> &'a mut crate::W<REG> {
120 self.variant(CoreldoVddLvl::Mid)
121 }
122 #[doc = "Normal voltage (1.1 V)"]
123 #[inline(always)]
124 pub fn normal(self) -> &'a mut crate::W<REG> {
125 self.variant(CoreldoVddLvl::Normal)
126 }
127 #[doc = "Overdrive voltage (1.15 V)"]
128 #[inline(always)]
129 pub fn over(self) -> &'a mut crate::W<REG> {
130 self.variant(CoreldoVddLvl::Over)
131 }
132}
133#[doc = "SRAM_LDO Deep Power Low Power IREF Enable\n\nValue on reset: 1"]
134#[cfg_attr(feature = "defmt", derive(defmt::Format))]
135#[derive(Clone, Copy, Debug, PartialEq, Eq)]
136pub enum SramldoDpdOn {
137 #[doc = "0: Low Power IREF is disabled for power saving in Deep Power Down mode"]
138 Disabled = 0,
139 #[doc = "1: Low Power IREF is enabled"]
140 Enabled = 1,
141}
142impl From<SramldoDpdOn> for bool {
143 #[inline(always)]
144 fn from(variant: SramldoDpdOn) -> Self {
145 variant as u8 != 0
146 }
147}
148#[doc = "Field `SRAMLDO_DPD_ON` reader - SRAM_LDO Deep Power Low Power IREF Enable"]
149pub type SramldoDpdOnR = crate::BitReader<SramldoDpdOn>;
150impl SramldoDpdOnR {
151 #[doc = "Get enumerated values variant"]
152 #[inline(always)]
153 pub const fn variant(&self) -> SramldoDpdOn {
154 match self.bits {
155 false => SramldoDpdOn::Disabled,
156 true => SramldoDpdOn::Enabled,
157 }
158 }
159 #[doc = "Low Power IREF is disabled for power saving in Deep Power Down mode"]
160 #[inline(always)]
161 pub fn is_disabled(&self) -> bool {
162 *self == SramldoDpdOn::Disabled
163 }
164 #[doc = "Low Power IREF is enabled"]
165 #[inline(always)]
166 pub fn is_enabled(&self) -> bool {
167 *self == SramldoDpdOn::Enabled
168 }
169}
170#[doc = "Field `SRAMLDO_DPD_ON` writer - SRAM_LDO Deep Power Low Power IREF Enable"]
171pub type SramldoDpdOnW<'a, REG> = crate::BitWriter<'a, REG, SramldoDpdOn>;
172impl<'a, REG> SramldoDpdOnW<'a, REG>
173where
174 REG: crate::Writable + crate::RegisterSpec,
175{
176 #[doc = "Low Power IREF is disabled for power saving in Deep Power Down mode"]
177 #[inline(always)]
178 pub fn disabled(self) -> &'a mut crate::W<REG> {
179 self.variant(SramldoDpdOn::Disabled)
180 }
181 #[doc = "Low Power IREF is enabled"]
182 #[inline(always)]
183 pub fn enabled(self) -> &'a mut crate::W<REG> {
184 self.variant(SramldoDpdOn::Enabled)
185 }
186}
187#[doc = "Bandgap Mode\n\nValue on reset: 0"]
188#[cfg_attr(feature = "defmt", derive(defmt::Format))]
189#[derive(Clone, Copy, Debug, PartialEq, Eq)]
190#[repr(u8)]
191pub enum Bgmode {
192 #[doc = "0: Bandgap disabled"]
193 Bgmode0 = 0,
194 #[doc = "1: Bandgap enabled, buffer disabled"]
195 Bgmode01 = 1,
196 #[doc = "2: Bandgap enabled, buffer enabled"]
197 Bgmode10 = 2,
198}
199impl From<Bgmode> for u8 {
200 #[inline(always)]
201 fn from(variant: Bgmode) -> Self {
202 variant as _
203 }
204}
205impl crate::FieldSpec for Bgmode {
206 type Ux = u8;
207}
208impl crate::IsEnum for Bgmode {}
209#[doc = "Field `BGMODE` reader - Bandgap Mode"]
210pub type BgmodeR = crate::FieldReader<Bgmode>;
211impl BgmodeR {
212 #[doc = "Get enumerated values variant"]
213 #[inline(always)]
214 pub const fn variant(&self) -> Option<Bgmode> {
215 match self.bits {
216 0 => Some(Bgmode::Bgmode0),
217 1 => Some(Bgmode::Bgmode01),
218 2 => Some(Bgmode::Bgmode10),
219 _ => None,
220 }
221 }
222 #[doc = "Bandgap disabled"]
223 #[inline(always)]
224 pub fn is_bgmode0(&self) -> bool {
225 *self == Bgmode::Bgmode0
226 }
227 #[doc = "Bandgap enabled, buffer disabled"]
228 #[inline(always)]
229 pub fn is_bgmode01(&self) -> bool {
230 *self == Bgmode::Bgmode01
231 }
232 #[doc = "Bandgap enabled, buffer enabled"]
233 #[inline(always)]
234 pub fn is_bgmode10(&self) -> bool {
235 *self == Bgmode::Bgmode10
236 }
237}
238#[doc = "Field `BGMODE` writer - Bandgap Mode"]
239pub type BgmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bgmode>;
240impl<'a, REG> BgmodeW<'a, REG>
241where
242 REG: crate::Writable + crate::RegisterSpec,
243 REG::Ux: From<u8>,
244{
245 #[doc = "Bandgap disabled"]
246 #[inline(always)]
247 pub fn bgmode0(self) -> &'a mut crate::W<REG> {
248 self.variant(Bgmode::Bgmode0)
249 }
250 #[doc = "Bandgap enabled, buffer disabled"]
251 #[inline(always)]
252 pub fn bgmode01(self) -> &'a mut crate::W<REG> {
253 self.variant(Bgmode::Bgmode01)
254 }
255 #[doc = "Bandgap enabled, buffer enabled"]
256 #[inline(always)]
257 pub fn bgmode10(self) -> &'a mut crate::W<REG> {
258 self.variant(Bgmode::Bgmode10)
259 }
260}
261#[doc = "Low-Power IREF Enable\n\nValue on reset: 0"]
262#[cfg_attr(feature = "defmt", derive(defmt::Format))]
263#[derive(Clone, Copy, Debug, PartialEq, Eq)]
264pub enum LpIrefen {
265 #[doc = "0: Disable for power saving in Deep Power Down mode"]
266 Disable = 0,
267 #[doc = "1: Enable"]
268 Enable = 1,
269}
270impl From<LpIrefen> for bool {
271 #[inline(always)]
272 fn from(variant: LpIrefen) -> Self {
273 variant as u8 != 0
274 }
275}
276#[doc = "Field `LP_IREFEN` reader - Low-Power IREF Enable"]
277pub type LpIrefenR = crate::BitReader<LpIrefen>;
278impl LpIrefenR {
279 #[doc = "Get enumerated values variant"]
280 #[inline(always)]
281 pub const fn variant(&self) -> LpIrefen {
282 match self.bits {
283 false => LpIrefen::Disable,
284 true => LpIrefen::Enable,
285 }
286 }
287 #[doc = "Disable for power saving in Deep Power Down mode"]
288 #[inline(always)]
289 pub fn is_disable(&self) -> bool {
290 *self == LpIrefen::Disable
291 }
292 #[doc = "Enable"]
293 #[inline(always)]
294 pub fn is_enable(&self) -> bool {
295 *self == LpIrefen::Enable
296 }
297}
298#[doc = "Field `LP_IREFEN` writer - Low-Power IREF Enable"]
299pub type LpIrefenW<'a, REG> = crate::BitWriter<'a, REG, LpIrefen>;
300impl<'a, REG> LpIrefenW<'a, REG>
301where
302 REG: crate::Writable + crate::RegisterSpec,
303{
304 #[doc = "Disable for power saving in Deep Power Down mode"]
305 #[inline(always)]
306 pub fn disable(self) -> &'a mut crate::W<REG> {
307 self.variant(LpIrefen::Disable)
308 }
309 #[doc = "Enable"]
310 #[inline(always)]
311 pub fn enable(self) -> &'a mut crate::W<REG> {
312 self.variant(LpIrefen::Enable)
313 }
314}
315#[doc = "Core Low Voltage Detect Enable\n\nValue on reset: 0"]
316#[cfg_attr(feature = "defmt", derive(defmt::Format))]
317#[derive(Clone, Copy, Debug, PartialEq, Eq)]
318pub enum CoreLvde {
319 #[doc = "0: Disable"]
320 Disable = 0,
321 #[doc = "1: Enable"]
322 Enable = 1,
323}
324impl From<CoreLvde> for bool {
325 #[inline(always)]
326 fn from(variant: CoreLvde) -> Self {
327 variant as u8 != 0
328 }
329}
330#[doc = "Field `CORE_LVDE` reader - Core Low Voltage Detect Enable"]
331pub type CoreLvdeR = crate::BitReader<CoreLvde>;
332impl CoreLvdeR {
333 #[doc = "Get enumerated values variant"]
334 #[inline(always)]
335 pub const fn variant(&self) -> CoreLvde {
336 match self.bits {
337 false => CoreLvde::Disable,
338 true => CoreLvde::Enable,
339 }
340 }
341 #[doc = "Disable"]
342 #[inline(always)]
343 pub fn is_disable(&self) -> bool {
344 *self == CoreLvde::Disable
345 }
346 #[doc = "Enable"]
347 #[inline(always)]
348 pub fn is_enable(&self) -> bool {
349 *self == CoreLvde::Enable
350 }
351}
352#[doc = "Field `CORE_LVDE` writer - Core Low Voltage Detect Enable"]
353pub type CoreLvdeW<'a, REG> = crate::BitWriter<'a, REG, CoreLvde>;
354impl<'a, REG> CoreLvdeW<'a, REG>
355where
356 REG: crate::Writable + crate::RegisterSpec,
357{
358 #[doc = "Disable"]
359 #[inline(always)]
360 pub fn disable(self) -> &'a mut crate::W<REG> {
361 self.variant(CoreLvde::Disable)
362 }
363 #[doc = "Enable"]
364 #[inline(always)]
365 pub fn enable(self) -> &'a mut crate::W<REG> {
366 self.variant(CoreLvde::Enable)
367 }
368}
369#[doc = "System Low Voltage Detect Enable\n\nValue on reset: 0"]
370#[cfg_attr(feature = "defmt", derive(defmt::Format))]
371#[derive(Clone, Copy, Debug, PartialEq, Eq)]
372pub enum SysLvde {
373 #[doc = "0: Disable"]
374 Disable = 0,
375 #[doc = "1: Enable"]
376 Enable = 1,
377}
378impl From<SysLvde> for bool {
379 #[inline(always)]
380 fn from(variant: SysLvde) -> Self {
381 variant as u8 != 0
382 }
383}
384#[doc = "Field `SYS_LVDE` reader - System Low Voltage Detect Enable"]
385pub type SysLvdeR = crate::BitReader<SysLvde>;
386impl SysLvdeR {
387 #[doc = "Get enumerated values variant"]
388 #[inline(always)]
389 pub const fn variant(&self) -> SysLvde {
390 match self.bits {
391 false => SysLvde::Disable,
392 true => SysLvde::Enable,
393 }
394 }
395 #[doc = "Disable"]
396 #[inline(always)]
397 pub fn is_disable(&self) -> bool {
398 *self == SysLvde::Disable
399 }
400 #[doc = "Enable"]
401 #[inline(always)]
402 pub fn is_enable(&self) -> bool {
403 *self == SysLvde::Enable
404 }
405}
406#[doc = "Field `SYS_LVDE` writer - System Low Voltage Detect Enable"]
407pub type SysLvdeW<'a, REG> = crate::BitWriter<'a, REG, SysLvde>;
408impl<'a, REG> SysLvdeW<'a, REG>
409where
410 REG: crate::Writable + crate::RegisterSpec,
411{
412 #[doc = "Disable"]
413 #[inline(always)]
414 pub fn disable(self) -> &'a mut crate::W<REG> {
415 self.variant(SysLvde::Disable)
416 }
417 #[doc = "Enable"]
418 #[inline(always)]
419 pub fn enable(self) -> &'a mut crate::W<REG> {
420 self.variant(SysLvde::Enable)
421 }
422}
423#[doc = "System High Voltage Detect Enable\n\nValue on reset: 0"]
424#[cfg_attr(feature = "defmt", derive(defmt::Format))]
425#[derive(Clone, Copy, Debug, PartialEq, Eq)]
426pub enum SysHvde {
427 #[doc = "0: Disable"]
428 Disable = 0,
429 #[doc = "1: Enable"]
430 Enable = 1,
431}
432impl From<SysHvde> for bool {
433 #[inline(always)]
434 fn from(variant: SysHvde) -> Self {
435 variant as u8 != 0
436 }
437}
438#[doc = "Field `SYS_HVDE` reader - System High Voltage Detect Enable"]
439pub type SysHvdeR = crate::BitReader<SysHvde>;
440impl SysHvdeR {
441 #[doc = "Get enumerated values variant"]
442 #[inline(always)]
443 pub const fn variant(&self) -> SysHvde {
444 match self.bits {
445 false => SysHvde::Disable,
446 true => SysHvde::Enable,
447 }
448 }
449 #[doc = "Disable"]
450 #[inline(always)]
451 pub fn is_disable(&self) -> bool {
452 *self == SysHvde::Disable
453 }
454 #[doc = "Enable"]
455 #[inline(always)]
456 pub fn is_enable(&self) -> bool {
457 *self == SysHvde::Enable
458 }
459}
460#[doc = "Field `SYS_HVDE` writer - System High Voltage Detect Enable"]
461pub type SysHvdeW<'a, REG> = crate::BitWriter<'a, REG, SysHvde>;
462impl<'a, REG> SysHvdeW<'a, REG>
463where
464 REG: crate::Writable + crate::RegisterSpec,
465{
466 #[doc = "Disable"]
467 #[inline(always)]
468 pub fn disable(self) -> &'a mut crate::W<REG> {
469 self.variant(SysHvde::Disable)
470 }
471 #[doc = "Enable"]
472 #[inline(always)]
473 pub fn enable(self) -> &'a mut crate::W<REG> {
474 self.variant(SysHvde::Enable)
475 }
476}
477impl R {
478 #[doc = "Bit 0 - LDO_CORE VDD Drive Strength"]
479 #[inline(always)]
480 pub fn coreldo_vdd_ds(&self) -> CoreldoVddDsR {
481 CoreldoVddDsR::new((self.bits & 1) != 0)
482 }
483 #[doc = "Bits 2:3 - LDO_CORE VDD Regulator Voltage Level"]
484 #[inline(always)]
485 pub fn coreldo_vdd_lvl(&self) -> CoreldoVddLvlR {
486 CoreldoVddLvlR::new(((self.bits >> 2) & 3) as u8)
487 }
488 #[doc = "Bit 19 - SRAM_LDO Deep Power Low Power IREF Enable"]
489 #[inline(always)]
490 pub fn sramldo_dpd_on(&self) -> SramldoDpdOnR {
491 SramldoDpdOnR::new(((self.bits >> 19) & 1) != 0)
492 }
493 #[doc = "Bits 20:21 - Bandgap Mode"]
494 #[inline(always)]
495 pub fn bgmode(&self) -> BgmodeR {
496 BgmodeR::new(((self.bits >> 20) & 3) as u8)
497 }
498 #[doc = "Bit 23 - Low-Power IREF Enable"]
499 #[inline(always)]
500 pub fn lp_irefen(&self) -> LpIrefenR {
501 LpIrefenR::new(((self.bits >> 23) & 1) != 0)
502 }
503 #[doc = "Bit 24 - Core Low Voltage Detect Enable"]
504 #[inline(always)]
505 pub fn core_lvde(&self) -> CoreLvdeR {
506 CoreLvdeR::new(((self.bits >> 24) & 1) != 0)
507 }
508 #[doc = "Bit 25 - System Low Voltage Detect Enable"]
509 #[inline(always)]
510 pub fn sys_lvde(&self) -> SysLvdeR {
511 SysLvdeR::new(((self.bits >> 25) & 1) != 0)
512 }
513 #[doc = "Bit 28 - System High Voltage Detect Enable"]
514 #[inline(always)]
515 pub fn sys_hvde(&self) -> SysHvdeR {
516 SysHvdeR::new(((self.bits >> 28) & 1) != 0)
517 }
518}
519#[cfg(feature = "debug")]
520impl core::fmt::Debug for R {
521 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
522 f.debug_struct("LP_CFG")
523 .field("coreldo_vdd_ds", &self.coreldo_vdd_ds())
524 .field("coreldo_vdd_lvl", &self.coreldo_vdd_lvl())
525 .field("sramldo_dpd_on", &self.sramldo_dpd_on())
526 .field("bgmode", &self.bgmode())
527 .field("lp_irefen", &self.lp_irefen())
528 .field("core_lvde", &self.core_lvde())
529 .field("sys_lvde", &self.sys_lvde())
530 .field("sys_hvde", &self.sys_hvde())
531 .finish()
532 }
533}
534impl W {
535 #[doc = "Bit 0 - LDO_CORE VDD Drive Strength"]
536 #[inline(always)]
537 pub fn coreldo_vdd_ds(&mut self) -> CoreldoVddDsW<'_, LpCfgSpec> {
538 CoreldoVddDsW::new(self, 0)
539 }
540 #[doc = "Bits 2:3 - LDO_CORE VDD Regulator Voltage Level"]
541 #[inline(always)]
542 pub fn coreldo_vdd_lvl(&mut self) -> CoreldoVddLvlW<'_, LpCfgSpec> {
543 CoreldoVddLvlW::new(self, 2)
544 }
545 #[doc = "Bit 19 - SRAM_LDO Deep Power Low Power IREF Enable"]
546 #[inline(always)]
547 pub fn sramldo_dpd_on(&mut self) -> SramldoDpdOnW<'_, LpCfgSpec> {
548 SramldoDpdOnW::new(self, 19)
549 }
550 #[doc = "Bits 20:21 - Bandgap Mode"]
551 #[inline(always)]
552 pub fn bgmode(&mut self) -> BgmodeW<'_, LpCfgSpec> {
553 BgmodeW::new(self, 20)
554 }
555 #[doc = "Bit 23 - Low-Power IREF Enable"]
556 #[inline(always)]
557 pub fn lp_irefen(&mut self) -> LpIrefenW<'_, LpCfgSpec> {
558 LpIrefenW::new(self, 23)
559 }
560 #[doc = "Bit 24 - Core Low Voltage Detect Enable"]
561 #[inline(always)]
562 pub fn core_lvde(&mut self) -> CoreLvdeW<'_, LpCfgSpec> {
563 CoreLvdeW::new(self, 24)
564 }
565 #[doc = "Bit 25 - System Low Voltage Detect Enable"]
566 #[inline(always)]
567 pub fn sys_lvde(&mut self) -> SysLvdeW<'_, LpCfgSpec> {
568 SysLvdeW::new(self, 25)
569 }
570 #[doc = "Bit 28 - System High Voltage Detect Enable"]
571 #[inline(always)]
572 pub fn sys_hvde(&mut self) -> SysHvdeW<'_, LpCfgSpec> {
573 SysHvdeW::new(self, 28)
574 }
575}
576#[doc = "Low-Power Mode Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`lp_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lp_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
577pub struct LpCfgSpec;
578impl crate::RegisterSpec for LpCfgSpec {
579 type Ux = u32;
580}
581#[doc = "`read()` method returns [`lp_cfg::R`](R) reader structure"]
582impl crate::Readable for LpCfgSpec {}
583#[doc = "`write(|w| ..)` method takes [`lp_cfg::W`](W) writer structure"]
584impl crate::Writable for LpCfgSpec {
585 type Safety = crate::Unsafe;
586}
587#[doc = "`reset()` method sets LP_CFG to value 0x0008_0004"]
588impl crate::Resettable for LpCfgSpec {
589 const RESET_VALUE: u32 = 0x0008_0004;
590}