mcxa_pac/sgi0/
sgi_dummy_ctrl.rs

1#[doc = "Register `sgi_dummy_ctrl` reader"]
2pub type R = crate::R<SgiDummyCtrlSpec>;
3#[doc = "Register `sgi_dummy_ctrl` writer"]
4pub type W = crate::W<SgiDummyCtrlSpec>;
5#[doc = "Field `ddctrl` reader - DES dummy control"]
6pub type DdctrlR = crate::FieldReader<u16>;
7#[doc = "Field `ddctrl` writer - DES dummy control"]
8pub type DdctrlW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9#[doc = "Field `dmyctl_rsvd2` reader - reserved"]
10pub type DmyctlRsvd2R = crate::FieldReader;
11#[doc = "Field `adctrl` reader - AES dummy control"]
12pub type AdctrlR = crate::FieldReader<u16>;
13#[doc = "Field `adctrl` writer - AES dummy control"]
14pub type AdctrlW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
15#[doc = "Field `dmyctl_rsvd1` reader - reserved"]
16pub type DmyctlRsvd1R = crate::FieldReader;
17impl R {
18    #[doc = "Bits 0:9 - DES dummy control"]
19    #[inline(always)]
20    pub fn ddctrl(&self) -> DdctrlR {
21        DdctrlR::new((self.bits & 0x03ff) as u16)
22    }
23    #[doc = "Bits 10:15 - reserved"]
24    #[inline(always)]
25    pub fn dmyctl_rsvd2(&self) -> DmyctlRsvd2R {
26        DmyctlRsvd2R::new(((self.bits >> 10) & 0x3f) as u8)
27    }
28    #[doc = "Bits 16:25 - AES dummy control"]
29    #[inline(always)]
30    pub fn adctrl(&self) -> AdctrlR {
31        AdctrlR::new(((self.bits >> 16) & 0x03ff) as u16)
32    }
33    #[doc = "Bits 26:31 - reserved"]
34    #[inline(always)]
35    pub fn dmyctl_rsvd1(&self) -> DmyctlRsvd1R {
36        DmyctlRsvd1R::new(((self.bits >> 26) & 0x3f) as u8)
37    }
38}
39#[cfg(feature = "debug")]
40impl core::fmt::Debug for R {
41    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
42        f.debug_struct("sgi_dummy_ctrl")
43            .field("ddctrl", &self.ddctrl())
44            .field("dmyctl_rsvd2", &self.dmyctl_rsvd2())
45            .field("adctrl", &self.adctrl())
46            .field("dmyctl_rsvd1", &self.dmyctl_rsvd1())
47            .finish()
48    }
49}
50impl W {
51    #[doc = "Bits 0:9 - DES dummy control"]
52    #[inline(always)]
53    pub fn ddctrl(&mut self) -> DdctrlW<'_, SgiDummyCtrlSpec> {
54        DdctrlW::new(self, 0)
55    }
56    #[doc = "Bits 16:25 - AES dummy control"]
57    #[inline(always)]
58    pub fn adctrl(&mut self) -> AdctrlW<'_, SgiDummyCtrlSpec> {
59        AdctrlW::new(self, 16)
60    }
61}
62#[doc = "Configuration of dummy controls\n\nYou can [`read`](crate::Reg::read) this register and get [`sgi_dummy_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sgi_dummy_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
63pub struct SgiDummyCtrlSpec;
64impl crate::RegisterSpec for SgiDummyCtrlSpec {
65    type Ux = u32;
66}
67#[doc = "`read()` method returns [`sgi_dummy_ctrl::R`](R) reader structure"]
68impl crate::Readable for SgiDummyCtrlSpec {}
69#[doc = "`write(|w| ..)` method takes [`sgi_dummy_ctrl::W`](W) writer structure"]
70impl crate::Writable for SgiDummyCtrlSpec {
71    type Safety = crate::Unsafe;
72}
73#[doc = "`reset()` method sets sgi_dummy_ctrl to value 0"]
74impl crate::Resettable for SgiDummyCtrlSpec {}
mcxa_pac/sgi0/sgi_dummy_ctrl.rs

mcxa_pac/sgi0/
sgi_dummy_ctrl.rs
