1#[doc = "Register `BAUD` reader"]
2pub type R = crate::R<BaudSpec>;
3#[doc = "Register `BAUD` writer"]
4pub type W = crate::W<BaudSpec>;
5#[doc = "Field `SBR` reader - Baud Rate Modulo Divisor"]
6pub type SbrR = crate::FieldReader<u16>;
7#[doc = "Field `SBR` writer - Baud Rate Modulo Divisor"]
8pub type SbrW<'a, REG> = crate::FieldWriter<'a, REG, 13, u16>;
9#[doc = "Stop Bit Number Select\n\nValue on reset: 0"]
10#[cfg_attr(feature = "defmt", derive(defmt::Format))]
11#[derive(Clone, Copy, Debug, PartialEq, Eq)]
12pub enum Sbns {
13 #[doc = "0: One stop bit"]
14 One = 0,
15 #[doc = "1: Two stop bits"]
16 Two = 1,
17}
18impl From<Sbns> for bool {
19 #[inline(always)]
20 fn from(variant: Sbns) -> Self {
21 variant as u8 != 0
22 }
23}
24#[doc = "Field `SBNS` reader - Stop Bit Number Select"]
25pub type SbnsR = crate::BitReader<Sbns>;
26impl SbnsR {
27 #[doc = "Get enumerated values variant"]
28 #[inline(always)]
29 pub const fn variant(&self) -> Sbns {
30 match self.bits {
31 false => Sbns::One,
32 true => Sbns::Two,
33 }
34 }
35 #[doc = "One stop bit"]
36 #[inline(always)]
37 pub fn is_one(&self) -> bool {
38 *self == Sbns::One
39 }
40 #[doc = "Two stop bits"]
41 #[inline(always)]
42 pub fn is_two(&self) -> bool {
43 *self == Sbns::Two
44 }
45}
46#[doc = "Field `SBNS` writer - Stop Bit Number Select"]
47pub type SbnsW<'a, REG> = crate::BitWriter<'a, REG, Sbns>;
48impl<'a, REG> SbnsW<'a, REG>
49where
50 REG: crate::Writable + crate::RegisterSpec,
51{
52 #[doc = "One stop bit"]
53 #[inline(always)]
54 pub fn one(self) -> &'a mut crate::W<REG> {
55 self.variant(Sbns::One)
56 }
57 #[doc = "Two stop bits"]
58 #[inline(always)]
59 pub fn two(self) -> &'a mut crate::W<REG> {
60 self.variant(Sbns::Two)
61 }
62}
63#[doc = "RX Input Active Edge Interrupt Enable\n\nValue on reset: 0"]
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum Rxedgie {
67 #[doc = "0: Disable"]
68 Disable = 0,
69 #[doc = "1: Enable"]
70 Enable = 1,
71}
72impl From<Rxedgie> for bool {
73 #[inline(always)]
74 fn from(variant: Rxedgie) -> Self {
75 variant as u8 != 0
76 }
77}
78#[doc = "Field `RXEDGIE` reader - RX Input Active Edge Interrupt Enable"]
79pub type RxedgieR = crate::BitReader<Rxedgie>;
80impl RxedgieR {
81 #[doc = "Get enumerated values variant"]
82 #[inline(always)]
83 pub const fn variant(&self) -> Rxedgie {
84 match self.bits {
85 false => Rxedgie::Disable,
86 true => Rxedgie::Enable,
87 }
88 }
89 #[doc = "Disable"]
90 #[inline(always)]
91 pub fn is_disable(&self) -> bool {
92 *self == Rxedgie::Disable
93 }
94 #[doc = "Enable"]
95 #[inline(always)]
96 pub fn is_enable(&self) -> bool {
97 *self == Rxedgie::Enable
98 }
99}
100#[doc = "Field `RXEDGIE` writer - RX Input Active Edge Interrupt Enable"]
101pub type RxedgieW<'a, REG> = crate::BitWriter<'a, REG, Rxedgie>;
102impl<'a, REG> RxedgieW<'a, REG>
103where
104 REG: crate::Writable + crate::RegisterSpec,
105{
106 #[doc = "Disable"]
107 #[inline(always)]
108 pub fn disable(self) -> &'a mut crate::W<REG> {
109 self.variant(Rxedgie::Disable)
110 }
111 #[doc = "Enable"]
112 #[inline(always)]
113 pub fn enable(self) -> &'a mut crate::W<REG> {
114 self.variant(Rxedgie::Enable)
115 }
116}
117#[doc = "LIN Break Detect Interrupt Enable\n\nValue on reset: 0"]
118#[cfg_attr(feature = "defmt", derive(defmt::Format))]
119#[derive(Clone, Copy, Debug, PartialEq, Eq)]
120pub enum Lbkdie {
121 #[doc = "0: Disable"]
122 Disable = 0,
123 #[doc = "1: Enable"]
124 Enable = 1,
125}
126impl From<Lbkdie> for bool {
127 #[inline(always)]
128 fn from(variant: Lbkdie) -> Self {
129 variant as u8 != 0
130 }
131}
132#[doc = "Field `LBKDIE` reader - LIN Break Detect Interrupt Enable"]
133pub type LbkdieR = crate::BitReader<Lbkdie>;
134impl LbkdieR {
135 #[doc = "Get enumerated values variant"]
136 #[inline(always)]
137 pub const fn variant(&self) -> Lbkdie {
138 match self.bits {
139 false => Lbkdie::Disable,
140 true => Lbkdie::Enable,
141 }
142 }
143 #[doc = "Disable"]
144 #[inline(always)]
145 pub fn is_disable(&self) -> bool {
146 *self == Lbkdie::Disable
147 }
148 #[doc = "Enable"]
149 #[inline(always)]
150 pub fn is_enable(&self) -> bool {
151 *self == Lbkdie::Enable
152 }
153}
154#[doc = "Field `LBKDIE` writer - LIN Break Detect Interrupt Enable"]
155pub type LbkdieW<'a, REG> = crate::BitWriter<'a, REG, Lbkdie>;
156impl<'a, REG> LbkdieW<'a, REG>
157where
158 REG: crate::Writable + crate::RegisterSpec,
159{
160 #[doc = "Disable"]
161 #[inline(always)]
162 pub fn disable(self) -> &'a mut crate::W<REG> {
163 self.variant(Lbkdie::Disable)
164 }
165 #[doc = "Enable"]
166 #[inline(always)]
167 pub fn enable(self) -> &'a mut crate::W<REG> {
168 self.variant(Lbkdie::Enable)
169 }
170}
171#[doc = "Resynchronization Disable\n\nValue on reset: 0"]
172#[cfg_attr(feature = "defmt", derive(defmt::Format))]
173#[derive(Clone, Copy, Debug, PartialEq, Eq)]
174pub enum Resyncdis {
175 #[doc = "0: Enable"]
176 Resync = 0,
177 #[doc = "1: Disable"]
178 NoResync = 1,
179}
180impl From<Resyncdis> for bool {
181 #[inline(always)]
182 fn from(variant: Resyncdis) -> Self {
183 variant as u8 != 0
184 }
185}
186#[doc = "Field `RESYNCDIS` reader - Resynchronization Disable"]
187pub type ResyncdisR = crate::BitReader<Resyncdis>;
188impl ResyncdisR {
189 #[doc = "Get enumerated values variant"]
190 #[inline(always)]
191 pub const fn variant(&self) -> Resyncdis {
192 match self.bits {
193 false => Resyncdis::Resync,
194 true => Resyncdis::NoResync,
195 }
196 }
197 #[doc = "Enable"]
198 #[inline(always)]
199 pub fn is_resync(&self) -> bool {
200 *self == Resyncdis::Resync
201 }
202 #[doc = "Disable"]
203 #[inline(always)]
204 pub fn is_no_resync(&self) -> bool {
205 *self == Resyncdis::NoResync
206 }
207}
208#[doc = "Field `RESYNCDIS` writer - Resynchronization Disable"]
209pub type ResyncdisW<'a, REG> = crate::BitWriter<'a, REG, Resyncdis>;
210impl<'a, REG> ResyncdisW<'a, REG>
211where
212 REG: crate::Writable + crate::RegisterSpec,
213{
214 #[doc = "Enable"]
215 #[inline(always)]
216 pub fn resync(self) -> &'a mut crate::W<REG> {
217 self.variant(Resyncdis::Resync)
218 }
219 #[doc = "Disable"]
220 #[inline(always)]
221 pub fn no_resync(self) -> &'a mut crate::W<REG> {
222 self.variant(Resyncdis::NoResync)
223 }
224}
225#[doc = "Both Edge Sampling\n\nValue on reset: 0"]
226#[cfg_attr(feature = "defmt", derive(defmt::Format))]
227#[derive(Clone, Copy, Debug, PartialEq, Eq)]
228pub enum Bothedge {
229 #[doc = "0: Rising edge"]
230 Disabled = 0,
231 #[doc = "1: Both rising and falling edges"]
232 Enabled = 1,
233}
234impl From<Bothedge> for bool {
235 #[inline(always)]
236 fn from(variant: Bothedge) -> Self {
237 variant as u8 != 0
238 }
239}
240#[doc = "Field `BOTHEDGE` reader - Both Edge Sampling"]
241pub type BothedgeR = crate::BitReader<Bothedge>;
242impl BothedgeR {
243 #[doc = "Get enumerated values variant"]
244 #[inline(always)]
245 pub const fn variant(&self) -> Bothedge {
246 match self.bits {
247 false => Bothedge::Disabled,
248 true => Bothedge::Enabled,
249 }
250 }
251 #[doc = "Rising edge"]
252 #[inline(always)]
253 pub fn is_disabled(&self) -> bool {
254 *self == Bothedge::Disabled
255 }
256 #[doc = "Both rising and falling edges"]
257 #[inline(always)]
258 pub fn is_enabled(&self) -> bool {
259 *self == Bothedge::Enabled
260 }
261}
262#[doc = "Field `BOTHEDGE` writer - Both Edge Sampling"]
263pub type BothedgeW<'a, REG> = crate::BitWriter<'a, REG, Bothedge>;
264impl<'a, REG> BothedgeW<'a, REG>
265where
266 REG: crate::Writable + crate::RegisterSpec,
267{
268 #[doc = "Rising edge"]
269 #[inline(always)]
270 pub fn disabled(self) -> &'a mut crate::W<REG> {
271 self.variant(Bothedge::Disabled)
272 }
273 #[doc = "Both rising and falling edges"]
274 #[inline(always)]
275 pub fn enabled(self) -> &'a mut crate::W<REG> {
276 self.variant(Bothedge::Enabled)
277 }
278}
279#[doc = "Match Configuration\n\nValue on reset: 0"]
280#[cfg_attr(feature = "defmt", derive(defmt::Format))]
281#[derive(Clone, Copy, Debug, PartialEq, Eq)]
282#[repr(u8)]
283pub enum Matcfg {
284 #[doc = "0: Address match wake-up"]
285 AddrMatch = 0,
286 #[doc = "1: Idle match wake-up"]
287 IdleMatch = 1,
288 #[doc = "2: Match on and match off"]
289 OnoffMatch = 2,
290 #[doc = "3: Enables RWU on data match and match on or off for the transmitter CTS input"]
291 RwuMatch = 3,
292}
293impl From<Matcfg> for u8 {
294 #[inline(always)]
295 fn from(variant: Matcfg) -> Self {
296 variant as _
297 }
298}
299impl crate::FieldSpec for Matcfg {
300 type Ux = u8;
301}
302impl crate::IsEnum for Matcfg {}
303#[doc = "Field `MATCFG` reader - Match Configuration"]
304pub type MatcfgR = crate::FieldReader<Matcfg>;
305impl MatcfgR {
306 #[doc = "Get enumerated values variant"]
307 #[inline(always)]
308 pub const fn variant(&self) -> Matcfg {
309 match self.bits {
310 0 => Matcfg::AddrMatch,
311 1 => Matcfg::IdleMatch,
312 2 => Matcfg::OnoffMatch,
313 3 => Matcfg::RwuMatch,
314 _ => unreachable!(),
315 }
316 }
317 #[doc = "Address match wake-up"]
318 #[inline(always)]
319 pub fn is_addr_match(&self) -> bool {
320 *self == Matcfg::AddrMatch
321 }
322 #[doc = "Idle match wake-up"]
323 #[inline(always)]
324 pub fn is_idle_match(&self) -> bool {
325 *self == Matcfg::IdleMatch
326 }
327 #[doc = "Match on and match off"]
328 #[inline(always)]
329 pub fn is_onoff_match(&self) -> bool {
330 *self == Matcfg::OnoffMatch
331 }
332 #[doc = "Enables RWU on data match and match on or off for the transmitter CTS input"]
333 #[inline(always)]
334 pub fn is_rwu_match(&self) -> bool {
335 *self == Matcfg::RwuMatch
336 }
337}
338#[doc = "Field `MATCFG` writer - Match Configuration"]
339pub type MatcfgW<'a, REG> = crate::FieldWriter<'a, REG, 2, Matcfg, crate::Safe>;
340impl<'a, REG> MatcfgW<'a, REG>
341where
342 REG: crate::Writable + crate::RegisterSpec,
343 REG::Ux: From<u8>,
344{
345 #[doc = "Address match wake-up"]
346 #[inline(always)]
347 pub fn addr_match(self) -> &'a mut crate::W<REG> {
348 self.variant(Matcfg::AddrMatch)
349 }
350 #[doc = "Idle match wake-up"]
351 #[inline(always)]
352 pub fn idle_match(self) -> &'a mut crate::W<REG> {
353 self.variant(Matcfg::IdleMatch)
354 }
355 #[doc = "Match on and match off"]
356 #[inline(always)]
357 pub fn onoff_match(self) -> &'a mut crate::W<REG> {
358 self.variant(Matcfg::OnoffMatch)
359 }
360 #[doc = "Enables RWU on data match and match on or off for the transmitter CTS input"]
361 #[inline(always)]
362 pub fn rwu_match(self) -> &'a mut crate::W<REG> {
363 self.variant(Matcfg::RwuMatch)
364 }
365}
366#[doc = "Receiver Idle DMA Enable\n\nValue on reset: 0"]
367#[cfg_attr(feature = "defmt", derive(defmt::Format))]
368#[derive(Clone, Copy, Debug, PartialEq, Eq)]
369pub enum Ridmae {
370 #[doc = "0: Disable"]
371 Disabled = 0,
372 #[doc = "1: Enable"]
373 Enabled = 1,
374}
375impl From<Ridmae> for bool {
376 #[inline(always)]
377 fn from(variant: Ridmae) -> Self {
378 variant as u8 != 0
379 }
380}
381#[doc = "Field `RIDMAE` reader - Receiver Idle DMA Enable"]
382pub type RidmaeR = crate::BitReader<Ridmae>;
383impl RidmaeR {
384 #[doc = "Get enumerated values variant"]
385 #[inline(always)]
386 pub const fn variant(&self) -> Ridmae {
387 match self.bits {
388 false => Ridmae::Disabled,
389 true => Ridmae::Enabled,
390 }
391 }
392 #[doc = "Disable"]
393 #[inline(always)]
394 pub fn is_disabled(&self) -> bool {
395 *self == Ridmae::Disabled
396 }
397 #[doc = "Enable"]
398 #[inline(always)]
399 pub fn is_enabled(&self) -> bool {
400 *self == Ridmae::Enabled
401 }
402}
403#[doc = "Field `RIDMAE` writer - Receiver Idle DMA Enable"]
404pub type RidmaeW<'a, REG> = crate::BitWriter<'a, REG, Ridmae>;
405impl<'a, REG> RidmaeW<'a, REG>
406where
407 REG: crate::Writable + crate::RegisterSpec,
408{
409 #[doc = "Disable"]
410 #[inline(always)]
411 pub fn disabled(self) -> &'a mut crate::W<REG> {
412 self.variant(Ridmae::Disabled)
413 }
414 #[doc = "Enable"]
415 #[inline(always)]
416 pub fn enabled(self) -> &'a mut crate::W<REG> {
417 self.variant(Ridmae::Enabled)
418 }
419}
420#[doc = "Receiver Full DMA Enable\n\nValue on reset: 0"]
421#[cfg_attr(feature = "defmt", derive(defmt::Format))]
422#[derive(Clone, Copy, Debug, PartialEq, Eq)]
423pub enum Rdmae {
424 #[doc = "0: Disable"]
425 Disabled = 0,
426 #[doc = "1: Enable"]
427 Enabled = 1,
428}
429impl From<Rdmae> for bool {
430 #[inline(always)]
431 fn from(variant: Rdmae) -> Self {
432 variant as u8 != 0
433 }
434}
435#[doc = "Field `RDMAE` reader - Receiver Full DMA Enable"]
436pub type RdmaeR = crate::BitReader<Rdmae>;
437impl RdmaeR {
438 #[doc = "Get enumerated values variant"]
439 #[inline(always)]
440 pub const fn variant(&self) -> Rdmae {
441 match self.bits {
442 false => Rdmae::Disabled,
443 true => Rdmae::Enabled,
444 }
445 }
446 #[doc = "Disable"]
447 #[inline(always)]
448 pub fn is_disabled(&self) -> bool {
449 *self == Rdmae::Disabled
450 }
451 #[doc = "Enable"]
452 #[inline(always)]
453 pub fn is_enabled(&self) -> bool {
454 *self == Rdmae::Enabled
455 }
456}
457#[doc = "Field `RDMAE` writer - Receiver Full DMA Enable"]
458pub type RdmaeW<'a, REG> = crate::BitWriter<'a, REG, Rdmae>;
459impl<'a, REG> RdmaeW<'a, REG>
460where
461 REG: crate::Writable + crate::RegisterSpec,
462{
463 #[doc = "Disable"]
464 #[inline(always)]
465 pub fn disabled(self) -> &'a mut crate::W<REG> {
466 self.variant(Rdmae::Disabled)
467 }
468 #[doc = "Enable"]
469 #[inline(always)]
470 pub fn enabled(self) -> &'a mut crate::W<REG> {
471 self.variant(Rdmae::Enabled)
472 }
473}
474#[doc = "Transmitter DMA Enable\n\nValue on reset: 0"]
475#[cfg_attr(feature = "defmt", derive(defmt::Format))]
476#[derive(Clone, Copy, Debug, PartialEq, Eq)]
477pub enum Tdmae {
478 #[doc = "0: Disable"]
479 Disabled = 0,
480 #[doc = "1: Enable"]
481 Enabled = 1,
482}
483impl From<Tdmae> for bool {
484 #[inline(always)]
485 fn from(variant: Tdmae) -> Self {
486 variant as u8 != 0
487 }
488}
489#[doc = "Field `TDMAE` reader - Transmitter DMA Enable"]
490pub type TdmaeR = crate::BitReader<Tdmae>;
491impl TdmaeR {
492 #[doc = "Get enumerated values variant"]
493 #[inline(always)]
494 pub const fn variant(&self) -> Tdmae {
495 match self.bits {
496 false => Tdmae::Disabled,
497 true => Tdmae::Enabled,
498 }
499 }
500 #[doc = "Disable"]
501 #[inline(always)]
502 pub fn is_disabled(&self) -> bool {
503 *self == Tdmae::Disabled
504 }
505 #[doc = "Enable"]
506 #[inline(always)]
507 pub fn is_enabled(&self) -> bool {
508 *self == Tdmae::Enabled
509 }
510}
511#[doc = "Field `TDMAE` writer - Transmitter DMA Enable"]
512pub type TdmaeW<'a, REG> = crate::BitWriter<'a, REG, Tdmae>;
513impl<'a, REG> TdmaeW<'a, REG>
514where
515 REG: crate::Writable + crate::RegisterSpec,
516{
517 #[doc = "Disable"]
518 #[inline(always)]
519 pub fn disabled(self) -> &'a mut crate::W<REG> {
520 self.variant(Tdmae::Disabled)
521 }
522 #[doc = "Enable"]
523 #[inline(always)]
524 pub fn enabled(self) -> &'a mut crate::W<REG> {
525 self.variant(Tdmae::Enabled)
526 }
527}
528#[doc = "Oversampling Ratio\n\nValue on reset: 15"]
529#[cfg_attr(feature = "defmt", derive(defmt::Format))]
530#[derive(Clone, Copy, Debug, PartialEq, Eq)]
531#[repr(u8)]
532pub enum Osr {
533 #[doc = "0: Results in an OSR of 16"]
534 Default = 0,
535 #[doc = "3: Results in an OSR of 4 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
536 Osr4 = 3,
537 #[doc = "4: Results in an OSR of 5 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
538 Osr5 = 4,
539 #[doc = "5: Results in an OSR of 6 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
540 Osr6 = 5,
541 #[doc = "6: Results in an OSR of 7 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
542 Osr7 = 6,
543 #[doc = "7: Results in an OSR of 8"]
544 Osr8 = 7,
545 #[doc = "8: Results in an OSR of 9"]
546 Osr9 = 8,
547 #[doc = "9: Results in an OSR of 10"]
548 Osr10 = 9,
549 #[doc = "10: Results in an OSR of 11"]
550 Osr11 = 10,
551 #[doc = "11: Results in an OSR of 12"]
552 Osr12 = 11,
553 #[doc = "12: Results in an OSR of 13"]
554 Osr13 = 12,
555 #[doc = "13: Results in an OSR of 14"]
556 Osr14 = 13,
557 #[doc = "14: Results in an OSR of 15"]
558 Osr15 = 14,
559 #[doc = "15: Results in an OSR of 16"]
560 Osr16 = 15,
561 #[doc = "16: Results in an OSR of 17"]
562 Osr17 = 16,
563 #[doc = "17: Results in an OSR of 18"]
564 Osr18 = 17,
565 #[doc = "18: Results in an OSR of 19"]
566 Osr19 = 18,
567 #[doc = "19: Results in an OSR of 20"]
568 Osr20 = 19,
569 #[doc = "20: Results in an OSR of 21"]
570 Osr21 = 20,
571 #[doc = "21: Results in an OSR of 22"]
572 Osr22 = 21,
573 #[doc = "22: Results in an OSR of 23"]
574 Osr23 = 22,
575 #[doc = "23: Results in an OSR of 24"]
576 Osr24 = 23,
577 #[doc = "24: Results in an OSR of 25"]
578 Osr25 = 24,
579 #[doc = "25: Results in an OSR of 26"]
580 Osr26 = 25,
581 #[doc = "26: Results in an OSR of 27"]
582 Osr27 = 26,
583 #[doc = "27: Results in an OSR of 28"]
584 Osr28 = 27,
585 #[doc = "28: Results in an OSR of 29"]
586 Osr29 = 28,
587 #[doc = "29: Results in an OSR of 30"]
588 Osr30 = 29,
589 #[doc = "30: Results in an OSR of 31"]
590 Osr31 = 30,
591 #[doc = "31: Results in an OSR of 32"]
592 Osr32 = 31,
593}
594impl From<Osr> for u8 {
595 #[inline(always)]
596 fn from(variant: Osr) -> Self {
597 variant as _
598 }
599}
600impl crate::FieldSpec for Osr {
601 type Ux = u8;
602}
603impl crate::IsEnum for Osr {}
604#[doc = "Field `OSR` reader - Oversampling Ratio"]
605pub type OsrR = crate::FieldReader<Osr>;
606impl OsrR {
607 #[doc = "Get enumerated values variant"]
608 #[inline(always)]
609 pub const fn variant(&self) -> Option<Osr> {
610 match self.bits {
611 0 => Some(Osr::Default),
612 3 => Some(Osr::Osr4),
613 4 => Some(Osr::Osr5),
614 5 => Some(Osr::Osr6),
615 6 => Some(Osr::Osr7),
616 7 => Some(Osr::Osr8),
617 8 => Some(Osr::Osr9),
618 9 => Some(Osr::Osr10),
619 10 => Some(Osr::Osr11),
620 11 => Some(Osr::Osr12),
621 12 => Some(Osr::Osr13),
622 13 => Some(Osr::Osr14),
623 14 => Some(Osr::Osr15),
624 15 => Some(Osr::Osr16),
625 16 => Some(Osr::Osr17),
626 17 => Some(Osr::Osr18),
627 18 => Some(Osr::Osr19),
628 19 => Some(Osr::Osr20),
629 20 => Some(Osr::Osr21),
630 21 => Some(Osr::Osr22),
631 22 => Some(Osr::Osr23),
632 23 => Some(Osr::Osr24),
633 24 => Some(Osr::Osr25),
634 25 => Some(Osr::Osr26),
635 26 => Some(Osr::Osr27),
636 27 => Some(Osr::Osr28),
637 28 => Some(Osr::Osr29),
638 29 => Some(Osr::Osr30),
639 30 => Some(Osr::Osr31),
640 31 => Some(Osr::Osr32),
641 _ => None,
642 }
643 }
644 #[doc = "Results in an OSR of 16"]
645 #[inline(always)]
646 pub fn is_default(&self) -> bool {
647 *self == Osr::Default
648 }
649 #[doc = "Results in an OSR of 4 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
650 #[inline(always)]
651 pub fn is_osr_4(&self) -> bool {
652 *self == Osr::Osr4
653 }
654 #[doc = "Results in an OSR of 5 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
655 #[inline(always)]
656 pub fn is_osr_5(&self) -> bool {
657 *self == Osr::Osr5
658 }
659 #[doc = "Results in an OSR of 6 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
660 #[inline(always)]
661 pub fn is_osr_6(&self) -> bool {
662 *self == Osr::Osr6
663 }
664 #[doc = "Results in an OSR of 7 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
665 #[inline(always)]
666 pub fn is_osr_7(&self) -> bool {
667 *self == Osr::Osr7
668 }
669 #[doc = "Results in an OSR of 8"]
670 #[inline(always)]
671 pub fn is_osr_8(&self) -> bool {
672 *self == Osr::Osr8
673 }
674 #[doc = "Results in an OSR of 9"]
675 #[inline(always)]
676 pub fn is_osr_9(&self) -> bool {
677 *self == Osr::Osr9
678 }
679 #[doc = "Results in an OSR of 10"]
680 #[inline(always)]
681 pub fn is_osr_10(&self) -> bool {
682 *self == Osr::Osr10
683 }
684 #[doc = "Results in an OSR of 11"]
685 #[inline(always)]
686 pub fn is_osr_11(&self) -> bool {
687 *self == Osr::Osr11
688 }
689 #[doc = "Results in an OSR of 12"]
690 #[inline(always)]
691 pub fn is_osr_12(&self) -> bool {
692 *self == Osr::Osr12
693 }
694 #[doc = "Results in an OSR of 13"]
695 #[inline(always)]
696 pub fn is_osr_13(&self) -> bool {
697 *self == Osr::Osr13
698 }
699 #[doc = "Results in an OSR of 14"]
700 #[inline(always)]
701 pub fn is_osr_14(&self) -> bool {
702 *self == Osr::Osr14
703 }
704 #[doc = "Results in an OSR of 15"]
705 #[inline(always)]
706 pub fn is_osr_15(&self) -> bool {
707 *self == Osr::Osr15
708 }
709 #[doc = "Results in an OSR of 16"]
710 #[inline(always)]
711 pub fn is_osr_16(&self) -> bool {
712 *self == Osr::Osr16
713 }
714 #[doc = "Results in an OSR of 17"]
715 #[inline(always)]
716 pub fn is_osr_17(&self) -> bool {
717 *self == Osr::Osr17
718 }
719 #[doc = "Results in an OSR of 18"]
720 #[inline(always)]
721 pub fn is_osr_18(&self) -> bool {
722 *self == Osr::Osr18
723 }
724 #[doc = "Results in an OSR of 19"]
725 #[inline(always)]
726 pub fn is_osr_19(&self) -> bool {
727 *self == Osr::Osr19
728 }
729 #[doc = "Results in an OSR of 20"]
730 #[inline(always)]
731 pub fn is_osr_20(&self) -> bool {
732 *self == Osr::Osr20
733 }
734 #[doc = "Results in an OSR of 21"]
735 #[inline(always)]
736 pub fn is_osr_21(&self) -> bool {
737 *self == Osr::Osr21
738 }
739 #[doc = "Results in an OSR of 22"]
740 #[inline(always)]
741 pub fn is_osr_22(&self) -> bool {
742 *self == Osr::Osr22
743 }
744 #[doc = "Results in an OSR of 23"]
745 #[inline(always)]
746 pub fn is_osr_23(&self) -> bool {
747 *self == Osr::Osr23
748 }
749 #[doc = "Results in an OSR of 24"]
750 #[inline(always)]
751 pub fn is_osr_24(&self) -> bool {
752 *self == Osr::Osr24
753 }
754 #[doc = "Results in an OSR of 25"]
755 #[inline(always)]
756 pub fn is_osr_25(&self) -> bool {
757 *self == Osr::Osr25
758 }
759 #[doc = "Results in an OSR of 26"]
760 #[inline(always)]
761 pub fn is_osr_26(&self) -> bool {
762 *self == Osr::Osr26
763 }
764 #[doc = "Results in an OSR of 27"]
765 #[inline(always)]
766 pub fn is_osr_27(&self) -> bool {
767 *self == Osr::Osr27
768 }
769 #[doc = "Results in an OSR of 28"]
770 #[inline(always)]
771 pub fn is_osr_28(&self) -> bool {
772 *self == Osr::Osr28
773 }
774 #[doc = "Results in an OSR of 29"]
775 #[inline(always)]
776 pub fn is_osr_29(&self) -> bool {
777 *self == Osr::Osr29
778 }
779 #[doc = "Results in an OSR of 30"]
780 #[inline(always)]
781 pub fn is_osr_30(&self) -> bool {
782 *self == Osr::Osr30
783 }
784 #[doc = "Results in an OSR of 31"]
785 #[inline(always)]
786 pub fn is_osr_31(&self) -> bool {
787 *self == Osr::Osr31
788 }
789 #[doc = "Results in an OSR of 32"]
790 #[inline(always)]
791 pub fn is_osr_32(&self) -> bool {
792 *self == Osr::Osr32
793 }
794}
795#[doc = "Field `OSR` writer - Oversampling Ratio"]
796pub type OsrW<'a, REG> = crate::FieldWriter<'a, REG, 5, Osr>;
797impl<'a, REG> OsrW<'a, REG>
798where
799 REG: crate::Writable + crate::RegisterSpec,
800 REG::Ux: From<u8>,
801{
802 #[doc = "Results in an OSR of 16"]
803 #[inline(always)]
804 pub fn default(self) -> &'a mut crate::W<REG> {
805 self.variant(Osr::Default)
806 }
807 #[doc = "Results in an OSR of 4 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
808 #[inline(always)]
809 pub fn osr_4(self) -> &'a mut crate::W<REG> {
810 self.variant(Osr::Osr4)
811 }
812 #[doc = "Results in an OSR of 5 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
813 #[inline(always)]
814 pub fn osr_5(self) -> &'a mut crate::W<REG> {
815 self.variant(Osr::Osr5)
816 }
817 #[doc = "Results in an OSR of 6 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
818 #[inline(always)]
819 pub fn osr_6(self) -> &'a mut crate::W<REG> {
820 self.variant(Osr::Osr6)
821 }
822 #[doc = "Results in an OSR of 7 (requires BAUD\\[BOTHEDGE\\] to be 1)"]
823 #[inline(always)]
824 pub fn osr_7(self) -> &'a mut crate::W<REG> {
825 self.variant(Osr::Osr7)
826 }
827 #[doc = "Results in an OSR of 8"]
828 #[inline(always)]
829 pub fn osr_8(self) -> &'a mut crate::W<REG> {
830 self.variant(Osr::Osr8)
831 }
832 #[doc = "Results in an OSR of 9"]
833 #[inline(always)]
834 pub fn osr_9(self) -> &'a mut crate::W<REG> {
835 self.variant(Osr::Osr9)
836 }
837 #[doc = "Results in an OSR of 10"]
838 #[inline(always)]
839 pub fn osr_10(self) -> &'a mut crate::W<REG> {
840 self.variant(Osr::Osr10)
841 }
842 #[doc = "Results in an OSR of 11"]
843 #[inline(always)]
844 pub fn osr_11(self) -> &'a mut crate::W<REG> {
845 self.variant(Osr::Osr11)
846 }
847 #[doc = "Results in an OSR of 12"]
848 #[inline(always)]
849 pub fn osr_12(self) -> &'a mut crate::W<REG> {
850 self.variant(Osr::Osr12)
851 }
852 #[doc = "Results in an OSR of 13"]
853 #[inline(always)]
854 pub fn osr_13(self) -> &'a mut crate::W<REG> {
855 self.variant(Osr::Osr13)
856 }
857 #[doc = "Results in an OSR of 14"]
858 #[inline(always)]
859 pub fn osr_14(self) -> &'a mut crate::W<REG> {
860 self.variant(Osr::Osr14)
861 }
862 #[doc = "Results in an OSR of 15"]
863 #[inline(always)]
864 pub fn osr_15(self) -> &'a mut crate::W<REG> {
865 self.variant(Osr::Osr15)
866 }
867 #[doc = "Results in an OSR of 16"]
868 #[inline(always)]
869 pub fn osr_16(self) -> &'a mut crate::W<REG> {
870 self.variant(Osr::Osr16)
871 }
872 #[doc = "Results in an OSR of 17"]
873 #[inline(always)]
874 pub fn osr_17(self) -> &'a mut crate::W<REG> {
875 self.variant(Osr::Osr17)
876 }
877 #[doc = "Results in an OSR of 18"]
878 #[inline(always)]
879 pub fn osr_18(self) -> &'a mut crate::W<REG> {
880 self.variant(Osr::Osr18)
881 }
882 #[doc = "Results in an OSR of 19"]
883 #[inline(always)]
884 pub fn osr_19(self) -> &'a mut crate::W<REG> {
885 self.variant(Osr::Osr19)
886 }
887 #[doc = "Results in an OSR of 20"]
888 #[inline(always)]
889 pub fn osr_20(self) -> &'a mut crate::W<REG> {
890 self.variant(Osr::Osr20)
891 }
892 #[doc = "Results in an OSR of 21"]
893 #[inline(always)]
894 pub fn osr_21(self) -> &'a mut crate::W<REG> {
895 self.variant(Osr::Osr21)
896 }
897 #[doc = "Results in an OSR of 22"]
898 #[inline(always)]
899 pub fn osr_22(self) -> &'a mut crate::W<REG> {
900 self.variant(Osr::Osr22)
901 }
902 #[doc = "Results in an OSR of 23"]
903 #[inline(always)]
904 pub fn osr_23(self) -> &'a mut crate::W<REG> {
905 self.variant(Osr::Osr23)
906 }
907 #[doc = "Results in an OSR of 24"]
908 #[inline(always)]
909 pub fn osr_24(self) -> &'a mut crate::W<REG> {
910 self.variant(Osr::Osr24)
911 }
912 #[doc = "Results in an OSR of 25"]
913 #[inline(always)]
914 pub fn osr_25(self) -> &'a mut crate::W<REG> {
915 self.variant(Osr::Osr25)
916 }
917 #[doc = "Results in an OSR of 26"]
918 #[inline(always)]
919 pub fn osr_26(self) -> &'a mut crate::W<REG> {
920 self.variant(Osr::Osr26)
921 }
922 #[doc = "Results in an OSR of 27"]
923 #[inline(always)]
924 pub fn osr_27(self) -> &'a mut crate::W<REG> {
925 self.variant(Osr::Osr27)
926 }
927 #[doc = "Results in an OSR of 28"]
928 #[inline(always)]
929 pub fn osr_28(self) -> &'a mut crate::W<REG> {
930 self.variant(Osr::Osr28)
931 }
932 #[doc = "Results in an OSR of 29"]
933 #[inline(always)]
934 pub fn osr_29(self) -> &'a mut crate::W<REG> {
935 self.variant(Osr::Osr29)
936 }
937 #[doc = "Results in an OSR of 30"]
938 #[inline(always)]
939 pub fn osr_30(self) -> &'a mut crate::W<REG> {
940 self.variant(Osr::Osr30)
941 }
942 #[doc = "Results in an OSR of 31"]
943 #[inline(always)]
944 pub fn osr_31(self) -> &'a mut crate::W<REG> {
945 self.variant(Osr::Osr31)
946 }
947 #[doc = "Results in an OSR of 32"]
948 #[inline(always)]
949 pub fn osr_32(self) -> &'a mut crate::W<REG> {
950 self.variant(Osr::Osr32)
951 }
952}
953#[doc = "10-Bit Mode Select\n\nValue on reset: 0"]
954#[cfg_attr(feature = "defmt", derive(defmt::Format))]
955#[derive(Clone, Copy, Debug, PartialEq, Eq)]
956pub enum M10 {
957 #[doc = "0: Receiver and transmitter use 7-bit to 9-bit data characters"]
958 Disabled = 0,
959 #[doc = "1: Receiver and transmitter use 10-bit data characters"]
960 Enabled = 1,
961}
962impl From<M10> for bool {
963 #[inline(always)]
964 fn from(variant: M10) -> Self {
965 variant as u8 != 0
966 }
967}
968#[doc = "Field `M10` reader - 10-Bit Mode Select"]
969pub type M10R = crate::BitReader<M10>;
970impl M10R {
971 #[doc = "Get enumerated values variant"]
972 #[inline(always)]
973 pub const fn variant(&self) -> M10 {
974 match self.bits {
975 false => M10::Disabled,
976 true => M10::Enabled,
977 }
978 }
979 #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters"]
980 #[inline(always)]
981 pub fn is_disabled(&self) -> bool {
982 *self == M10::Disabled
983 }
984 #[doc = "Receiver and transmitter use 10-bit data characters"]
985 #[inline(always)]
986 pub fn is_enabled(&self) -> bool {
987 *self == M10::Enabled
988 }
989}
990#[doc = "Field `M10` writer - 10-Bit Mode Select"]
991pub type M10W<'a, REG> = crate::BitWriter<'a, REG, M10>;
992impl<'a, REG> M10W<'a, REG>
993where
994 REG: crate::Writable + crate::RegisterSpec,
995{
996 #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters"]
997 #[inline(always)]
998 pub fn disabled(self) -> &'a mut crate::W<REG> {
999 self.variant(M10::Disabled)
1000 }
1001 #[doc = "Receiver and transmitter use 10-bit data characters"]
1002 #[inline(always)]
1003 pub fn enabled(self) -> &'a mut crate::W<REG> {
1004 self.variant(M10::Enabled)
1005 }
1006}
1007#[doc = "Match Address Mode Enable 2\n\nValue on reset: 0"]
1008#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1009#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1010pub enum Maen2 {
1011 #[doc = "0: Disable"]
1012 Disabled = 0,
1013 #[doc = "1: Enable"]
1014 Enabled = 1,
1015}
1016impl From<Maen2> for bool {
1017 #[inline(always)]
1018 fn from(variant: Maen2) -> Self {
1019 variant as u8 != 0
1020 }
1021}
1022#[doc = "Field `MAEN2` reader - Match Address Mode Enable 2"]
1023pub type Maen2R = crate::BitReader<Maen2>;
1024impl Maen2R {
1025 #[doc = "Get enumerated values variant"]
1026 #[inline(always)]
1027 pub const fn variant(&self) -> Maen2 {
1028 match self.bits {
1029 false => Maen2::Disabled,
1030 true => Maen2::Enabled,
1031 }
1032 }
1033 #[doc = "Disable"]
1034 #[inline(always)]
1035 pub fn is_disabled(&self) -> bool {
1036 *self == Maen2::Disabled
1037 }
1038 #[doc = "Enable"]
1039 #[inline(always)]
1040 pub fn is_enabled(&self) -> bool {
1041 *self == Maen2::Enabled
1042 }
1043}
1044#[doc = "Field `MAEN2` writer - Match Address Mode Enable 2"]
1045pub type Maen2W<'a, REG> = crate::BitWriter<'a, REG, Maen2>;
1046impl<'a, REG> Maen2W<'a, REG>
1047where
1048 REG: crate::Writable + crate::RegisterSpec,
1049{
1050 #[doc = "Disable"]
1051 #[inline(always)]
1052 pub fn disabled(self) -> &'a mut crate::W<REG> {
1053 self.variant(Maen2::Disabled)
1054 }
1055 #[doc = "Enable"]
1056 #[inline(always)]
1057 pub fn enabled(self) -> &'a mut crate::W<REG> {
1058 self.variant(Maen2::Enabled)
1059 }
1060}
1061#[doc = "Match Address Mode Enable 1\n\nValue on reset: 0"]
1062#[cfg_attr(feature = "defmt", derive(defmt::Format))]
1063#[derive(Clone, Copy, Debug, PartialEq, Eq)]
1064pub enum Maen1 {
1065 #[doc = "0: Disable"]
1066 Disabled = 0,
1067 #[doc = "1: Enable"]
1068 Enabled = 1,
1069}
1070impl From<Maen1> for bool {
1071 #[inline(always)]
1072 fn from(variant: Maen1) -> Self {
1073 variant as u8 != 0
1074 }
1075}
1076#[doc = "Field `MAEN1` reader - Match Address Mode Enable 1"]
1077pub type Maen1R = crate::BitReader<Maen1>;
1078impl Maen1R {
1079 #[doc = "Get enumerated values variant"]
1080 #[inline(always)]
1081 pub const fn variant(&self) -> Maen1 {
1082 match self.bits {
1083 false => Maen1::Disabled,
1084 true => Maen1::Enabled,
1085 }
1086 }
1087 #[doc = "Disable"]
1088 #[inline(always)]
1089 pub fn is_disabled(&self) -> bool {
1090 *self == Maen1::Disabled
1091 }
1092 #[doc = "Enable"]
1093 #[inline(always)]
1094 pub fn is_enabled(&self) -> bool {
1095 *self == Maen1::Enabled
1096 }
1097}
1098#[doc = "Field `MAEN1` writer - Match Address Mode Enable 1"]
1099pub type Maen1W<'a, REG> = crate::BitWriter<'a, REG, Maen1>;
1100impl<'a, REG> Maen1W<'a, REG>
1101where
1102 REG: crate::Writable + crate::RegisterSpec,
1103{
1104 #[doc = "Disable"]
1105 #[inline(always)]
1106 pub fn disabled(self) -> &'a mut crate::W<REG> {
1107 self.variant(Maen1::Disabled)
1108 }
1109 #[doc = "Enable"]
1110 #[inline(always)]
1111 pub fn enabled(self) -> &'a mut crate::W<REG> {
1112 self.variant(Maen1::Enabled)
1113 }
1114}
1115impl R {
1116 #[doc = "Bits 0:12 - Baud Rate Modulo Divisor"]
1117 #[inline(always)]
1118 pub fn sbr(&self) -> SbrR {
1119 SbrR::new((self.bits & 0x1fff) as u16)
1120 }
1121 #[doc = "Bit 13 - Stop Bit Number Select"]
1122 #[inline(always)]
1123 pub fn sbns(&self) -> SbnsR {
1124 SbnsR::new(((self.bits >> 13) & 1) != 0)
1125 }
1126 #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"]
1127 #[inline(always)]
1128 pub fn rxedgie(&self) -> RxedgieR {
1129 RxedgieR::new(((self.bits >> 14) & 1) != 0)
1130 }
1131 #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"]
1132 #[inline(always)]
1133 pub fn lbkdie(&self) -> LbkdieR {
1134 LbkdieR::new(((self.bits >> 15) & 1) != 0)
1135 }
1136 #[doc = "Bit 16 - Resynchronization Disable"]
1137 #[inline(always)]
1138 pub fn resyncdis(&self) -> ResyncdisR {
1139 ResyncdisR::new(((self.bits >> 16) & 1) != 0)
1140 }
1141 #[doc = "Bit 17 - Both Edge Sampling"]
1142 #[inline(always)]
1143 pub fn bothedge(&self) -> BothedgeR {
1144 BothedgeR::new(((self.bits >> 17) & 1) != 0)
1145 }
1146 #[doc = "Bits 18:19 - Match Configuration"]
1147 #[inline(always)]
1148 pub fn matcfg(&self) -> MatcfgR {
1149 MatcfgR::new(((self.bits >> 18) & 3) as u8)
1150 }
1151 #[doc = "Bit 20 - Receiver Idle DMA Enable"]
1152 #[inline(always)]
1153 pub fn ridmae(&self) -> RidmaeR {
1154 RidmaeR::new(((self.bits >> 20) & 1) != 0)
1155 }
1156 #[doc = "Bit 21 - Receiver Full DMA Enable"]
1157 #[inline(always)]
1158 pub fn rdmae(&self) -> RdmaeR {
1159 RdmaeR::new(((self.bits >> 21) & 1) != 0)
1160 }
1161 #[doc = "Bit 23 - Transmitter DMA Enable"]
1162 #[inline(always)]
1163 pub fn tdmae(&self) -> TdmaeR {
1164 TdmaeR::new(((self.bits >> 23) & 1) != 0)
1165 }
1166 #[doc = "Bits 24:28 - Oversampling Ratio"]
1167 #[inline(always)]
1168 pub fn osr(&self) -> OsrR {
1169 OsrR::new(((self.bits >> 24) & 0x1f) as u8)
1170 }
1171 #[doc = "Bit 29 - 10-Bit Mode Select"]
1172 #[inline(always)]
1173 pub fn m10(&self) -> M10R {
1174 M10R::new(((self.bits >> 29) & 1) != 0)
1175 }
1176 #[doc = "Bit 30 - Match Address Mode Enable 2"]
1177 #[inline(always)]
1178 pub fn maen2(&self) -> Maen2R {
1179 Maen2R::new(((self.bits >> 30) & 1) != 0)
1180 }
1181 #[doc = "Bit 31 - Match Address Mode Enable 1"]
1182 #[inline(always)]
1183 pub fn maen1(&self) -> Maen1R {
1184 Maen1R::new(((self.bits >> 31) & 1) != 0)
1185 }
1186}
1187#[cfg(feature = "debug")]
1188impl core::fmt::Debug for R {
1189 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
1190 f.debug_struct("BAUD")
1191 .field("sbr", &self.sbr())
1192 .field("sbns", &self.sbns())
1193 .field("rxedgie", &self.rxedgie())
1194 .field("lbkdie", &self.lbkdie())
1195 .field("resyncdis", &self.resyncdis())
1196 .field("bothedge", &self.bothedge())
1197 .field("matcfg", &self.matcfg())
1198 .field("ridmae", &self.ridmae())
1199 .field("rdmae", &self.rdmae())
1200 .field("tdmae", &self.tdmae())
1201 .field("osr", &self.osr())
1202 .field("m10", &self.m10())
1203 .field("maen2", &self.maen2())
1204 .field("maen1", &self.maen1())
1205 .finish()
1206 }
1207}
1208impl W {
1209 #[doc = "Bits 0:12 - Baud Rate Modulo Divisor"]
1210 #[inline(always)]
1211 pub fn sbr(&mut self) -> SbrW<'_, BaudSpec> {
1212 SbrW::new(self, 0)
1213 }
1214 #[doc = "Bit 13 - Stop Bit Number Select"]
1215 #[inline(always)]
1216 pub fn sbns(&mut self) -> SbnsW<'_, BaudSpec> {
1217 SbnsW::new(self, 13)
1218 }
1219 #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"]
1220 #[inline(always)]
1221 pub fn rxedgie(&mut self) -> RxedgieW<'_, BaudSpec> {
1222 RxedgieW::new(self, 14)
1223 }
1224 #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"]
1225 #[inline(always)]
1226 pub fn lbkdie(&mut self) -> LbkdieW<'_, BaudSpec> {
1227 LbkdieW::new(self, 15)
1228 }
1229 #[doc = "Bit 16 - Resynchronization Disable"]
1230 #[inline(always)]
1231 pub fn resyncdis(&mut self) -> ResyncdisW<'_, BaudSpec> {
1232 ResyncdisW::new(self, 16)
1233 }
1234 #[doc = "Bit 17 - Both Edge Sampling"]
1235 #[inline(always)]
1236 pub fn bothedge(&mut self) -> BothedgeW<'_, BaudSpec> {
1237 BothedgeW::new(self, 17)
1238 }
1239 #[doc = "Bits 18:19 - Match Configuration"]
1240 #[inline(always)]
1241 pub fn matcfg(&mut self) -> MatcfgW<'_, BaudSpec> {
1242 MatcfgW::new(self, 18)
1243 }
1244 #[doc = "Bit 20 - Receiver Idle DMA Enable"]
1245 #[inline(always)]
1246 pub fn ridmae(&mut self) -> RidmaeW<'_, BaudSpec> {
1247 RidmaeW::new(self, 20)
1248 }
1249 #[doc = "Bit 21 - Receiver Full DMA Enable"]
1250 #[inline(always)]
1251 pub fn rdmae(&mut self) -> RdmaeW<'_, BaudSpec> {
1252 RdmaeW::new(self, 21)
1253 }
1254 #[doc = "Bit 23 - Transmitter DMA Enable"]
1255 #[inline(always)]
1256 pub fn tdmae(&mut self) -> TdmaeW<'_, BaudSpec> {
1257 TdmaeW::new(self, 23)
1258 }
1259 #[doc = "Bits 24:28 - Oversampling Ratio"]
1260 #[inline(always)]
1261 pub fn osr(&mut self) -> OsrW<'_, BaudSpec> {
1262 OsrW::new(self, 24)
1263 }
1264 #[doc = "Bit 29 - 10-Bit Mode Select"]
1265 #[inline(always)]
1266 pub fn m10(&mut self) -> M10W<'_, BaudSpec> {
1267 M10W::new(self, 29)
1268 }
1269 #[doc = "Bit 30 - Match Address Mode Enable 2"]
1270 #[inline(always)]
1271 pub fn maen2(&mut self) -> Maen2W<'_, BaudSpec> {
1272 Maen2W::new(self, 30)
1273 }
1274 #[doc = "Bit 31 - Match Address Mode Enable 1"]
1275 #[inline(always)]
1276 pub fn maen1(&mut self) -> Maen1W<'_, BaudSpec> {
1277 Maen1W::new(self, 31)
1278 }
1279}
1280#[doc = "Baud Rate\n\nYou can [`read`](crate::Reg::read) this register and get [`baud::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`baud::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1281pub struct BaudSpec;
1282impl crate::RegisterSpec for BaudSpec {
1283 type Ux = u32;
1284}
1285#[doc = "`read()` method returns [`baud::R`](R) reader structure"]
1286impl crate::Readable for BaudSpec {}
1287#[doc = "`write(|w| ..)` method takes [`baud::W`](W) writer structure"]
1288impl crate::Writable for BaudSpec {
1289 type Safety = crate::Unsafe;
1290}
1291#[doc = "`reset()` method sets BAUD to value 0x0f00_0004"]
1292impl crate::Resettable for BaudSpec {
1293 const RESET_VALUE: u32 = 0x0f00_0004;
1294}