mcxa_pac/lpi2c0/
mcfgr1.rs

1#[doc = "Register `MCFGR1` reader"]
2pub type R = crate::R<Mcfgr1Spec>;
3#[doc = "Register `MCFGR1` writer"]
4pub type W = crate::W<Mcfgr1Spec>;
5#[doc = "Prescaler\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Prescale {
10    #[doc = "0: Divide by 1"]
11    DivideBy1 = 0,
12    #[doc = "1: Divide by 2"]
13    DivideBy2 = 1,
14    #[doc = "2: Divide by 4"]
15    DivideBy4 = 2,
16    #[doc = "3: Divide by 8"]
17    DivideBy8 = 3,
18    #[doc = "4: Divide by 16"]
19    DivideBy16 = 4,
20    #[doc = "5: Divide by 32"]
21    DivideBy32 = 5,
22    #[doc = "6: Divide by 64"]
23    DivideBy64 = 6,
24    #[doc = "7: Divide by 128"]
25    DivideBy128 = 7,
26}
27impl From<Prescale> for u8 {
28    #[inline(always)]
29    fn from(variant: Prescale) -> Self {
30        variant as _
31    }
32}
33impl crate::FieldSpec for Prescale {
34    type Ux = u8;
35}
36impl crate::IsEnum for Prescale {}
37#[doc = "Field `PRESCALE` reader - Prescaler"]
38pub type PrescaleR = crate::FieldReader<Prescale>;
39impl PrescaleR {
40    #[doc = "Get enumerated values variant"]
41    #[inline(always)]
42    pub const fn variant(&self) -> Prescale {
43        match self.bits {
44            0 => Prescale::DivideBy1,
45            1 => Prescale::DivideBy2,
46            2 => Prescale::DivideBy4,
47            3 => Prescale::DivideBy8,
48            4 => Prescale::DivideBy16,
49            5 => Prescale::DivideBy32,
50            6 => Prescale::DivideBy64,
51            7 => Prescale::DivideBy128,
52            _ => unreachable!(),
53        }
54    }
55    #[doc = "Divide by 1"]
56    #[inline(always)]
57    pub fn is_divide_by_1(&self) -> bool {
58        *self == Prescale::DivideBy1
59    }
60    #[doc = "Divide by 2"]
61    #[inline(always)]
62    pub fn is_divide_by_2(&self) -> bool {
63        *self == Prescale::DivideBy2
64    }
65    #[doc = "Divide by 4"]
66    #[inline(always)]
67    pub fn is_divide_by_4(&self) -> bool {
68        *self == Prescale::DivideBy4
69    }
70    #[doc = "Divide by 8"]
71    #[inline(always)]
72    pub fn is_divide_by_8(&self) -> bool {
73        *self == Prescale::DivideBy8
74    }
75    #[doc = "Divide by 16"]
76    #[inline(always)]
77    pub fn is_divide_by_16(&self) -> bool {
78        *self == Prescale::DivideBy16
79    }
80    #[doc = "Divide by 32"]
81    #[inline(always)]
82    pub fn is_divide_by_32(&self) -> bool {
83        *self == Prescale::DivideBy32
84    }
85    #[doc = "Divide by 64"]
86    #[inline(always)]
87    pub fn is_divide_by_64(&self) -> bool {
88        *self == Prescale::DivideBy64
89    }
90    #[doc = "Divide by 128"]
91    #[inline(always)]
92    pub fn is_divide_by_128(&self) -> bool {
93        *self == Prescale::DivideBy128
94    }
95}
96#[doc = "Field `PRESCALE` writer - Prescaler"]
97pub type PrescaleW<'a, REG> = crate::FieldWriter<'a, REG, 3, Prescale, crate::Safe>;
98impl<'a, REG> PrescaleW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101    REG::Ux: From<u8>,
102{
103    #[doc = "Divide by 1"]
104    #[inline(always)]
105    pub fn divide_by_1(self) -> &'a mut crate::W<REG> {
106        self.variant(Prescale::DivideBy1)
107    }
108    #[doc = "Divide by 2"]
109    #[inline(always)]
110    pub fn divide_by_2(self) -> &'a mut crate::W<REG> {
111        self.variant(Prescale::DivideBy2)
112    }
113    #[doc = "Divide by 4"]
114    #[inline(always)]
115    pub fn divide_by_4(self) -> &'a mut crate::W<REG> {
116        self.variant(Prescale::DivideBy4)
117    }
118    #[doc = "Divide by 8"]
119    #[inline(always)]
120    pub fn divide_by_8(self) -> &'a mut crate::W<REG> {
121        self.variant(Prescale::DivideBy8)
122    }
123    #[doc = "Divide by 16"]
124    #[inline(always)]
125    pub fn divide_by_16(self) -> &'a mut crate::W<REG> {
126        self.variant(Prescale::DivideBy16)
127    }
128    #[doc = "Divide by 32"]
129    #[inline(always)]
130    pub fn divide_by_32(self) -> &'a mut crate::W<REG> {
131        self.variant(Prescale::DivideBy32)
132    }
133    #[doc = "Divide by 64"]
134    #[inline(always)]
135    pub fn divide_by_64(self) -> &'a mut crate::W<REG> {
136        self.variant(Prescale::DivideBy64)
137    }
138    #[doc = "Divide by 128"]
139    #[inline(always)]
140    pub fn divide_by_128(self) -> &'a mut crate::W<REG> {
141        self.variant(Prescale::DivideBy128)
142    }
143}
144#[doc = "Automatic Stop Generation\n\nValue on reset: 0"]
145#[cfg_attr(feature = "defmt", derive(defmt::Format))]
146#[derive(Clone, Copy, Debug, PartialEq, Eq)]
147pub enum Autostop {
148    #[doc = "0: No effect"]
149    Disabled = 0,
150    #[doc = "1: Stop automatically generated"]
151    Enabled = 1,
152}
153impl From<Autostop> for bool {
154    #[inline(always)]
155    fn from(variant: Autostop) -> Self {
156        variant as u8 != 0
157    }
158}
159#[doc = "Field `AUTOSTOP` reader - Automatic Stop Generation"]
160pub type AutostopR = crate::BitReader<Autostop>;
161impl AutostopR {
162    #[doc = "Get enumerated values variant"]
163    #[inline(always)]
164    pub const fn variant(&self) -> Autostop {
165        match self.bits {
166            false => Autostop::Disabled,
167            true => Autostop::Enabled,
168        }
169    }
170    #[doc = "No effect"]
171    #[inline(always)]
172    pub fn is_disabled(&self) -> bool {
173        *self == Autostop::Disabled
174    }
175    #[doc = "Stop automatically generated"]
176    #[inline(always)]
177    pub fn is_enabled(&self) -> bool {
178        *self == Autostop::Enabled
179    }
180}
181#[doc = "Field `AUTOSTOP` writer - Automatic Stop Generation"]
182pub type AutostopW<'a, REG> = crate::BitWriter<'a, REG, Autostop>;
183impl<'a, REG> AutostopW<'a, REG>
184where
185    REG: crate::Writable + crate::RegisterSpec,
186{
187    #[doc = "No effect"]
188    #[inline(always)]
189    pub fn disabled(self) -> &'a mut crate::W<REG> {
190        self.variant(Autostop::Disabled)
191    }
192    #[doc = "Stop automatically generated"]
193    #[inline(always)]
194    pub fn enabled(self) -> &'a mut crate::W<REG> {
195        self.variant(Autostop::Enabled)
196    }
197}
198#[doc = "Ignore NACK\n\nValue on reset: 0"]
199#[cfg_attr(feature = "defmt", derive(defmt::Format))]
200#[derive(Clone, Copy, Debug, PartialEq, Eq)]
201pub enum Ignack {
202    #[doc = "0: No effect"]
203    Disabled = 0,
204    #[doc = "1: Treat a received NACK as an ACK"]
205    Enabled = 1,
206}
207impl From<Ignack> for bool {
208    #[inline(always)]
209    fn from(variant: Ignack) -> Self {
210        variant as u8 != 0
211    }
212}
213#[doc = "Field `IGNACK` reader - Ignore NACK"]
214pub type IgnackR = crate::BitReader<Ignack>;
215impl IgnackR {
216    #[doc = "Get enumerated values variant"]
217    #[inline(always)]
218    pub const fn variant(&self) -> Ignack {
219        match self.bits {
220            false => Ignack::Disabled,
221            true => Ignack::Enabled,
222        }
223    }
224    #[doc = "No effect"]
225    #[inline(always)]
226    pub fn is_disabled(&self) -> bool {
227        *self == Ignack::Disabled
228    }
229    #[doc = "Treat a received NACK as an ACK"]
230    #[inline(always)]
231    pub fn is_enabled(&self) -> bool {
232        *self == Ignack::Enabled
233    }
234}
235#[doc = "Field `IGNACK` writer - Ignore NACK"]
236pub type IgnackW<'a, REG> = crate::BitWriter<'a, REG, Ignack>;
237impl<'a, REG> IgnackW<'a, REG>
238where
239    REG: crate::Writable + crate::RegisterSpec,
240{
241    #[doc = "No effect"]
242    #[inline(always)]
243    pub fn disabled(self) -> &'a mut crate::W<REG> {
244        self.variant(Ignack::Disabled)
245    }
246    #[doc = "Treat a received NACK as an ACK"]
247    #[inline(always)]
248    pub fn enabled(self) -> &'a mut crate::W<REG> {
249        self.variant(Ignack::Enabled)
250    }
251}
252#[doc = "Timeout Configuration\n\nValue on reset: 0"]
253#[cfg_attr(feature = "defmt", derive(defmt::Format))]
254#[derive(Clone, Copy, Debug, PartialEq, Eq)]
255pub enum Timecfg {
256    #[doc = "0: SCL"]
257    IfSclLow = 0,
258    #[doc = "1: SCL or SDA"]
259    IfSclOrSdaLow = 1,
260}
261impl From<Timecfg> for bool {
262    #[inline(always)]
263    fn from(variant: Timecfg) -> Self {
264        variant as u8 != 0
265    }
266}
267#[doc = "Field `TIMECFG` reader - Timeout Configuration"]
268pub type TimecfgR = crate::BitReader<Timecfg>;
269impl TimecfgR {
270    #[doc = "Get enumerated values variant"]
271    #[inline(always)]
272    pub const fn variant(&self) -> Timecfg {
273        match self.bits {
274            false => Timecfg::IfSclLow,
275            true => Timecfg::IfSclOrSdaLow,
276        }
277    }
278    #[doc = "SCL"]
279    #[inline(always)]
280    pub fn is_if_scl_low(&self) -> bool {
281        *self == Timecfg::IfSclLow
282    }
283    #[doc = "SCL or SDA"]
284    #[inline(always)]
285    pub fn is_if_scl_or_sda_low(&self) -> bool {
286        *self == Timecfg::IfSclOrSdaLow
287    }
288}
289#[doc = "Field `TIMECFG` writer - Timeout Configuration"]
290pub type TimecfgW<'a, REG> = crate::BitWriter<'a, REG, Timecfg>;
291impl<'a, REG> TimecfgW<'a, REG>
292where
293    REG: crate::Writable + crate::RegisterSpec,
294{
295    #[doc = "SCL"]
296    #[inline(always)]
297    pub fn if_scl_low(self) -> &'a mut crate::W<REG> {
298        self.variant(Timecfg::IfSclLow)
299    }
300    #[doc = "SCL or SDA"]
301    #[inline(always)]
302    pub fn if_scl_or_sda_low(self) -> &'a mut crate::W<REG> {
303        self.variant(Timecfg::IfSclOrSdaLow)
304    }
305}
306#[doc = "Stop Configuration\n\nValue on reset: 0"]
307#[cfg_attr(feature = "defmt", derive(defmt::Format))]
308#[derive(Clone, Copy, Debug, PartialEq, Eq)]
309pub enum Stopcfg {
310    #[doc = "0: Any Stop condition"]
311    AnyStop = 0,
312    #[doc = "1: Last Stop condition"]
313    LastStop = 1,
314}
315impl From<Stopcfg> for bool {
316    #[inline(always)]
317    fn from(variant: Stopcfg) -> Self {
318        variant as u8 != 0
319    }
320}
321#[doc = "Field `STOPCFG` reader - Stop Configuration"]
322pub type StopcfgR = crate::BitReader<Stopcfg>;
323impl StopcfgR {
324    #[doc = "Get enumerated values variant"]
325    #[inline(always)]
326    pub const fn variant(&self) -> Stopcfg {
327        match self.bits {
328            false => Stopcfg::AnyStop,
329            true => Stopcfg::LastStop,
330        }
331    }
332    #[doc = "Any Stop condition"]
333    #[inline(always)]
334    pub fn is_any_stop(&self) -> bool {
335        *self == Stopcfg::AnyStop
336    }
337    #[doc = "Last Stop condition"]
338    #[inline(always)]
339    pub fn is_last_stop(&self) -> bool {
340        *self == Stopcfg::LastStop
341    }
342}
343#[doc = "Field `STOPCFG` writer - Stop Configuration"]
344pub type StopcfgW<'a, REG> = crate::BitWriter<'a, REG, Stopcfg>;
345impl<'a, REG> StopcfgW<'a, REG>
346where
347    REG: crate::Writable + crate::RegisterSpec,
348{
349    #[doc = "Any Stop condition"]
350    #[inline(always)]
351    pub fn any_stop(self) -> &'a mut crate::W<REG> {
352        self.variant(Stopcfg::AnyStop)
353    }
354    #[doc = "Last Stop condition"]
355    #[inline(always)]
356    pub fn last_stop(self) -> &'a mut crate::W<REG> {
357        self.variant(Stopcfg::LastStop)
358    }
359}
360#[doc = "Start Configuration\n\nValue on reset: 0"]
361#[cfg_attr(feature = "defmt", derive(defmt::Format))]
362#[derive(Clone, Copy, Debug, PartialEq, Eq)]
363pub enum Startcfg {
364    #[doc = "0: Sets when both I2C bus and LPI2C controller are idle"]
365    BothI2cAndLpi2cIdle = 0,
366    #[doc = "1: Sets when I2C bus is idle"]
367    I2cIdle = 1,
368}
369impl From<Startcfg> for bool {
370    #[inline(always)]
371    fn from(variant: Startcfg) -> Self {
372        variant as u8 != 0
373    }
374}
375#[doc = "Field `STARTCFG` reader - Start Configuration"]
376pub type StartcfgR = crate::BitReader<Startcfg>;
377impl StartcfgR {
378    #[doc = "Get enumerated values variant"]
379    #[inline(always)]
380    pub const fn variant(&self) -> Startcfg {
381        match self.bits {
382            false => Startcfg::BothI2cAndLpi2cIdle,
383            true => Startcfg::I2cIdle,
384        }
385    }
386    #[doc = "Sets when both I2C bus and LPI2C controller are idle"]
387    #[inline(always)]
388    pub fn is_both_i2c_and_lpi2c_idle(&self) -> bool {
389        *self == Startcfg::BothI2cAndLpi2cIdle
390    }
391    #[doc = "Sets when I2C bus is idle"]
392    #[inline(always)]
393    pub fn is_i2c_idle(&self) -> bool {
394        *self == Startcfg::I2cIdle
395    }
396}
397#[doc = "Field `STARTCFG` writer - Start Configuration"]
398pub type StartcfgW<'a, REG> = crate::BitWriter<'a, REG, Startcfg>;
399impl<'a, REG> StartcfgW<'a, REG>
400where
401    REG: crate::Writable + crate::RegisterSpec,
402{
403    #[doc = "Sets when both I2C bus and LPI2C controller are idle"]
404    #[inline(always)]
405    pub fn both_i2c_and_lpi2c_idle(self) -> &'a mut crate::W<REG> {
406        self.variant(Startcfg::BothI2cAndLpi2cIdle)
407    }
408    #[doc = "Sets when I2C bus is idle"]
409    #[inline(always)]
410    pub fn i2c_idle(self) -> &'a mut crate::W<REG> {
411        self.variant(Startcfg::I2cIdle)
412    }
413}
414#[doc = "Match Configuration\n\nValue on reset: 0"]
415#[cfg_attr(feature = "defmt", derive(defmt::Format))]
416#[derive(Clone, Copy, Debug, PartialEq, Eq)]
417#[repr(u8)]
418pub enum Matcfg {
419    #[doc = "0: Match is disabled"]
420    Disabled = 0,
421    #[doc = "2: Match is enabled: first data word equals MDMR\\[MATCH0\\] OR MDMR\\[MATCH1\\]"]
422    FirstDataWordEqualsMatch0OrMatch1 = 2,
423    #[doc = "3: Match is enabled: any data word equals MDMR\\[MATCH0\\] OR MDMR\\[MATCH1\\]"]
424    AnyDataWordEqualsMatch0OrMatch1 = 3,
425    #[doc = "4: Match is enabled: (first data word equals MDMR\\[MATCH0\\]) AND (second data word equals MDMR\\[MATCH1)"]
426    FirstDataWordMatch0AndSecondDataWordMatch1 = 4,
427    #[doc = "5: Match is enabled: (any data word equals MDMR\\[MATCH0\\]) AND (next data word equals MDMR\\[MATCH1)"]
428    AnyDataWordMatch0NextDataWordMatch1 = 5,
429    #[doc = "6: Match is enabled: (first data word AND MDMR\\[MATCH1\\]) equals (MDMR\\[MATCH0\\] AND MDMR\\[MATCH1\\])"]
430    FirstDataWordAndMatch1EqualsMatch0AndMatch1 = 6,
431    #[doc = "7: Match is enabled: (any data word AND MDMR\\[MATCH1\\]) equals (MDMR\\[MATCH0\\] AND MDMR\\[MATCH1\\])"]
432    AnyDataWordAndMatch1EqualsMatch0AndMatch1 = 7,
433}
434impl From<Matcfg> for u8 {
435    #[inline(always)]
436    fn from(variant: Matcfg) -> Self {
437        variant as _
438    }
439}
440impl crate::FieldSpec for Matcfg {
441    type Ux = u8;
442}
443impl crate::IsEnum for Matcfg {}
444#[doc = "Field `MATCFG` reader - Match Configuration"]
445pub type MatcfgR = crate::FieldReader<Matcfg>;
446impl MatcfgR {
447    #[doc = "Get enumerated values variant"]
448    #[inline(always)]
449    pub const fn variant(&self) -> Option<Matcfg> {
450        match self.bits {
451            0 => Some(Matcfg::Disabled),
452            2 => Some(Matcfg::FirstDataWordEqualsMatch0OrMatch1),
453            3 => Some(Matcfg::AnyDataWordEqualsMatch0OrMatch1),
454            4 => Some(Matcfg::FirstDataWordMatch0AndSecondDataWordMatch1),
455            5 => Some(Matcfg::AnyDataWordMatch0NextDataWordMatch1),
456            6 => Some(Matcfg::FirstDataWordAndMatch1EqualsMatch0AndMatch1),
457            7 => Some(Matcfg::AnyDataWordAndMatch1EqualsMatch0AndMatch1),
458            _ => None,
459        }
460    }
461    #[doc = "Match is disabled"]
462    #[inline(always)]
463    pub fn is_disabled(&self) -> bool {
464        *self == Matcfg::Disabled
465    }
466    #[doc = "Match is enabled: first data word equals MDMR\\[MATCH0\\] OR MDMR\\[MATCH1\\]"]
467    #[inline(always)]
468    pub fn is_first_data_word_equals_match0_or_match1(&self) -> bool {
469        *self == Matcfg::FirstDataWordEqualsMatch0OrMatch1
470    }
471    #[doc = "Match is enabled: any data word equals MDMR\\[MATCH0\\] OR MDMR\\[MATCH1\\]"]
472    #[inline(always)]
473    pub fn is_any_data_word_equals_match0_or_match1(&self) -> bool {
474        *self == Matcfg::AnyDataWordEqualsMatch0OrMatch1
475    }
476    #[doc = "Match is enabled: (first data word equals MDMR\\[MATCH0\\]) AND (second data word equals MDMR\\[MATCH1)"]
477    #[inline(always)]
478    pub fn is_first_data_word_match0_and_second_data_word_match1(&self) -> bool {
479        *self == Matcfg::FirstDataWordMatch0AndSecondDataWordMatch1
480    }
481    #[doc = "Match is enabled: (any data word equals MDMR\\[MATCH0\\]) AND (next data word equals MDMR\\[MATCH1)"]
482    #[inline(always)]
483    pub fn is_any_data_word_match0_next_data_word_match1(&self) -> bool {
484        *self == Matcfg::AnyDataWordMatch0NextDataWordMatch1
485    }
486    #[doc = "Match is enabled: (first data word AND MDMR\\[MATCH1\\]) equals (MDMR\\[MATCH0\\] AND MDMR\\[MATCH1\\])"]
487    #[inline(always)]
488    pub fn is_first_data_word_and_match1_equals_match0_and_match1(&self) -> bool {
489        *self == Matcfg::FirstDataWordAndMatch1EqualsMatch0AndMatch1
490    }
491    #[doc = "Match is enabled: (any data word AND MDMR\\[MATCH1\\]) equals (MDMR\\[MATCH0\\] AND MDMR\\[MATCH1\\])"]
492    #[inline(always)]
493    pub fn is_any_data_word_and_match1_equals_match0_and_match1(&self) -> bool {
494        *self == Matcfg::AnyDataWordAndMatch1EqualsMatch0AndMatch1
495    }
496}
497#[doc = "Field `MATCFG` writer - Match Configuration"]
498pub type MatcfgW<'a, REG> = crate::FieldWriter<'a, REG, 3, Matcfg>;
499impl<'a, REG> MatcfgW<'a, REG>
500where
501    REG: crate::Writable + crate::RegisterSpec,
502    REG::Ux: From<u8>,
503{
504    #[doc = "Match is disabled"]
505    #[inline(always)]
506    pub fn disabled(self) -> &'a mut crate::W<REG> {
507        self.variant(Matcfg::Disabled)
508    }
509    #[doc = "Match is enabled: first data word equals MDMR\\[MATCH0\\] OR MDMR\\[MATCH1\\]"]
510    #[inline(always)]
511    pub fn first_data_word_equals_match0_or_match1(self) -> &'a mut crate::W<REG> {
512        self.variant(Matcfg::FirstDataWordEqualsMatch0OrMatch1)
513    }
514    #[doc = "Match is enabled: any data word equals MDMR\\[MATCH0\\] OR MDMR\\[MATCH1\\]"]
515    #[inline(always)]
516    pub fn any_data_word_equals_match0_or_match1(self) -> &'a mut crate::W<REG> {
517        self.variant(Matcfg::AnyDataWordEqualsMatch0OrMatch1)
518    }
519    #[doc = "Match is enabled: (first data word equals MDMR\\[MATCH0\\]) AND (second data word equals MDMR\\[MATCH1)"]
520    #[inline(always)]
521    pub fn first_data_word_match0_and_second_data_word_match1(self) -> &'a mut crate::W<REG> {
522        self.variant(Matcfg::FirstDataWordMatch0AndSecondDataWordMatch1)
523    }
524    #[doc = "Match is enabled: (any data word equals MDMR\\[MATCH0\\]) AND (next data word equals MDMR\\[MATCH1)"]
525    #[inline(always)]
526    pub fn any_data_word_match0_next_data_word_match1(self) -> &'a mut crate::W<REG> {
527        self.variant(Matcfg::AnyDataWordMatch0NextDataWordMatch1)
528    }
529    #[doc = "Match is enabled: (first data word AND MDMR\\[MATCH1\\]) equals (MDMR\\[MATCH0\\] AND MDMR\\[MATCH1\\])"]
530    #[inline(always)]
531    pub fn first_data_word_and_match1_equals_match0_and_match1(self) -> &'a mut crate::W<REG> {
532        self.variant(Matcfg::FirstDataWordAndMatch1EqualsMatch0AndMatch1)
533    }
534    #[doc = "Match is enabled: (any data word AND MDMR\\[MATCH1\\]) equals (MDMR\\[MATCH0\\] AND MDMR\\[MATCH1\\])"]
535    #[inline(always)]
536    pub fn any_data_word_and_match1_equals_match0_and_match1(self) -> &'a mut crate::W<REG> {
537        self.variant(Matcfg::AnyDataWordAndMatch1EqualsMatch0AndMatch1)
538    }
539}
540#[doc = "Pin Configuration\n\nValue on reset: 0"]
541#[cfg_attr(feature = "defmt", derive(defmt::Format))]
542#[derive(Clone, Copy, Debug, PartialEq, Eq)]
543#[repr(u8)]
544pub enum Pincfg {
545    #[doc = "0: Two-pin open drain mode"]
546    OpenDrain2Pin = 0,
547    #[doc = "1: Two-pin output only mode (Ultra-Fast mode)"]
548    Output2PinOnly = 1,
549    #[doc = "2: Two-pin push-pull mode"]
550    PushPull2Pin = 2,
551    #[doc = "3: Four-pin push-pull mode"]
552    PushPull4Pin = 3,
553    #[doc = "4: Two-pin open-drain mode with separate LPI2C target"]
554    OpenDrain2PinWLpi2cSlave = 4,
555    #[doc = "5: Two-pin output only mode (Ultra-Fast mode) with separate LPI2C target"]
556    Output2PinOnlyWLpi2cSlave = 5,
557    #[doc = "6: Two-pin push-pull mode with separate LPI2C target"]
558    PushPull2PinWLpi2cSlave = 6,
559    #[doc = "7: Four-pin push-pull mode (inverted outputs)"]
560    PushPull4PinWLpi2cSlave = 7,
561}
562impl From<Pincfg> for u8 {
563    #[inline(always)]
564    fn from(variant: Pincfg) -> Self {
565        variant as _
566    }
567}
568impl crate::FieldSpec for Pincfg {
569    type Ux = u8;
570}
571impl crate::IsEnum for Pincfg {}
572#[doc = "Field `PINCFG` reader - Pin Configuration"]
573pub type PincfgR = crate::FieldReader<Pincfg>;
574impl PincfgR {
575    #[doc = "Get enumerated values variant"]
576    #[inline(always)]
577    pub const fn variant(&self) -> Pincfg {
578        match self.bits {
579            0 => Pincfg::OpenDrain2Pin,
580            1 => Pincfg::Output2PinOnly,
581            2 => Pincfg::PushPull2Pin,
582            3 => Pincfg::PushPull4Pin,
583            4 => Pincfg::OpenDrain2PinWLpi2cSlave,
584            5 => Pincfg::Output2PinOnlyWLpi2cSlave,
585            6 => Pincfg::PushPull2PinWLpi2cSlave,
586            7 => Pincfg::PushPull4PinWLpi2cSlave,
587            _ => unreachable!(),
588        }
589    }
590    #[doc = "Two-pin open drain mode"]
591    #[inline(always)]
592    pub fn is_open_drain_2_pin(&self) -> bool {
593        *self == Pincfg::OpenDrain2Pin
594    }
595    #[doc = "Two-pin output only mode (Ultra-Fast mode)"]
596    #[inline(always)]
597    pub fn is_output_2_pin_only(&self) -> bool {
598        *self == Pincfg::Output2PinOnly
599    }
600    #[doc = "Two-pin push-pull mode"]
601    #[inline(always)]
602    pub fn is_push_pull_2_pin(&self) -> bool {
603        *self == Pincfg::PushPull2Pin
604    }
605    #[doc = "Four-pin push-pull mode"]
606    #[inline(always)]
607    pub fn is_push_pull_4_pin(&self) -> bool {
608        *self == Pincfg::PushPull4Pin
609    }
610    #[doc = "Two-pin open-drain mode with separate LPI2C target"]
611    #[inline(always)]
612    pub fn is_open_drain_2_pin_w_lpi2c_slave(&self) -> bool {
613        *self == Pincfg::OpenDrain2PinWLpi2cSlave
614    }
615    #[doc = "Two-pin output only mode (Ultra-Fast mode) with separate LPI2C target"]
616    #[inline(always)]
617    pub fn is_output_2_pin_only_w_lpi2c_slave(&self) -> bool {
618        *self == Pincfg::Output2PinOnlyWLpi2cSlave
619    }
620    #[doc = "Two-pin push-pull mode with separate LPI2C target"]
621    #[inline(always)]
622    pub fn is_push_pull_2_pin_w_lpi2c_slave(&self) -> bool {
623        *self == Pincfg::PushPull2PinWLpi2cSlave
624    }
625    #[doc = "Four-pin push-pull mode (inverted outputs)"]
626    #[inline(always)]
627    pub fn is_push_pull_4_pin_w_lpi2c_slave(&self) -> bool {
628        *self == Pincfg::PushPull4PinWLpi2cSlave
629    }
630}
631#[doc = "Field `PINCFG` writer - Pin Configuration"]
632pub type PincfgW<'a, REG> = crate::FieldWriter<'a, REG, 3, Pincfg, crate::Safe>;
633impl<'a, REG> PincfgW<'a, REG>
634where
635    REG: crate::Writable + crate::RegisterSpec,
636    REG::Ux: From<u8>,
637{
638    #[doc = "Two-pin open drain mode"]
639    #[inline(always)]
640    pub fn open_drain_2_pin(self) -> &'a mut crate::W<REG> {
641        self.variant(Pincfg::OpenDrain2Pin)
642    }
643    #[doc = "Two-pin output only mode (Ultra-Fast mode)"]
644    #[inline(always)]
645    pub fn output_2_pin_only(self) -> &'a mut crate::W<REG> {
646        self.variant(Pincfg::Output2PinOnly)
647    }
648    #[doc = "Two-pin push-pull mode"]
649    #[inline(always)]
650    pub fn push_pull_2_pin(self) -> &'a mut crate::W<REG> {
651        self.variant(Pincfg::PushPull2Pin)
652    }
653    #[doc = "Four-pin push-pull mode"]
654    #[inline(always)]
655    pub fn push_pull_4_pin(self) -> &'a mut crate::W<REG> {
656        self.variant(Pincfg::PushPull4Pin)
657    }
658    #[doc = "Two-pin open-drain mode with separate LPI2C target"]
659    #[inline(always)]
660    pub fn open_drain_2_pin_w_lpi2c_slave(self) -> &'a mut crate::W<REG> {
661        self.variant(Pincfg::OpenDrain2PinWLpi2cSlave)
662    }
663    #[doc = "Two-pin output only mode (Ultra-Fast mode) with separate LPI2C target"]
664    #[inline(always)]
665    pub fn output_2_pin_only_w_lpi2c_slave(self) -> &'a mut crate::W<REG> {
666        self.variant(Pincfg::Output2PinOnlyWLpi2cSlave)
667    }
668    #[doc = "Two-pin push-pull mode with separate LPI2C target"]
669    #[inline(always)]
670    pub fn push_pull_2_pin_w_lpi2c_slave(self) -> &'a mut crate::W<REG> {
671        self.variant(Pincfg::PushPull2PinWLpi2cSlave)
672    }
673    #[doc = "Four-pin push-pull mode (inverted outputs)"]
674    #[inline(always)]
675    pub fn push_pull_4_pin_w_lpi2c_slave(self) -> &'a mut crate::W<REG> {
676        self.variant(Pincfg::PushPull4PinWLpi2cSlave)
677    }
678}
679impl R {
680    #[doc = "Bits 0:2 - Prescaler"]
681    #[inline(always)]
682    pub fn prescale(&self) -> PrescaleR {
683        PrescaleR::new((self.bits & 7) as u8)
684    }
685    #[doc = "Bit 8 - Automatic Stop Generation"]
686    #[inline(always)]
687    pub fn autostop(&self) -> AutostopR {
688        AutostopR::new(((self.bits >> 8) & 1) != 0)
689    }
690    #[doc = "Bit 9 - Ignore NACK"]
691    #[inline(always)]
692    pub fn ignack(&self) -> IgnackR {
693        IgnackR::new(((self.bits >> 9) & 1) != 0)
694    }
695    #[doc = "Bit 10 - Timeout Configuration"]
696    #[inline(always)]
697    pub fn timecfg(&self) -> TimecfgR {
698        TimecfgR::new(((self.bits >> 10) & 1) != 0)
699    }
700    #[doc = "Bit 11 - Stop Configuration"]
701    #[inline(always)]
702    pub fn stopcfg(&self) -> StopcfgR {
703        StopcfgR::new(((self.bits >> 11) & 1) != 0)
704    }
705    #[doc = "Bit 12 - Start Configuration"]
706    #[inline(always)]
707    pub fn startcfg(&self) -> StartcfgR {
708        StartcfgR::new(((self.bits >> 12) & 1) != 0)
709    }
710    #[doc = "Bits 16:18 - Match Configuration"]
711    #[inline(always)]
712    pub fn matcfg(&self) -> MatcfgR {
713        MatcfgR::new(((self.bits >> 16) & 7) as u8)
714    }
715    #[doc = "Bits 24:26 - Pin Configuration"]
716    #[inline(always)]
717    pub fn pincfg(&self) -> PincfgR {
718        PincfgR::new(((self.bits >> 24) & 7) as u8)
719    }
720}
721#[cfg(feature = "debug")]
722impl core::fmt::Debug for R {
723    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
724        f.debug_struct("MCFGR1")
725            .field("prescale", &self.prescale())
726            .field("autostop", &self.autostop())
727            .field("ignack", &self.ignack())
728            .field("timecfg", &self.timecfg())
729            .field("stopcfg", &self.stopcfg())
730            .field("startcfg", &self.startcfg())
731            .field("matcfg", &self.matcfg())
732            .field("pincfg", &self.pincfg())
733            .finish()
734    }
735}
736impl W {
737    #[doc = "Bits 0:2 - Prescaler"]
738    #[inline(always)]
739    pub fn prescale(&mut self) -> PrescaleW<'_, Mcfgr1Spec> {
740        PrescaleW::new(self, 0)
741    }
742    #[doc = "Bit 8 - Automatic Stop Generation"]
743    #[inline(always)]
744    pub fn autostop(&mut self) -> AutostopW<'_, Mcfgr1Spec> {
745        AutostopW::new(self, 8)
746    }
747    #[doc = "Bit 9 - Ignore NACK"]
748    #[inline(always)]
749    pub fn ignack(&mut self) -> IgnackW<'_, Mcfgr1Spec> {
750        IgnackW::new(self, 9)
751    }
752    #[doc = "Bit 10 - Timeout Configuration"]
753    #[inline(always)]
754    pub fn timecfg(&mut self) -> TimecfgW<'_, Mcfgr1Spec> {
755        TimecfgW::new(self, 10)
756    }
757    #[doc = "Bit 11 - Stop Configuration"]
758    #[inline(always)]
759    pub fn stopcfg(&mut self) -> StopcfgW<'_, Mcfgr1Spec> {
760        StopcfgW::new(self, 11)
761    }
762    #[doc = "Bit 12 - Start Configuration"]
763    #[inline(always)]
764    pub fn startcfg(&mut self) -> StartcfgW<'_, Mcfgr1Spec> {
765        StartcfgW::new(self, 12)
766    }
767    #[doc = "Bits 16:18 - Match Configuration"]
768    #[inline(always)]
769    pub fn matcfg(&mut self) -> MatcfgW<'_, Mcfgr1Spec> {
770        MatcfgW::new(self, 16)
771    }
772    #[doc = "Bits 24:26 - Pin Configuration"]
773    #[inline(always)]
774    pub fn pincfg(&mut self) -> PincfgW<'_, Mcfgr1Spec> {
775        PincfgW::new(self, 24)
776    }
777}
778#[doc = "Controller Configuration 1\n\nYou can [`read`](crate::Reg::read) this register and get [`mcfgr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcfgr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
779pub struct Mcfgr1Spec;
780impl crate::RegisterSpec for Mcfgr1Spec {
781    type Ux = u32;
782}
783#[doc = "`read()` method returns [`mcfgr1::R`](R) reader structure"]
784impl crate::Readable for Mcfgr1Spec {}
785#[doc = "`write(|w| ..)` method takes [`mcfgr1::W`](W) writer structure"]
786impl crate::Writable for Mcfgr1Spec {
787    type Safety = crate::Unsafe;
788}
789#[doc = "`reset()` method sets MCFGR1 to value 0"]
790impl crate::Resettable for Mcfgr1Spec {}
mcxa_pac/lpi2c0/mcfgr1.rs

mcxa_pac/lpi2c0/
mcfgr1.rs
