mcxa_pac/i3c0/
mwmsg_ddr_control.rs

1#[doc = "Register `MWMSG_DDR_CONTROL` writer"]
2pub type W = crate::W<MwmsgDdrControlSpec>;
3#[doc = "Field `ADDRCMD` writer - Address Command"]
4pub type AddrcmdW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
5#[cfg(feature = "debug")]
6impl core::fmt::Debug for crate::generic::Reg<MwmsgDdrControlSpec> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bits 0:15 - Address Command"]
13    #[inline(always)]
14    pub fn addrcmd(&mut self) -> AddrcmdW<'_, MwmsgDdrControlSpec> {
15        AddrcmdW::new(self, 0)
16    }
17}
18#[doc = "Controller Write Message in DDR mode: First Control Word\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwmsg_ddr_control::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct MwmsgDdrControlSpec;
20impl crate::RegisterSpec for MwmsgDdrControlSpec {
21    type Ux = u32;
22}
23#[doc = "`write(|w| ..)` method takes [`mwmsg_ddr_control::W`](W) writer structure"]
24impl crate::Writable for MwmsgDdrControlSpec {
25    type Safety = crate::Unsafe;
26}
27#[doc = "`reset()` method sets MWMSG_DDR_CONTROL to value 0"]
28impl crate::Resettable for MwmsgDdrControlSpec {}
mcxa_pac/i3c0/mwmsg_ddr_control.rs

mcxa_pac/i3c0/
mwmsg_ddr_control.rs
