mcxa_pac/i3c0/
mwdatah1.rs

1#[doc = "Register `MWDATAH1` writer"]
2pub type W = crate::W<Mwdatah1Spec>;
3#[doc = "Field `VALUE` writer - Value"]
4pub type ValueW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
5#[cfg(feature = "debug")]
6impl core::fmt::Debug for crate::generic::Reg<Mwdatah1Spec> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bits 0:15 - Value"]
13    #[inline(always)]
14    pub fn value(&mut self) -> ValueW<'_, Mwdatah1Spec> {
15        ValueW::new(self, 0)
16    }
17}
18#[doc = "Controller Write Halfword Data (to Bus)\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mwdatah1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct Mwdatah1Spec;
20impl crate::RegisterSpec for Mwdatah1Spec {
21    type Ux = u32;
22}
23#[doc = "`write(|w| ..)` method takes [`mwdatah1::W`](W) writer structure"]
24impl crate::Writable for Mwdatah1Spec {
25    type Safety = crate::Unsafe;
26}
27#[doc = "`reset()` method sets MWDATAH1 to value 0"]
28impl crate::Resettable for Mwdatah1Spec {}
mcxa_pac/i3c0/mwdatah1.rs

mcxa_pac/i3c0/
mwdatah1.rs
