mcxa_pac/glikey0/
ctrl_0.rs

1#[doc = "Register `CTRL_0` reader"]
2pub type R = crate::R<Ctrl0Spec>;
3#[doc = "Register `CTRL_0` writer"]
4pub type W = crate::W<Ctrl0Spec>;
5#[doc = "Field `WRITE_INDEX` reader - Write Index"]
6pub type WriteIndexR = crate::FieldReader;
7#[doc = "Field `WRITE_INDEX` writer - Write Index"]
8pub type WriteIndexW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `RESERVED15` reader - Reserved for Future Use"]
10pub type Reserved15R = crate::FieldReader;
11#[doc = "Field `WR_EN_0` reader - Write Enable 0"]
12pub type WrEn0R = crate::FieldReader;
13#[doc = "Field `WR_EN_0` writer - Write Enable 0"]
14pub type WrEn0W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
15#[doc = "Soft reset for the core reset (SFR configuration will be preseved).This register reads as 0\n\nValue on reset: 0"]
16#[cfg_attr(feature = "defmt", derive(defmt::Format))]
17#[derive(Clone, Copy, Debug, PartialEq, Eq)]
18pub enum SftRst {
19    #[doc = "0: No effect"]
20    Disable = 0,
21    #[doc = "1: Triggers the soft reset"]
22    Enable = 1,
23}
24impl From<SftRst> for bool {
25    #[inline(always)]
26    fn from(variant: SftRst) -> Self {
27        variant as u8 != 0
28    }
29}
30#[doc = "Field `SFT_RST` reader - Soft reset for the core reset (SFR configuration will be preseved).This register reads as 0"]
31pub type SftRstR = crate::BitReader<SftRst>;
32impl SftRstR {
33    #[doc = "Get enumerated values variant"]
34    #[inline(always)]
35    pub const fn variant(&self) -> SftRst {
36        match self.bits {
37            false => SftRst::Disable,
38            true => SftRst::Enable,
39        }
40    }
41    #[doc = "No effect"]
42    #[inline(always)]
43    pub fn is_disable(&self) -> bool {
44        *self == SftRst::Disable
45    }
46    #[doc = "Triggers the soft reset"]
47    #[inline(always)]
48    pub fn is_enable(&self) -> bool {
49        *self == SftRst::Enable
50    }
51}
52#[doc = "Field `SFT_RST` writer - Soft reset for the core reset (SFR configuration will be preseved).This register reads as 0"]
53pub type SftRstW<'a, REG> = crate::BitWriter<'a, REG, SftRst>;
54impl<'a, REG> SftRstW<'a, REG>
55where
56    REG: crate::Writable + crate::RegisterSpec,
57{
58    #[doc = "No effect"]
59    #[inline(always)]
60    pub fn disable(self) -> &'a mut crate::W<REG> {
61        self.variant(SftRst::Disable)
62    }
63    #[doc = "Triggers the soft reset"]
64    #[inline(always)]
65    pub fn enable(self) -> &'a mut crate::W<REG> {
66        self.variant(SftRst::Enable)
67    }
68}
69#[doc = "Field `RESERVED31` reader - Reserved for Future Use"]
70pub type Reserved31R = crate::FieldReader<u16>;
71impl R {
72    #[doc = "Bits 0:7 - Write Index"]
73    #[inline(always)]
74    pub fn write_index(&self) -> WriteIndexR {
75        WriteIndexR::new((self.bits & 0xff) as u8)
76    }
77    #[doc = "Bits 8:15 - Reserved for Future Use"]
78    #[inline(always)]
79    pub fn reserved15(&self) -> Reserved15R {
80        Reserved15R::new(((self.bits >> 8) & 0xff) as u8)
81    }
82    #[doc = "Bits 16:17 - Write Enable 0"]
83    #[inline(always)]
84    pub fn wr_en_0(&self) -> WrEn0R {
85        WrEn0R::new(((self.bits >> 16) & 3) as u8)
86    }
87    #[doc = "Bit 18 - Soft reset for the core reset (SFR configuration will be preseved).This register reads as 0"]
88    #[inline(always)]
89    pub fn sft_rst(&self) -> SftRstR {
90        SftRstR::new(((self.bits >> 18) & 1) != 0)
91    }
92    #[doc = "Bits 19:31 - Reserved for Future Use"]
93    #[inline(always)]
94    pub fn reserved31(&self) -> Reserved31R {
95        Reserved31R::new(((self.bits >> 19) & 0x1fff) as u16)
96    }
97}
98#[cfg(feature = "debug")]
99impl core::fmt::Debug for R {
100    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
101        f.debug_struct("CTRL_0")
102            .field("write_index", &self.write_index())
103            .field("reserved15", &self.reserved15())
104            .field("wr_en_0", &self.wr_en_0())
105            .field("sft_rst", &self.sft_rst())
106            .field("reserved31", &self.reserved31())
107            .finish()
108    }
109}
110impl W {
111    #[doc = "Bits 0:7 - Write Index"]
112    #[inline(always)]
113    pub fn write_index(&mut self) -> WriteIndexW<'_, Ctrl0Spec> {
114        WriteIndexW::new(self, 0)
115    }
116    #[doc = "Bits 16:17 - Write Enable 0"]
117    #[inline(always)]
118    pub fn wr_en_0(&mut self) -> WrEn0W<'_, Ctrl0Spec> {
119        WrEn0W::new(self, 16)
120    }
121    #[doc = "Bit 18 - Soft reset for the core reset (SFR configuration will be preseved).This register reads as 0"]
122    #[inline(always)]
123    pub fn sft_rst(&mut self) -> SftRstW<'_, Ctrl0Spec> {
124        SftRstW::new(self, 18)
125    }
126}
127#[doc = "Control Register 0 SFR\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
128pub struct Ctrl0Spec;
129impl crate::RegisterSpec for Ctrl0Spec {
130    type Ux = u32;
131}
132#[doc = "`read()` method returns [`ctrl_0::R`](R) reader structure"]
133impl crate::Readable for Ctrl0Spec {}
134#[doc = "`write(|w| ..)` method takes [`ctrl_0::W`](W) writer structure"]
135impl crate::Writable for Ctrl0Spec {
136    type Safety = crate::Unsafe;
137}
138#[doc = "`reset()` method sets CTRL_0 to value 0x0002_0000"]
139impl crate::Resettable for Ctrl0Spec {
140    const RESET_VALUE: u32 = 0x0002_0000;
141}
mcxa_pac/glikey0/ctrl_0.rs

mcxa_pac/glikey0/
ctrl_0.rs
