mcxa_pac/flexpwm0/
sm1cnt.rs

1#[doc = "Register `SM1CNT` reader"]
2pub type R = crate::R<Sm1cntSpec>;
3#[doc = "Field `CNT` reader - Counter Register Bits"]
4pub type CntR = crate::FieldReader<u16>;
5impl R {
6    #[doc = "Bits 0:15 - Counter Register Bits"]
7    #[inline(always)]
8    pub fn cnt(&self) -> CntR {
9        CntR::new(self.bits)
10    }
11}
12#[cfg(feature = "debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("SM1CNT").field("cnt", &self.cnt()).finish()
16    }
17}
18#[doc = "Counter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm1cnt::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct Sm1cntSpec;
20impl crate::RegisterSpec for Sm1cntSpec {
21    type Ux = u16;
22}
23#[doc = "`read()` method returns [`sm1cnt::R`](R) reader structure"]
24impl crate::Readable for Sm1cntSpec {}
25#[doc = "`reset()` method sets SM1CNT to value 0"]
26impl crate::Resettable for Sm1cntSpec {}
mcxa_pac/flexpwm0/sm1cnt.rs

mcxa_pac/flexpwm0/
sm1cnt.rs
