1#[doc = "Register `IER` reader"]
2pub type R = crate::R<IerSpec>;
3#[doc = "Register `IER` writer"]
4pub type W = crate::W<IerSpec>;
5#[doc = "FIFO Full Interrupt Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum FullIe {
9 #[doc = "0: Disables"]
10 Disabled = 0,
11 #[doc = "1: Enables"]
12 Enabled = 1,
13}
14impl From<FullIe> for bool {
15 #[inline(always)]
16 fn from(variant: FullIe) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `FULL_IE` reader - FIFO Full Interrupt Enable"]
21pub type FullIeR = crate::BitReader<FullIe>;
22impl FullIeR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> FullIe {
26 match self.bits {
27 false => FullIe::Disabled,
28 true => FullIe::Enabled,
29 }
30 }
31 #[doc = "Disables"]
32 #[inline(always)]
33 pub fn is_disabled(&self) -> bool {
34 *self == FullIe::Disabled
35 }
36 #[doc = "Enables"]
37 #[inline(always)]
38 pub fn is_enabled(&self) -> bool {
39 *self == FullIe::Enabled
40 }
41}
42#[doc = "Field `FULL_IE` writer - FIFO Full Interrupt Enable"]
43pub type FullIeW<'a, REG> = crate::BitWriter<'a, REG, FullIe>;
44impl<'a, REG> FullIeW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Disables"]
49 #[inline(always)]
50 pub fn disabled(self) -> &'a mut crate::W<REG> {
51 self.variant(FullIe::Disabled)
52 }
53 #[doc = "Enables"]
54 #[inline(always)]
55 pub fn enabled(self) -> &'a mut crate::W<REG> {
56 self.variant(FullIe::Enabled)
57 }
58}
59#[doc = "FIFO Empty Interrupt Enable\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum EmptyIe {
63 #[doc = "0: Disables"]
64 Disabled = 0,
65 #[doc = "1: Enables"]
66 Enabled = 1,
67}
68impl From<EmptyIe> for bool {
69 #[inline(always)]
70 fn from(variant: EmptyIe) -> Self {
71 variant as u8 != 0
72 }
73}
74#[doc = "Field `EMPTY_IE` reader - FIFO Empty Interrupt Enable"]
75pub type EmptyIeR = crate::BitReader<EmptyIe>;
76impl EmptyIeR {
77 #[doc = "Get enumerated values variant"]
78 #[inline(always)]
79 pub const fn variant(&self) -> EmptyIe {
80 match self.bits {
81 false => EmptyIe::Disabled,
82 true => EmptyIe::Enabled,
83 }
84 }
85 #[doc = "Disables"]
86 #[inline(always)]
87 pub fn is_disabled(&self) -> bool {
88 *self == EmptyIe::Disabled
89 }
90 #[doc = "Enables"]
91 #[inline(always)]
92 pub fn is_enabled(&self) -> bool {
93 *self == EmptyIe::Enabled
94 }
95}
96#[doc = "Field `EMPTY_IE` writer - FIFO Empty Interrupt Enable"]
97pub type EmptyIeW<'a, REG> = crate::BitWriter<'a, REG, EmptyIe>;
98impl<'a, REG> EmptyIeW<'a, REG>
99where
100 REG: crate::Writable + crate::RegisterSpec,
101{
102 #[doc = "Disables"]
103 #[inline(always)]
104 pub fn disabled(self) -> &'a mut crate::W<REG> {
105 self.variant(EmptyIe::Disabled)
106 }
107 #[doc = "Enables"]
108 #[inline(always)]
109 pub fn enabled(self) -> &'a mut crate::W<REG> {
110 self.variant(EmptyIe::Enabled)
111 }
112}
113#[doc = "FIFO Watermark Interrupt Enable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum WmIe {
117 #[doc = "0: Disables"]
118 Disabled = 0,
119 #[doc = "1: Enables"]
120 Enabled = 1,
121}
122impl From<WmIe> for bool {
123 #[inline(always)]
124 fn from(variant: WmIe) -> Self {
125 variant as u8 != 0
126 }
127}
128#[doc = "Field `WM_IE` reader - FIFO Watermark Interrupt Enable"]
129pub type WmIeR = crate::BitReader<WmIe>;
130impl WmIeR {
131 #[doc = "Get enumerated values variant"]
132 #[inline(always)]
133 pub const fn variant(&self) -> WmIe {
134 match self.bits {
135 false => WmIe::Disabled,
136 true => WmIe::Enabled,
137 }
138 }
139 #[doc = "Disables"]
140 #[inline(always)]
141 pub fn is_disabled(&self) -> bool {
142 *self == WmIe::Disabled
143 }
144 #[doc = "Enables"]
145 #[inline(always)]
146 pub fn is_enabled(&self) -> bool {
147 *self == WmIe::Enabled
148 }
149}
150#[doc = "Field `WM_IE` writer - FIFO Watermark Interrupt Enable"]
151pub type WmIeW<'a, REG> = crate::BitWriter<'a, REG, WmIe>;
152impl<'a, REG> WmIeW<'a, REG>
153where
154 REG: crate::Writable + crate::RegisterSpec,
155{
156 #[doc = "Disables"]
157 #[inline(always)]
158 pub fn disabled(self) -> &'a mut crate::W<REG> {
159 self.variant(WmIe::Disabled)
160 }
161 #[doc = "Enables"]
162 #[inline(always)]
163 pub fn enabled(self) -> &'a mut crate::W<REG> {
164 self.variant(WmIe::Enabled)
165 }
166}
167#[doc = "Swing Back One Cycle Complete Interrupt Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum SwbkIe {
171 #[doc = "0: Disables"]
172 Disabled = 0,
173 #[doc = "1: Enables"]
174 Enabled = 1,
175}
176impl From<SwbkIe> for bool {
177 #[inline(always)]
178 fn from(variant: SwbkIe) -> Self {
179 variant as u8 != 0
180 }
181}
182#[doc = "Field `SWBK_IE` reader - Swing Back One Cycle Complete Interrupt Enable"]
183pub type SwbkIeR = crate::BitReader<SwbkIe>;
184impl SwbkIeR {
185 #[doc = "Get enumerated values variant"]
186 #[inline(always)]
187 pub const fn variant(&self) -> SwbkIe {
188 match self.bits {
189 false => SwbkIe::Disabled,
190 true => SwbkIe::Enabled,
191 }
192 }
193 #[doc = "Disables"]
194 #[inline(always)]
195 pub fn is_disabled(&self) -> bool {
196 *self == SwbkIe::Disabled
197 }
198 #[doc = "Enables"]
199 #[inline(always)]
200 pub fn is_enabled(&self) -> bool {
201 *self == SwbkIe::Enabled
202 }
203}
204#[doc = "Field `SWBK_IE` writer - Swing Back One Cycle Complete Interrupt Enable"]
205pub type SwbkIeW<'a, REG> = crate::BitWriter<'a, REG, SwbkIe>;
206impl<'a, REG> SwbkIeW<'a, REG>
207where
208 REG: crate::Writable + crate::RegisterSpec,
209{
210 #[doc = "Disables"]
211 #[inline(always)]
212 pub fn disabled(self) -> &'a mut crate::W<REG> {
213 self.variant(SwbkIe::Disabled)
214 }
215 #[doc = "Enables"]
216 #[inline(always)]
217 pub fn enabled(self) -> &'a mut crate::W<REG> {
218 self.variant(SwbkIe::Enabled)
219 }
220}
221#[doc = "FIFO Overflow Interrupt Enable\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum OfIe {
225 #[doc = "0: Disables"]
226 Disabled = 0,
227 #[doc = "1: Enables"]
228 Enabled = 1,
229}
230impl From<OfIe> for bool {
231 #[inline(always)]
232 fn from(variant: OfIe) -> Self {
233 variant as u8 != 0
234 }
235}
236#[doc = "Field `OF_IE` reader - FIFO Overflow Interrupt Enable"]
237pub type OfIeR = crate::BitReader<OfIe>;
238impl OfIeR {
239 #[doc = "Get enumerated values variant"]
240 #[inline(always)]
241 pub const fn variant(&self) -> OfIe {
242 match self.bits {
243 false => OfIe::Disabled,
244 true => OfIe::Enabled,
245 }
246 }
247 #[doc = "Disables"]
248 #[inline(always)]
249 pub fn is_disabled(&self) -> bool {
250 *self == OfIe::Disabled
251 }
252 #[doc = "Enables"]
253 #[inline(always)]
254 pub fn is_enabled(&self) -> bool {
255 *self == OfIe::Enabled
256 }
257}
258#[doc = "Field `OF_IE` writer - FIFO Overflow Interrupt Enable"]
259pub type OfIeW<'a, REG> = crate::BitWriter<'a, REG, OfIe>;
260impl<'a, REG> OfIeW<'a, REG>
261where
262 REG: crate::Writable + crate::RegisterSpec,
263{
264 #[doc = "Disables"]
265 #[inline(always)]
266 pub fn disabled(self) -> &'a mut crate::W<REG> {
267 self.variant(OfIe::Disabled)
268 }
269 #[doc = "Enables"]
270 #[inline(always)]
271 pub fn enabled(self) -> &'a mut crate::W<REG> {
272 self.variant(OfIe::Enabled)
273 }
274}
275#[doc = "FIFO Underflow Interrupt Enable\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum UfIe {
279 #[doc = "0: Disables"]
280 Disabled = 0,
281 #[doc = "1: Enables"]
282 Enabled = 1,
283}
284impl From<UfIe> for bool {
285 #[inline(always)]
286 fn from(variant: UfIe) -> Self {
287 variant as u8 != 0
288 }
289}
290#[doc = "Field `UF_IE` reader - FIFO Underflow Interrupt Enable"]
291pub type UfIeR = crate::BitReader<UfIe>;
292impl UfIeR {
293 #[doc = "Get enumerated values variant"]
294 #[inline(always)]
295 pub const fn variant(&self) -> UfIe {
296 match self.bits {
297 false => UfIe::Disabled,
298 true => UfIe::Enabled,
299 }
300 }
301 #[doc = "Disables"]
302 #[inline(always)]
303 pub fn is_disabled(&self) -> bool {
304 *self == UfIe::Disabled
305 }
306 #[doc = "Enables"]
307 #[inline(always)]
308 pub fn is_enabled(&self) -> bool {
309 *self == UfIe::Enabled
310 }
311}
312#[doc = "Field `UF_IE` writer - FIFO Underflow Interrupt Enable"]
313pub type UfIeW<'a, REG> = crate::BitWriter<'a, REG, UfIe>;
314impl<'a, REG> UfIeW<'a, REG>
315where
316 REG: crate::Writable + crate::RegisterSpec,
317{
318 #[doc = "Disables"]
319 #[inline(always)]
320 pub fn disabled(self) -> &'a mut crate::W<REG> {
321 self.variant(UfIe::Disabled)
322 }
323 #[doc = "Enables"]
324 #[inline(always)]
325 pub fn enabled(self) -> &'a mut crate::W<REG> {
326 self.variant(UfIe::Enabled)
327 }
328}
329#[doc = "PTG Mode Conversion Complete Interrupt Enable\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum PtgcocoIe {
333 #[doc = "0: Disables"]
334 Disabled = 0,
335 #[doc = "1: Enables"]
336 Enabled = 1,
337}
338impl From<PtgcocoIe> for bool {
339 #[inline(always)]
340 fn from(variant: PtgcocoIe) -> Self {
341 variant as u8 != 0
342 }
343}
344#[doc = "Field `PTGCOCO_IE` reader - PTG Mode Conversion Complete Interrupt Enable"]
345pub type PtgcocoIeR = crate::BitReader<PtgcocoIe>;
346impl PtgcocoIeR {
347 #[doc = "Get enumerated values variant"]
348 #[inline(always)]
349 pub const fn variant(&self) -> PtgcocoIe {
350 match self.bits {
351 false => PtgcocoIe::Disabled,
352 true => PtgcocoIe::Enabled,
353 }
354 }
355 #[doc = "Disables"]
356 #[inline(always)]
357 pub fn is_disabled(&self) -> bool {
358 *self == PtgcocoIe::Disabled
359 }
360 #[doc = "Enables"]
361 #[inline(always)]
362 pub fn is_enabled(&self) -> bool {
363 *self == PtgcocoIe::Enabled
364 }
365}
366#[doc = "Field `PTGCOCO_IE` writer - PTG Mode Conversion Complete Interrupt Enable"]
367pub type PtgcocoIeW<'a, REG> = crate::BitWriter<'a, REG, PtgcocoIe>;
368impl<'a, REG> PtgcocoIeW<'a, REG>
369where
370 REG: crate::Writable + crate::RegisterSpec,
371{
372 #[doc = "Disables"]
373 #[inline(always)]
374 pub fn disabled(self) -> &'a mut crate::W<REG> {
375 self.variant(PtgcocoIe::Disabled)
376 }
377 #[doc = "Enables"]
378 #[inline(always)]
379 pub fn enabled(self) -> &'a mut crate::W<REG> {
380 self.variant(PtgcocoIe::Enabled)
381 }
382}
383impl R {
384 #[doc = "Bit 0 - FIFO Full Interrupt Enable"]
385 #[inline(always)]
386 pub fn full_ie(&self) -> FullIeR {
387 FullIeR::new((self.bits & 1) != 0)
388 }
389 #[doc = "Bit 1 - FIFO Empty Interrupt Enable"]
390 #[inline(always)]
391 pub fn empty_ie(&self) -> EmptyIeR {
392 EmptyIeR::new(((self.bits >> 1) & 1) != 0)
393 }
394 #[doc = "Bit 2 - FIFO Watermark Interrupt Enable"]
395 #[inline(always)]
396 pub fn wm_ie(&self) -> WmIeR {
397 WmIeR::new(((self.bits >> 2) & 1) != 0)
398 }
399 #[doc = "Bit 3 - Swing Back One Cycle Complete Interrupt Enable"]
400 #[inline(always)]
401 pub fn swbk_ie(&self) -> SwbkIeR {
402 SwbkIeR::new(((self.bits >> 3) & 1) != 0)
403 }
404 #[doc = "Bit 6 - FIFO Overflow Interrupt Enable"]
405 #[inline(always)]
406 pub fn of_ie(&self) -> OfIeR {
407 OfIeR::new(((self.bits >> 6) & 1) != 0)
408 }
409 #[doc = "Bit 7 - FIFO Underflow Interrupt Enable"]
410 #[inline(always)]
411 pub fn uf_ie(&self) -> UfIeR {
412 UfIeR::new(((self.bits >> 7) & 1) != 0)
413 }
414 #[doc = "Bit 8 - PTG Mode Conversion Complete Interrupt Enable"]
415 #[inline(always)]
416 pub fn ptgcoco_ie(&self) -> PtgcocoIeR {
417 PtgcocoIeR::new(((self.bits >> 8) & 1) != 0)
418 }
419}
420#[cfg(feature = "debug")]
421impl core::fmt::Debug for R {
422 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
423 f.debug_struct("IER")
424 .field("full_ie", &self.full_ie())
425 .field("empty_ie", &self.empty_ie())
426 .field("wm_ie", &self.wm_ie())
427 .field("swbk_ie", &self.swbk_ie())
428 .field("of_ie", &self.of_ie())
429 .field("uf_ie", &self.uf_ie())
430 .field("ptgcoco_ie", &self.ptgcoco_ie())
431 .finish()
432 }
433}
434impl W {
435 #[doc = "Bit 0 - FIFO Full Interrupt Enable"]
436 #[inline(always)]
437 pub fn full_ie(&mut self) -> FullIeW<'_, IerSpec> {
438 FullIeW::new(self, 0)
439 }
440 #[doc = "Bit 1 - FIFO Empty Interrupt Enable"]
441 #[inline(always)]
442 pub fn empty_ie(&mut self) -> EmptyIeW<'_, IerSpec> {
443 EmptyIeW::new(self, 1)
444 }
445 #[doc = "Bit 2 - FIFO Watermark Interrupt Enable"]
446 #[inline(always)]
447 pub fn wm_ie(&mut self) -> WmIeW<'_, IerSpec> {
448 WmIeW::new(self, 2)
449 }
450 #[doc = "Bit 3 - Swing Back One Cycle Complete Interrupt Enable"]
451 #[inline(always)]
452 pub fn swbk_ie(&mut self) -> SwbkIeW<'_, IerSpec> {
453 SwbkIeW::new(self, 3)
454 }
455 #[doc = "Bit 6 - FIFO Overflow Interrupt Enable"]
456 #[inline(always)]
457 pub fn of_ie(&mut self) -> OfIeW<'_, IerSpec> {
458 OfIeW::new(self, 6)
459 }
460 #[doc = "Bit 7 - FIFO Underflow Interrupt Enable"]
461 #[inline(always)]
462 pub fn uf_ie(&mut self) -> UfIeW<'_, IerSpec> {
463 UfIeW::new(self, 7)
464 }
465 #[doc = "Bit 8 - PTG Mode Conversion Complete Interrupt Enable"]
466 #[inline(always)]
467 pub fn ptgcoco_ie(&mut self) -> PtgcocoIeW<'_, IerSpec> {
468 PtgcocoIeW::new(self, 8)
469 }
470}
471#[doc = "Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
472pub struct IerSpec;
473impl crate::RegisterSpec for IerSpec {
474 type Ux = u32;
475}
476#[doc = "`read()` method returns [`ier::R`](R) reader structure"]
477impl crate::Readable for IerSpec {}
478#[doc = "`write(|w| ..)` method takes [`ier::W`](W) writer structure"]
479impl crate::Writable for IerSpec {
480 type Safety = crate::Unsafe;
481}
482#[doc = "`reset()` method sets IER to value 0"]
483impl crate::Resettable for IerSpec {}