1#[doc = "Register `CCR` reader"]
2pub type R = crate::R<CcrSpec>;
3#[doc = "Register `CCR` writer"]
4pub type W = crate::W<CcrSpec>;
5#[doc = "Rising Edge of Capture Channel 0\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Cap0re {
9 #[doc = "0: Does not load"]
10 Cap0re0 = 0,
11 #[doc = "1: Loads"]
12 Capore1 = 1,
13}
14impl From<Cap0re> for bool {
15 #[inline(always)]
16 fn from(variant: Cap0re) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `CAP0RE` reader - Rising Edge of Capture Channel 0"]
21pub type Cap0reR = crate::BitReader<Cap0re>;
22impl Cap0reR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> Cap0re {
26 match self.bits {
27 false => Cap0re::Cap0re0,
28 true => Cap0re::Capore1,
29 }
30 }
31 #[doc = "Does not load"]
32 #[inline(always)]
33 pub fn is_cap0re_0(&self) -> bool {
34 *self == Cap0re::Cap0re0
35 }
36 #[doc = "Loads"]
37 #[inline(always)]
38 pub fn is_capore_1(&self) -> bool {
39 *self == Cap0re::Capore1
40 }
41}
42#[doc = "Field `CAP0RE` writer - Rising Edge of Capture Channel 0"]
43pub type Cap0reW<'a, REG> = crate::BitWriter<'a, REG, Cap0re>;
44impl<'a, REG> Cap0reW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Does not load"]
49 #[inline(always)]
50 pub fn cap0re_0(self) -> &'a mut crate::W<REG> {
51 self.variant(Cap0re::Cap0re0)
52 }
53 #[doc = "Loads"]
54 #[inline(always)]
55 pub fn capore_1(self) -> &'a mut crate::W<REG> {
56 self.variant(Cap0re::Capore1)
57 }
58}
59#[doc = "Falling Edge of Capture Channel 0\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Cap0fe {
63 #[doc = "0: Does not load"]
64 Cap0fe0 = 0,
65 #[doc = "1: Loads"]
66 Capofe1 = 1,
67}
68impl From<Cap0fe> for bool {
69 #[inline(always)]
70 fn from(variant: Cap0fe) -> Self {
71 variant as u8 != 0
72 }
73}
74#[doc = "Field `CAP0FE` reader - Falling Edge of Capture Channel 0"]
75pub type Cap0feR = crate::BitReader<Cap0fe>;
76impl Cap0feR {
77 #[doc = "Get enumerated values variant"]
78 #[inline(always)]
79 pub const fn variant(&self) -> Cap0fe {
80 match self.bits {
81 false => Cap0fe::Cap0fe0,
82 true => Cap0fe::Capofe1,
83 }
84 }
85 #[doc = "Does not load"]
86 #[inline(always)]
87 pub fn is_cap0fe_0(&self) -> bool {
88 *self == Cap0fe::Cap0fe0
89 }
90 #[doc = "Loads"]
91 #[inline(always)]
92 pub fn is_capofe_1(&self) -> bool {
93 *self == Cap0fe::Capofe1
94 }
95}
96#[doc = "Field `CAP0FE` writer - Falling Edge of Capture Channel 0"]
97pub type Cap0feW<'a, REG> = crate::BitWriter<'a, REG, Cap0fe>;
98impl<'a, REG> Cap0feW<'a, REG>
99where
100 REG: crate::Writable + crate::RegisterSpec,
101{
102 #[doc = "Does not load"]
103 #[inline(always)]
104 pub fn cap0fe_0(self) -> &'a mut crate::W<REG> {
105 self.variant(Cap0fe::Cap0fe0)
106 }
107 #[doc = "Loads"]
108 #[inline(always)]
109 pub fn capofe_1(self) -> &'a mut crate::W<REG> {
110 self.variant(Cap0fe::Capofe1)
111 }
112}
113#[doc = "Generate Interrupt on Channel 0 Capture Event\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Cap0i {
117 #[doc = "0: Does not generate"]
118 Cap0i0 = 0,
119 #[doc = "1: Generates"]
120 Capoi1 = 1,
121}
122impl From<Cap0i> for bool {
123 #[inline(always)]
124 fn from(variant: Cap0i) -> Self {
125 variant as u8 != 0
126 }
127}
128#[doc = "Field `CAP0I` reader - Generate Interrupt on Channel 0 Capture Event"]
129pub type Cap0iR = crate::BitReader<Cap0i>;
130impl Cap0iR {
131 #[doc = "Get enumerated values variant"]
132 #[inline(always)]
133 pub const fn variant(&self) -> Cap0i {
134 match self.bits {
135 false => Cap0i::Cap0i0,
136 true => Cap0i::Capoi1,
137 }
138 }
139 #[doc = "Does not generate"]
140 #[inline(always)]
141 pub fn is_cap0i_0(&self) -> bool {
142 *self == Cap0i::Cap0i0
143 }
144 #[doc = "Generates"]
145 #[inline(always)]
146 pub fn is_capoi_1(&self) -> bool {
147 *self == Cap0i::Capoi1
148 }
149}
150#[doc = "Field `CAP0I` writer - Generate Interrupt on Channel 0 Capture Event"]
151pub type Cap0iW<'a, REG> = crate::BitWriter<'a, REG, Cap0i>;
152impl<'a, REG> Cap0iW<'a, REG>
153where
154 REG: crate::Writable + crate::RegisterSpec,
155{
156 #[doc = "Does not generate"]
157 #[inline(always)]
158 pub fn cap0i_0(self) -> &'a mut crate::W<REG> {
159 self.variant(Cap0i::Cap0i0)
160 }
161 #[doc = "Generates"]
162 #[inline(always)]
163 pub fn capoi_1(self) -> &'a mut crate::W<REG> {
164 self.variant(Cap0i::Capoi1)
165 }
166}
167#[doc = "Rising Edge of Capture Channel 1\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Cap1re {
171 #[doc = "0: Does not load"]
172 Cap1re0 = 0,
173 #[doc = "1: Loads"]
174 Cap1re1 = 1,
175}
176impl From<Cap1re> for bool {
177 #[inline(always)]
178 fn from(variant: Cap1re) -> Self {
179 variant as u8 != 0
180 }
181}
182#[doc = "Field `CAP1RE` reader - Rising Edge of Capture Channel 1"]
183pub type Cap1reR = crate::BitReader<Cap1re>;
184impl Cap1reR {
185 #[doc = "Get enumerated values variant"]
186 #[inline(always)]
187 pub const fn variant(&self) -> Cap1re {
188 match self.bits {
189 false => Cap1re::Cap1re0,
190 true => Cap1re::Cap1re1,
191 }
192 }
193 #[doc = "Does not load"]
194 #[inline(always)]
195 pub fn is_cap1re_0(&self) -> bool {
196 *self == Cap1re::Cap1re0
197 }
198 #[doc = "Loads"]
199 #[inline(always)]
200 pub fn is_cap1re_1(&self) -> bool {
201 *self == Cap1re::Cap1re1
202 }
203}
204#[doc = "Field `CAP1RE` writer - Rising Edge of Capture Channel 1"]
205pub type Cap1reW<'a, REG> = crate::BitWriter<'a, REG, Cap1re>;
206impl<'a, REG> Cap1reW<'a, REG>
207where
208 REG: crate::Writable + crate::RegisterSpec,
209{
210 #[doc = "Does not load"]
211 #[inline(always)]
212 pub fn cap1re_0(self) -> &'a mut crate::W<REG> {
213 self.variant(Cap1re::Cap1re0)
214 }
215 #[doc = "Loads"]
216 #[inline(always)]
217 pub fn cap1re_1(self) -> &'a mut crate::W<REG> {
218 self.variant(Cap1re::Cap1re1)
219 }
220}
221#[doc = "Falling Edge of Capture Channel 1\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Cap1fe {
225 #[doc = "0: Does not load"]
226 Cap1fe0 = 0,
227 #[doc = "1: Loads"]
228 Cap1fe1 = 1,
229}
230impl From<Cap1fe> for bool {
231 #[inline(always)]
232 fn from(variant: Cap1fe) -> Self {
233 variant as u8 != 0
234 }
235}
236#[doc = "Field `CAP1FE` reader - Falling Edge of Capture Channel 1"]
237pub type Cap1feR = crate::BitReader<Cap1fe>;
238impl Cap1feR {
239 #[doc = "Get enumerated values variant"]
240 #[inline(always)]
241 pub const fn variant(&self) -> Cap1fe {
242 match self.bits {
243 false => Cap1fe::Cap1fe0,
244 true => Cap1fe::Cap1fe1,
245 }
246 }
247 #[doc = "Does not load"]
248 #[inline(always)]
249 pub fn is_cap1fe_0(&self) -> bool {
250 *self == Cap1fe::Cap1fe0
251 }
252 #[doc = "Loads"]
253 #[inline(always)]
254 pub fn is_cap1fe_1(&self) -> bool {
255 *self == Cap1fe::Cap1fe1
256 }
257}
258#[doc = "Field `CAP1FE` writer - Falling Edge of Capture Channel 1"]
259pub type Cap1feW<'a, REG> = crate::BitWriter<'a, REG, Cap1fe>;
260impl<'a, REG> Cap1feW<'a, REG>
261where
262 REG: crate::Writable + crate::RegisterSpec,
263{
264 #[doc = "Does not load"]
265 #[inline(always)]
266 pub fn cap1fe_0(self) -> &'a mut crate::W<REG> {
267 self.variant(Cap1fe::Cap1fe0)
268 }
269 #[doc = "Loads"]
270 #[inline(always)]
271 pub fn cap1fe_1(self) -> &'a mut crate::W<REG> {
272 self.variant(Cap1fe::Cap1fe1)
273 }
274}
275#[doc = "Generate Interrupt on Channel 1 Capture Event\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Cap1i {
279 #[doc = "0: Does not generates"]
280 Cap1i0 = 0,
281 #[doc = "1: Generates"]
282 Cap1i1 = 1,
283}
284impl From<Cap1i> for bool {
285 #[inline(always)]
286 fn from(variant: Cap1i) -> Self {
287 variant as u8 != 0
288 }
289}
290#[doc = "Field `CAP1I` reader - Generate Interrupt on Channel 1 Capture Event"]
291pub type Cap1iR = crate::BitReader<Cap1i>;
292impl Cap1iR {
293 #[doc = "Get enumerated values variant"]
294 #[inline(always)]
295 pub const fn variant(&self) -> Cap1i {
296 match self.bits {
297 false => Cap1i::Cap1i0,
298 true => Cap1i::Cap1i1,
299 }
300 }
301 #[doc = "Does not generates"]
302 #[inline(always)]
303 pub fn is_cap1i_0(&self) -> bool {
304 *self == Cap1i::Cap1i0
305 }
306 #[doc = "Generates"]
307 #[inline(always)]
308 pub fn is_cap1i_1(&self) -> bool {
309 *self == Cap1i::Cap1i1
310 }
311}
312#[doc = "Field `CAP1I` writer - Generate Interrupt on Channel 1 Capture Event"]
313pub type Cap1iW<'a, REG> = crate::BitWriter<'a, REG, Cap1i>;
314impl<'a, REG> Cap1iW<'a, REG>
315where
316 REG: crate::Writable + crate::RegisterSpec,
317{
318 #[doc = "Does not generates"]
319 #[inline(always)]
320 pub fn cap1i_0(self) -> &'a mut crate::W<REG> {
321 self.variant(Cap1i::Cap1i0)
322 }
323 #[doc = "Generates"]
324 #[inline(always)]
325 pub fn cap1i_1(self) -> &'a mut crate::W<REG> {
326 self.variant(Cap1i::Cap1i1)
327 }
328}
329#[doc = "Rising Edge of Capture Channel 2\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Cap2re {
333 #[doc = "0: Does not load"]
334 Cap2re0 = 0,
335 #[doc = "1: Loads"]
336 Cap2re1 = 1,
337}
338impl From<Cap2re> for bool {
339 #[inline(always)]
340 fn from(variant: Cap2re) -> Self {
341 variant as u8 != 0
342 }
343}
344#[doc = "Field `CAP2RE` reader - Rising Edge of Capture Channel 2"]
345pub type Cap2reR = crate::BitReader<Cap2re>;
346impl Cap2reR {
347 #[doc = "Get enumerated values variant"]
348 #[inline(always)]
349 pub const fn variant(&self) -> Cap2re {
350 match self.bits {
351 false => Cap2re::Cap2re0,
352 true => Cap2re::Cap2re1,
353 }
354 }
355 #[doc = "Does not load"]
356 #[inline(always)]
357 pub fn is_cap2re_0(&self) -> bool {
358 *self == Cap2re::Cap2re0
359 }
360 #[doc = "Loads"]
361 #[inline(always)]
362 pub fn is_cap2re_1(&self) -> bool {
363 *self == Cap2re::Cap2re1
364 }
365}
366#[doc = "Field `CAP2RE` writer - Rising Edge of Capture Channel 2"]
367pub type Cap2reW<'a, REG> = crate::BitWriter<'a, REG, Cap2re>;
368impl<'a, REG> Cap2reW<'a, REG>
369where
370 REG: crate::Writable + crate::RegisterSpec,
371{
372 #[doc = "Does not load"]
373 #[inline(always)]
374 pub fn cap2re_0(self) -> &'a mut crate::W<REG> {
375 self.variant(Cap2re::Cap2re0)
376 }
377 #[doc = "Loads"]
378 #[inline(always)]
379 pub fn cap2re_1(self) -> &'a mut crate::W<REG> {
380 self.variant(Cap2re::Cap2re1)
381 }
382}
383#[doc = "Falling Edge of Capture Channel 2\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Cap2fe {
387 #[doc = "0: Does not load"]
388 Cap2fe0 = 0,
389 #[doc = "1: Loads"]
390 Cap2fe1 = 1,
391}
392impl From<Cap2fe> for bool {
393 #[inline(always)]
394 fn from(variant: Cap2fe) -> Self {
395 variant as u8 != 0
396 }
397}
398#[doc = "Field `CAP2FE` reader - Falling Edge of Capture Channel 2"]
399pub type Cap2feR = crate::BitReader<Cap2fe>;
400impl Cap2feR {
401 #[doc = "Get enumerated values variant"]
402 #[inline(always)]
403 pub const fn variant(&self) -> Cap2fe {
404 match self.bits {
405 false => Cap2fe::Cap2fe0,
406 true => Cap2fe::Cap2fe1,
407 }
408 }
409 #[doc = "Does not load"]
410 #[inline(always)]
411 pub fn is_cap2fe_0(&self) -> bool {
412 *self == Cap2fe::Cap2fe0
413 }
414 #[doc = "Loads"]
415 #[inline(always)]
416 pub fn is_cap2fe_1(&self) -> bool {
417 *self == Cap2fe::Cap2fe1
418 }
419}
420#[doc = "Field `CAP2FE` writer - Falling Edge of Capture Channel 2"]
421pub type Cap2feW<'a, REG> = crate::BitWriter<'a, REG, Cap2fe>;
422impl<'a, REG> Cap2feW<'a, REG>
423where
424 REG: crate::Writable + crate::RegisterSpec,
425{
426 #[doc = "Does not load"]
427 #[inline(always)]
428 pub fn cap2fe_0(self) -> &'a mut crate::W<REG> {
429 self.variant(Cap2fe::Cap2fe0)
430 }
431 #[doc = "Loads"]
432 #[inline(always)]
433 pub fn cap2fe_1(self) -> &'a mut crate::W<REG> {
434 self.variant(Cap2fe::Cap2fe1)
435 }
436}
437#[doc = "Generate Interrupt on Channel 2 Capture Event\n\nValue on reset: 0"]
438#[cfg_attr(feature = "defmt", derive(defmt::Format))]
439#[derive(Clone, Copy, Debug, PartialEq, Eq)]
440pub enum Cap2i {
441 #[doc = "0: Does not generate"]
442 Cap2i0 = 0,
443 #[doc = "1: Generates"]
444 Cap2i1 = 1,
445}
446impl From<Cap2i> for bool {
447 #[inline(always)]
448 fn from(variant: Cap2i) -> Self {
449 variant as u8 != 0
450 }
451}
452#[doc = "Field `CAP2I` reader - Generate Interrupt on Channel 2 Capture Event"]
453pub type Cap2iR = crate::BitReader<Cap2i>;
454impl Cap2iR {
455 #[doc = "Get enumerated values variant"]
456 #[inline(always)]
457 pub const fn variant(&self) -> Cap2i {
458 match self.bits {
459 false => Cap2i::Cap2i0,
460 true => Cap2i::Cap2i1,
461 }
462 }
463 #[doc = "Does not generate"]
464 #[inline(always)]
465 pub fn is_cap2i_0(&self) -> bool {
466 *self == Cap2i::Cap2i0
467 }
468 #[doc = "Generates"]
469 #[inline(always)]
470 pub fn is_cap2i_1(&self) -> bool {
471 *self == Cap2i::Cap2i1
472 }
473}
474#[doc = "Field `CAP2I` writer - Generate Interrupt on Channel 2 Capture Event"]
475pub type Cap2iW<'a, REG> = crate::BitWriter<'a, REG, Cap2i>;
476impl<'a, REG> Cap2iW<'a, REG>
477where
478 REG: crate::Writable + crate::RegisterSpec,
479{
480 #[doc = "Does not generate"]
481 #[inline(always)]
482 pub fn cap2i_0(self) -> &'a mut crate::W<REG> {
483 self.variant(Cap2i::Cap2i0)
484 }
485 #[doc = "Generates"]
486 #[inline(always)]
487 pub fn cap2i_1(self) -> &'a mut crate::W<REG> {
488 self.variant(Cap2i::Cap2i1)
489 }
490}
491#[doc = "Rising Edge of Capture Channel 3\n\nValue on reset: 0"]
492#[cfg_attr(feature = "defmt", derive(defmt::Format))]
493#[derive(Clone, Copy, Debug, PartialEq, Eq)]
494pub enum Cap3re {
495 #[doc = "0: Does not load"]
496 Cap3re0 = 0,
497 #[doc = "1: Loads"]
498 Cap3re1 = 1,
499}
500impl From<Cap3re> for bool {
501 #[inline(always)]
502 fn from(variant: Cap3re) -> Self {
503 variant as u8 != 0
504 }
505}
506#[doc = "Field `CAP3RE` reader - Rising Edge of Capture Channel 3"]
507pub type Cap3reR = crate::BitReader<Cap3re>;
508impl Cap3reR {
509 #[doc = "Get enumerated values variant"]
510 #[inline(always)]
511 pub const fn variant(&self) -> Cap3re {
512 match self.bits {
513 false => Cap3re::Cap3re0,
514 true => Cap3re::Cap3re1,
515 }
516 }
517 #[doc = "Does not load"]
518 #[inline(always)]
519 pub fn is_cap3re_0(&self) -> bool {
520 *self == Cap3re::Cap3re0
521 }
522 #[doc = "Loads"]
523 #[inline(always)]
524 pub fn is_cap3re_1(&self) -> bool {
525 *self == Cap3re::Cap3re1
526 }
527}
528#[doc = "Field `CAP3RE` writer - Rising Edge of Capture Channel 3"]
529pub type Cap3reW<'a, REG> = crate::BitWriter<'a, REG, Cap3re>;
530impl<'a, REG> Cap3reW<'a, REG>
531where
532 REG: crate::Writable + crate::RegisterSpec,
533{
534 #[doc = "Does not load"]
535 #[inline(always)]
536 pub fn cap3re_0(self) -> &'a mut crate::W<REG> {
537 self.variant(Cap3re::Cap3re0)
538 }
539 #[doc = "Loads"]
540 #[inline(always)]
541 pub fn cap3re_1(self) -> &'a mut crate::W<REG> {
542 self.variant(Cap3re::Cap3re1)
543 }
544}
545#[doc = "Falling Edge of Capture Channel 3\n\nValue on reset: 0"]
546#[cfg_attr(feature = "defmt", derive(defmt::Format))]
547#[derive(Clone, Copy, Debug, PartialEq, Eq)]
548pub enum Cap3fe {
549 #[doc = "0: Does not load"]
550 Cap3fe0 = 0,
551 #[doc = "1: Loads"]
552 Cap3fe1 = 1,
553}
554impl From<Cap3fe> for bool {
555 #[inline(always)]
556 fn from(variant: Cap3fe) -> Self {
557 variant as u8 != 0
558 }
559}
560#[doc = "Field `CAP3FE` reader - Falling Edge of Capture Channel 3"]
561pub type Cap3feR = crate::BitReader<Cap3fe>;
562impl Cap3feR {
563 #[doc = "Get enumerated values variant"]
564 #[inline(always)]
565 pub const fn variant(&self) -> Cap3fe {
566 match self.bits {
567 false => Cap3fe::Cap3fe0,
568 true => Cap3fe::Cap3fe1,
569 }
570 }
571 #[doc = "Does not load"]
572 #[inline(always)]
573 pub fn is_cap3fe_0(&self) -> bool {
574 *self == Cap3fe::Cap3fe0
575 }
576 #[doc = "Loads"]
577 #[inline(always)]
578 pub fn is_cap3fe_1(&self) -> bool {
579 *self == Cap3fe::Cap3fe1
580 }
581}
582#[doc = "Field `CAP3FE` writer - Falling Edge of Capture Channel 3"]
583pub type Cap3feW<'a, REG> = crate::BitWriter<'a, REG, Cap3fe>;
584impl<'a, REG> Cap3feW<'a, REG>
585where
586 REG: crate::Writable + crate::RegisterSpec,
587{
588 #[doc = "Does not load"]
589 #[inline(always)]
590 pub fn cap3fe_0(self) -> &'a mut crate::W<REG> {
591 self.variant(Cap3fe::Cap3fe0)
592 }
593 #[doc = "Loads"]
594 #[inline(always)]
595 pub fn cap3fe_1(self) -> &'a mut crate::W<REG> {
596 self.variant(Cap3fe::Cap3fe1)
597 }
598}
599#[doc = "Generate Interrupt on Channel 3 Capture Event\n\nValue on reset: 0"]
600#[cfg_attr(feature = "defmt", derive(defmt::Format))]
601#[derive(Clone, Copy, Debug, PartialEq, Eq)]
602pub enum Cap3i {
603 #[doc = "0: Does not generate"]
604 Cap3i0 = 0,
605 #[doc = "1: Generates"]
606 Cap3i1 = 1,
607}
608impl From<Cap3i> for bool {
609 #[inline(always)]
610 fn from(variant: Cap3i) -> Self {
611 variant as u8 != 0
612 }
613}
614#[doc = "Field `CAP3I` reader - Generate Interrupt on Channel 3 Capture Event"]
615pub type Cap3iR = crate::BitReader<Cap3i>;
616impl Cap3iR {
617 #[doc = "Get enumerated values variant"]
618 #[inline(always)]
619 pub const fn variant(&self) -> Cap3i {
620 match self.bits {
621 false => Cap3i::Cap3i0,
622 true => Cap3i::Cap3i1,
623 }
624 }
625 #[doc = "Does not generate"]
626 #[inline(always)]
627 pub fn is_cap3i_0(&self) -> bool {
628 *self == Cap3i::Cap3i0
629 }
630 #[doc = "Generates"]
631 #[inline(always)]
632 pub fn is_cap3i_1(&self) -> bool {
633 *self == Cap3i::Cap3i1
634 }
635}
636#[doc = "Field `CAP3I` writer - Generate Interrupt on Channel 3 Capture Event"]
637pub type Cap3iW<'a, REG> = crate::BitWriter<'a, REG, Cap3i>;
638impl<'a, REG> Cap3iW<'a, REG>
639where
640 REG: crate::Writable + crate::RegisterSpec,
641{
642 #[doc = "Does not generate"]
643 #[inline(always)]
644 pub fn cap3i_0(self) -> &'a mut crate::W<REG> {
645 self.variant(Cap3i::Cap3i0)
646 }
647 #[doc = "Generates"]
648 #[inline(always)]
649 pub fn cap3i_1(self) -> &'a mut crate::W<REG> {
650 self.variant(Cap3i::Cap3i1)
651 }
652}
653impl R {
654 #[doc = "Bit 0 - Rising Edge of Capture Channel 0"]
655 #[inline(always)]
656 pub fn cap0re(&self) -> Cap0reR {
657 Cap0reR::new((self.bits & 1) != 0)
658 }
659 #[doc = "Bit 1 - Falling Edge of Capture Channel 0"]
660 #[inline(always)]
661 pub fn cap0fe(&self) -> Cap0feR {
662 Cap0feR::new(((self.bits >> 1) & 1) != 0)
663 }
664 #[doc = "Bit 2 - Generate Interrupt on Channel 0 Capture Event"]
665 #[inline(always)]
666 pub fn cap0i(&self) -> Cap0iR {
667 Cap0iR::new(((self.bits >> 2) & 1) != 0)
668 }
669 #[doc = "Bit 3 - Rising Edge of Capture Channel 1"]
670 #[inline(always)]
671 pub fn cap1re(&self) -> Cap1reR {
672 Cap1reR::new(((self.bits >> 3) & 1) != 0)
673 }
674 #[doc = "Bit 4 - Falling Edge of Capture Channel 1"]
675 #[inline(always)]
676 pub fn cap1fe(&self) -> Cap1feR {
677 Cap1feR::new(((self.bits >> 4) & 1) != 0)
678 }
679 #[doc = "Bit 5 - Generate Interrupt on Channel 1 Capture Event"]
680 #[inline(always)]
681 pub fn cap1i(&self) -> Cap1iR {
682 Cap1iR::new(((self.bits >> 5) & 1) != 0)
683 }
684 #[doc = "Bit 6 - Rising Edge of Capture Channel 2"]
685 #[inline(always)]
686 pub fn cap2re(&self) -> Cap2reR {
687 Cap2reR::new(((self.bits >> 6) & 1) != 0)
688 }
689 #[doc = "Bit 7 - Falling Edge of Capture Channel 2"]
690 #[inline(always)]
691 pub fn cap2fe(&self) -> Cap2feR {
692 Cap2feR::new(((self.bits >> 7) & 1) != 0)
693 }
694 #[doc = "Bit 8 - Generate Interrupt on Channel 2 Capture Event"]
695 #[inline(always)]
696 pub fn cap2i(&self) -> Cap2iR {
697 Cap2iR::new(((self.bits >> 8) & 1) != 0)
698 }
699 #[doc = "Bit 9 - Rising Edge of Capture Channel 3"]
700 #[inline(always)]
701 pub fn cap3re(&self) -> Cap3reR {
702 Cap3reR::new(((self.bits >> 9) & 1) != 0)
703 }
704 #[doc = "Bit 10 - Falling Edge of Capture Channel 3"]
705 #[inline(always)]
706 pub fn cap3fe(&self) -> Cap3feR {
707 Cap3feR::new(((self.bits >> 10) & 1) != 0)
708 }
709 #[doc = "Bit 11 - Generate Interrupt on Channel 3 Capture Event"]
710 #[inline(always)]
711 pub fn cap3i(&self) -> Cap3iR {
712 Cap3iR::new(((self.bits >> 11) & 1) != 0)
713 }
714}
715#[cfg(feature = "debug")]
716impl core::fmt::Debug for R {
717 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
718 f.debug_struct("CCR")
719 .field("cap0re", &self.cap0re())
720 .field("cap0fe", &self.cap0fe())
721 .field("cap0i", &self.cap0i())
722 .field("cap1re", &self.cap1re())
723 .field("cap1fe", &self.cap1fe())
724 .field("cap1i", &self.cap1i())
725 .field("cap2re", &self.cap2re())
726 .field("cap2fe", &self.cap2fe())
727 .field("cap2i", &self.cap2i())
728 .field("cap3re", &self.cap3re())
729 .field("cap3fe", &self.cap3fe())
730 .field("cap3i", &self.cap3i())
731 .finish()
732 }
733}
734impl W {
735 #[doc = "Bit 0 - Rising Edge of Capture Channel 0"]
736 #[inline(always)]
737 pub fn cap0re(&mut self) -> Cap0reW<'_, CcrSpec> {
738 Cap0reW::new(self, 0)
739 }
740 #[doc = "Bit 1 - Falling Edge of Capture Channel 0"]
741 #[inline(always)]
742 pub fn cap0fe(&mut self) -> Cap0feW<'_, CcrSpec> {
743 Cap0feW::new(self, 1)
744 }
745 #[doc = "Bit 2 - Generate Interrupt on Channel 0 Capture Event"]
746 #[inline(always)]
747 pub fn cap0i(&mut self) -> Cap0iW<'_, CcrSpec> {
748 Cap0iW::new(self, 2)
749 }
750 #[doc = "Bit 3 - Rising Edge of Capture Channel 1"]
751 #[inline(always)]
752 pub fn cap1re(&mut self) -> Cap1reW<'_, CcrSpec> {
753 Cap1reW::new(self, 3)
754 }
755 #[doc = "Bit 4 - Falling Edge of Capture Channel 1"]
756 #[inline(always)]
757 pub fn cap1fe(&mut self) -> Cap1feW<'_, CcrSpec> {
758 Cap1feW::new(self, 4)
759 }
760 #[doc = "Bit 5 - Generate Interrupt on Channel 1 Capture Event"]
761 #[inline(always)]
762 pub fn cap1i(&mut self) -> Cap1iW<'_, CcrSpec> {
763 Cap1iW::new(self, 5)
764 }
765 #[doc = "Bit 6 - Rising Edge of Capture Channel 2"]
766 #[inline(always)]
767 pub fn cap2re(&mut self) -> Cap2reW<'_, CcrSpec> {
768 Cap2reW::new(self, 6)
769 }
770 #[doc = "Bit 7 - Falling Edge of Capture Channel 2"]
771 #[inline(always)]
772 pub fn cap2fe(&mut self) -> Cap2feW<'_, CcrSpec> {
773 Cap2feW::new(self, 7)
774 }
775 #[doc = "Bit 8 - Generate Interrupt on Channel 2 Capture Event"]
776 #[inline(always)]
777 pub fn cap2i(&mut self) -> Cap2iW<'_, CcrSpec> {
778 Cap2iW::new(self, 8)
779 }
780 #[doc = "Bit 9 - Rising Edge of Capture Channel 3"]
781 #[inline(always)]
782 pub fn cap3re(&mut self) -> Cap3reW<'_, CcrSpec> {
783 Cap3reW::new(self, 9)
784 }
785 #[doc = "Bit 10 - Falling Edge of Capture Channel 3"]
786 #[inline(always)]
787 pub fn cap3fe(&mut self) -> Cap3feW<'_, CcrSpec> {
788 Cap3feW::new(self, 10)
789 }
790 #[doc = "Bit 11 - Generate Interrupt on Channel 3 Capture Event"]
791 #[inline(always)]
792 pub fn cap3i(&mut self) -> Cap3iW<'_, CcrSpec> {
793 Cap3iW::new(self, 11)
794 }
795}
796#[doc = "Capture Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
797pub struct CcrSpec;
798impl crate::RegisterSpec for CcrSpec {
799 type Ux = u32;
800}
801#[doc = "`read()` method returns [`ccr::R`](R) reader structure"]
802impl crate::Readable for CcrSpec {}
803#[doc = "`write(|w| ..)` method takes [`ccr::W`](W) writer structure"]
804impl crate::Writable for CcrSpec {
805 type Safety = crate::Unsafe;
806}
807#[doc = "`reset()` method sets CCR to value 0"]
808impl crate::Resettable for CcrSpec {}