mcxa_pac/cmc/
dbgctl.rs

1#[doc = "Register `DBGCTL` reader"]
2pub type R = crate::R<DbgctlSpec>;
3#[doc = "Register `DBGCTL` writer"]
4pub type W = crate::W<DbgctlSpec>;
5#[doc = "Sleep Or Debug\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Sod {
9    #[doc = "0: Remains enabled"]
10    Disabled = 0,
11    #[doc = "1: Disabled"]
12    Enabled = 1,
13}
14impl From<Sod> for bool {
15    #[inline(always)]
16    fn from(variant: Sod) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `SOD` reader - Sleep Or Debug"]
21pub type SodR = crate::BitReader<Sod>;
22impl SodR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Sod {
26        match self.bits {
27            false => Sod::Disabled,
28            true => Sod::Enabled,
29        }
30    }
31    #[doc = "Remains enabled"]
32    #[inline(always)]
33    pub fn is_disabled(&self) -> bool {
34        *self == Sod::Disabled
35    }
36    #[doc = "Disabled"]
37    #[inline(always)]
38    pub fn is_enabled(&self) -> bool {
39        *self == Sod::Enabled
40    }
41}
42#[doc = "Field `SOD` writer - Sleep Or Debug"]
43pub type SodW<'a, REG> = crate::BitWriter<'a, REG, Sod>;
44impl<'a, REG> SodW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Remains enabled"]
49    #[inline(always)]
50    pub fn disabled(self) -> &'a mut crate::W<REG> {
51        self.variant(Sod::Disabled)
52    }
53    #[doc = "Disabled"]
54    #[inline(always)]
55    pub fn enabled(self) -> &'a mut crate::W<REG> {
56        self.variant(Sod::Enabled)
57    }
58}
59impl R {
60    #[doc = "Bit 0 - Sleep Or Debug"]
61    #[inline(always)]
62    pub fn sod(&self) -> SodR {
63        SodR::new((self.bits & 1) != 0)
64    }
65}
66#[cfg(feature = "debug")]
67impl core::fmt::Debug for R {
68    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
69        f.debug_struct("DBGCTL").field("sod", &self.sod()).finish()
70    }
71}
72impl W {
73    #[doc = "Bit 0 - Sleep Or Debug"]
74    #[inline(always)]
75    pub fn sod(&mut self) -> SodW<'_, DbgctlSpec> {
76        SodW::new(self, 0)
77    }
78}
79#[doc = "Debug Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dbgctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbgctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct DbgctlSpec;
81impl crate::RegisterSpec for DbgctlSpec {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`dbgctl::R`](R) reader structure"]
85impl crate::Readable for DbgctlSpec {}
86#[doc = "`write(|w| ..)` method takes [`dbgctl::W`](W) writer structure"]
87impl crate::Writable for DbgctlSpec {
88    type Safety = crate::Unsafe;
89}
90#[doc = "`reset()` method sets DBGCTL to value 0"]
91impl crate::Resettable for DbgctlSpec {}
mcxa_pac/cmc/dbgctl.rs

mcxa_pac/cmc/
dbgctl.rs
