mcxa_pac/cdog0/
add.rs

1#[doc = "Register `ADD` writer"]
2pub type W = crate::W<AddSpec>;
3#[doc = "Field `AD` writer - ADD Write Value"]
4pub type AdW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
5#[cfg(feature = "debug")]
6impl core::fmt::Debug for crate::generic::Reg<AddSpec> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bits 0:31 - ADD Write Value"]
13    #[inline(always)]
14    pub fn ad(&mut self) -> AdW<'_, AddSpec> {
15        AdW::new(self, 0)
16    }
17}
18#[doc = "ADD Command Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`add::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct AddSpec;
20impl crate::RegisterSpec for AddSpec {
21    type Ux = u32;
22}
23#[doc = "`write(|w| ..)` method takes [`add::W`](W) writer structure"]
24impl crate::Writable for AddSpec {
25    type Safety = crate::Unsafe;
26}
27#[doc = "`reset()` method sets ADD to value 0"]
28impl crate::Resettable for AddSpec {}
mcxa_pac/cdog0/add.rs

mcxa_pac/cdog0/
add.rs
