mcxa_pac/can0/
pl2_plmask_lo.rs

1#[doc = "Register `PL2_PLMASK_LO` reader"]
2pub type R = crate::R<Pl2PlmaskLoSpec>;
3#[doc = "Register `PL2_PLMASK_LO` writer"]
4pub type W = crate::W<Pl2PlmaskLoSpec>;
5#[doc = "Field `Data_byte_3` reader - Data Byte 3"]
6pub type DataByte3R = crate::FieldReader;
7#[doc = "Field `Data_byte_3` writer - Data Byte 3"]
8pub type DataByte3W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `Data_byte_2` reader - Data Byte 2"]
10pub type DataByte2R = crate::FieldReader;
11#[doc = "Field `Data_byte_2` writer - Data Byte 2"]
12pub type DataByte2W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `Data_byte_1` reader - Data Byte 1"]
14pub type DataByte1R = crate::FieldReader;
15#[doc = "Field `Data_byte_1` writer - Data Byte 1"]
16pub type DataByte1W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17#[doc = "Field `Data_byte_0` reader - Data Byte 0"]
18pub type DataByte0R = crate::FieldReader;
19#[doc = "Field `Data_byte_0` writer - Data Byte 0"]
20pub type DataByte0W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21impl R {
22    #[doc = "Bits 0:7 - Data Byte 3"]
23    #[inline(always)]
24    pub fn data_byte_3(&self) -> DataByte3R {
25        DataByte3R::new((self.bits & 0xff) as u8)
26    }
27    #[doc = "Bits 8:15 - Data Byte 2"]
28    #[inline(always)]
29    pub fn data_byte_2(&self) -> DataByte2R {
30        DataByte2R::new(((self.bits >> 8) & 0xff) as u8)
31    }
32    #[doc = "Bits 16:23 - Data Byte 1"]
33    #[inline(always)]
34    pub fn data_byte_1(&self) -> DataByte1R {
35        DataByte1R::new(((self.bits >> 16) & 0xff) as u8)
36    }
37    #[doc = "Bits 24:31 - Data Byte 0"]
38    #[inline(always)]
39    pub fn data_byte_0(&self) -> DataByte0R {
40        DataByte0R::new(((self.bits >> 24) & 0xff) as u8)
41    }
42}
43#[cfg(feature = "debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("PL2_PLMASK_LO")
47            .field("data_byte_3", &self.data_byte_3())
48            .field("data_byte_2", &self.data_byte_2())
49            .field("data_byte_1", &self.data_byte_1())
50            .field("data_byte_0", &self.data_byte_0())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bits 0:7 - Data Byte 3"]
56    #[inline(always)]
57    pub fn data_byte_3(&mut self) -> DataByte3W<'_, Pl2PlmaskLoSpec> {
58        DataByte3W::new(self, 0)
59    }
60    #[doc = "Bits 8:15 - Data Byte 2"]
61    #[inline(always)]
62    pub fn data_byte_2(&mut self) -> DataByte2W<'_, Pl2PlmaskLoSpec> {
63        DataByte2W::new(self, 8)
64    }
65    #[doc = "Bits 16:23 - Data Byte 1"]
66    #[inline(always)]
67    pub fn data_byte_1(&mut self) -> DataByte1W<'_, Pl2PlmaskLoSpec> {
68        DataByte1W::new(self, 16)
69    }
70    #[doc = "Bits 24:31 - Data Byte 0"]
71    #[inline(always)]
72    pub fn data_byte_0(&mut self) -> DataByte0W<'_, Pl2PlmaskLoSpec> {
73        DataByte0W::new(self, 24)
74    }
75}
76#[doc = "Pretended Networking Payload Low Filter 2 and Payload Low Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`pl2_plmask_lo::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pl2_plmask_lo::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct Pl2PlmaskLoSpec;
78impl crate::RegisterSpec for Pl2PlmaskLoSpec {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`pl2_plmask_lo::R`](R) reader structure"]
82impl crate::Readable for Pl2PlmaskLoSpec {}
83#[doc = "`write(|w| ..)` method takes [`pl2_plmask_lo::W`](W) writer structure"]
84impl crate::Writable for Pl2PlmaskLoSpec {
85    type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets PL2_PLMASK_LO to value 0"]
88impl crate::Resettable for Pl2PlmaskLoSpec {}
mcxa_pac/can0/pl2_plmask_lo.rs

mcxa_pac/can0/
pl2_plmask_lo.rs
