1#[doc = "Register `ETDC` reader"]
2pub type R = crate::R<EtdcSpec>;
3#[doc = "Register `ETDC` writer"]
4pub type W = crate::W<EtdcSpec>;
5#[doc = "Field `ETDCVAL` reader - Enhanced Transceiver Delay Compensation Value"]
6pub type EtdcvalR = crate::FieldReader;
7#[doc = "Transceiver Delay Compensation Fail\n\nValue on reset: 0"]
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum Etdcfail {
11 #[doc = "0: In range"]
12 InRange = 0,
13 #[doc = "1: Out of range"]
14 OutOfRange = 1,
15}
16impl From<Etdcfail> for bool {
17 #[inline(always)]
18 fn from(variant: Etdcfail) -> Self {
19 variant as u8 != 0
20 }
21}
22#[doc = "Field `ETDCFAIL` reader - Transceiver Delay Compensation Fail"]
23pub type EtdcfailR = crate::BitReader<Etdcfail>;
24impl EtdcfailR {
25 #[doc = "Get enumerated values variant"]
26 #[inline(always)]
27 pub const fn variant(&self) -> Etdcfail {
28 match self.bits {
29 false => Etdcfail::InRange,
30 true => Etdcfail::OutOfRange,
31 }
32 }
33 #[doc = "In range"]
34 #[inline(always)]
35 pub fn is_in_range(&self) -> bool {
36 *self == Etdcfail::InRange
37 }
38 #[doc = "Out of range"]
39 #[inline(always)]
40 pub fn is_out_of_range(&self) -> bool {
41 *self == Etdcfail::OutOfRange
42 }
43}
44#[doc = "Field `ETDCFAIL` writer - Transceiver Delay Compensation Fail"]
45pub type EtdcfailW<'a, REG> = crate::BitWriter1C<'a, REG, Etdcfail>;
46impl<'a, REG> EtdcfailW<'a, REG>
47where
48 REG: crate::Writable + crate::RegisterSpec,
49{
50 #[doc = "In range"]
51 #[inline(always)]
52 pub fn in_range(self) -> &'a mut crate::W<REG> {
53 self.variant(Etdcfail::InRange)
54 }
55 #[doc = "Out of range"]
56 #[inline(always)]
57 pub fn out_of_range(self) -> &'a mut crate::W<REG> {
58 self.variant(Etdcfail::OutOfRange)
59 }
60}
61#[doc = "Field `ETDCOFF` reader - Enhanced Transceiver Delay Compensation Offset"]
62pub type EtdcoffR = crate::FieldReader;
63#[doc = "Field `ETDCOFF` writer - Enhanced Transceiver Delay Compensation Offset"]
64pub type EtdcoffW<'a, REG> = crate::FieldWriter<'a, REG, 7>;
65#[doc = "Transceiver Delay Measurement Disable\n\nValue on reset: 0"]
66#[cfg_attr(feature = "defmt", derive(defmt::Format))]
67#[derive(Clone, Copy, Debug, PartialEq, Eq)]
68pub enum Tdmdis {
69 #[doc = "0: Enable"]
70 Enable = 0,
71 #[doc = "1: Disable"]
72 Disable = 1,
73}
74impl From<Tdmdis> for bool {
75 #[inline(always)]
76 fn from(variant: Tdmdis) -> Self {
77 variant as u8 != 0
78 }
79}
80#[doc = "Field `TDMDIS` reader - Transceiver Delay Measurement Disable"]
81pub type TdmdisR = crate::BitReader<Tdmdis>;
82impl TdmdisR {
83 #[doc = "Get enumerated values variant"]
84 #[inline(always)]
85 pub const fn variant(&self) -> Tdmdis {
86 match self.bits {
87 false => Tdmdis::Enable,
88 true => Tdmdis::Disable,
89 }
90 }
91 #[doc = "Enable"]
92 #[inline(always)]
93 pub fn is_enable(&self) -> bool {
94 *self == Tdmdis::Enable
95 }
96 #[doc = "Disable"]
97 #[inline(always)]
98 pub fn is_disable(&self) -> bool {
99 *self == Tdmdis::Disable
100 }
101}
102#[doc = "Field `TDMDIS` writer - Transceiver Delay Measurement Disable"]
103pub type TdmdisW<'a, REG> = crate::BitWriter<'a, REG, Tdmdis>;
104impl<'a, REG> TdmdisW<'a, REG>
105where
106 REG: crate::Writable + crate::RegisterSpec,
107{
108 #[doc = "Enable"]
109 #[inline(always)]
110 pub fn enable(self) -> &'a mut crate::W<REG> {
111 self.variant(Tdmdis::Enable)
112 }
113 #[doc = "Disable"]
114 #[inline(always)]
115 pub fn disable(self) -> &'a mut crate::W<REG> {
116 self.variant(Tdmdis::Disable)
117 }
118}
119#[doc = "Transceiver Delay Compensation Enable\n\nValue on reset: 0"]
120#[cfg_attr(feature = "defmt", derive(defmt::Format))]
121#[derive(Clone, Copy, Debug, PartialEq, Eq)]
122pub enum Etdcen {
123 #[doc = "0: Disable"]
124 Disable = 0,
125 #[doc = "1: Enable"]
126 Enable = 1,
127}
128impl From<Etdcen> for bool {
129 #[inline(always)]
130 fn from(variant: Etdcen) -> Self {
131 variant as u8 != 0
132 }
133}
134#[doc = "Field `ETDCEN` reader - Transceiver Delay Compensation Enable"]
135pub type EtdcenR = crate::BitReader<Etdcen>;
136impl EtdcenR {
137 #[doc = "Get enumerated values variant"]
138 #[inline(always)]
139 pub const fn variant(&self) -> Etdcen {
140 match self.bits {
141 false => Etdcen::Disable,
142 true => Etdcen::Enable,
143 }
144 }
145 #[doc = "Disable"]
146 #[inline(always)]
147 pub fn is_disable(&self) -> bool {
148 *self == Etdcen::Disable
149 }
150 #[doc = "Enable"]
151 #[inline(always)]
152 pub fn is_enable(&self) -> bool {
153 *self == Etdcen::Enable
154 }
155}
156#[doc = "Field `ETDCEN` writer - Transceiver Delay Compensation Enable"]
157pub type EtdcenW<'a, REG> = crate::BitWriter<'a, REG, Etdcen>;
158impl<'a, REG> EtdcenW<'a, REG>
159where
160 REG: crate::Writable + crate::RegisterSpec,
161{
162 #[doc = "Disable"]
163 #[inline(always)]
164 pub fn disable(self) -> &'a mut crate::W<REG> {
165 self.variant(Etdcen::Disable)
166 }
167 #[doc = "Enable"]
168 #[inline(always)]
169 pub fn enable(self) -> &'a mut crate::W<REG> {
170 self.variant(Etdcen::Enable)
171 }
172}
173impl R {
174 #[doc = "Bits 0:7 - Enhanced Transceiver Delay Compensation Value"]
175 #[inline(always)]
176 pub fn etdcval(&self) -> EtdcvalR {
177 EtdcvalR::new((self.bits & 0xff) as u8)
178 }
179 #[doc = "Bit 15 - Transceiver Delay Compensation Fail"]
180 #[inline(always)]
181 pub fn etdcfail(&self) -> EtdcfailR {
182 EtdcfailR::new(((self.bits >> 15) & 1) != 0)
183 }
184 #[doc = "Bits 16:22 - Enhanced Transceiver Delay Compensation Offset"]
185 #[inline(always)]
186 pub fn etdcoff(&self) -> EtdcoffR {
187 EtdcoffR::new(((self.bits >> 16) & 0x7f) as u8)
188 }
189 #[doc = "Bit 30 - Transceiver Delay Measurement Disable"]
190 #[inline(always)]
191 pub fn tdmdis(&self) -> TdmdisR {
192 TdmdisR::new(((self.bits >> 30) & 1) != 0)
193 }
194 #[doc = "Bit 31 - Transceiver Delay Compensation Enable"]
195 #[inline(always)]
196 pub fn etdcen(&self) -> EtdcenR {
197 EtdcenR::new(((self.bits >> 31) & 1) != 0)
198 }
199}
200#[cfg(feature = "debug")]
201impl core::fmt::Debug for R {
202 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
203 f.debug_struct("ETDC")
204 .field("etdcval", &self.etdcval())
205 .field("etdcfail", &self.etdcfail())
206 .field("etdcoff", &self.etdcoff())
207 .field("tdmdis", &self.tdmdis())
208 .field("etdcen", &self.etdcen())
209 .finish()
210 }
211}
212impl W {
213 #[doc = "Bit 15 - Transceiver Delay Compensation Fail"]
214 #[inline(always)]
215 pub fn etdcfail(&mut self) -> EtdcfailW<'_, EtdcSpec> {
216 EtdcfailW::new(self, 15)
217 }
218 #[doc = "Bits 16:22 - Enhanced Transceiver Delay Compensation Offset"]
219 #[inline(always)]
220 pub fn etdcoff(&mut self) -> EtdcoffW<'_, EtdcSpec> {
221 EtdcoffW::new(self, 16)
222 }
223 #[doc = "Bit 30 - Transceiver Delay Measurement Disable"]
224 #[inline(always)]
225 pub fn tdmdis(&mut self) -> TdmdisW<'_, EtdcSpec> {
226 TdmdisW::new(self, 30)
227 }
228 #[doc = "Bit 31 - Transceiver Delay Compensation Enable"]
229 #[inline(always)]
230 pub fn etdcen(&mut self) -> EtdcenW<'_, EtdcSpec> {
231 EtdcenW::new(self, 31)
232 }
233}
234#[doc = "Enhanced Transceiver Delay Compensation\n\nYou can [`read`](crate::Reg::read) this register and get [`etdc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`etdc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
235pub struct EtdcSpec;
236impl crate::RegisterSpec for EtdcSpec {
237 type Ux = u32;
238}
239#[doc = "`read()` method returns [`etdc::R`](R) reader structure"]
240impl crate::Readable for EtdcSpec {}
241#[doc = "`write(|w| ..)` method takes [`etdc::W`](W) writer structure"]
242impl crate::Writable for EtdcSpec {
243 type Safety = crate::Unsafe;
244 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x8000;
245}
246#[doc = "`reset()` method sets ETDC to value 0"]
247impl crate::Resettable for EtdcSpec {}