mcxa_pac/can0/
ctrl1.rs

1#[doc = "Register `CTRL1` reader"]
2pub type R = crate::R<Ctrl1Spec>;
3#[doc = "Register `CTRL1` writer"]
4pub type W = crate::W<Ctrl1Spec>;
5#[doc = "Field `PROPSEG` reader - Propagation Segment"]
6pub type PropsegR = crate::FieldReader;
7#[doc = "Field `PROPSEG` writer - Propagation Segment"]
8pub type PropsegW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Listen-Only Mode\n\nValue on reset: 0"]
10#[cfg_attr(feature = "defmt", derive(defmt::Format))]
11#[derive(Clone, Copy, Debug, PartialEq, Eq)]
12pub enum Lom {
13    #[doc = "0: Listen-Only mode is deactivated."]
14    ListenOnlyModeDisabled = 0,
15    #[doc = "1: FlexCAN module operates in Listen-Only mode."]
16    ListenOnlyModeEnabled = 1,
17}
18impl From<Lom> for bool {
19    #[inline(always)]
20    fn from(variant: Lom) -> Self {
21        variant as u8 != 0
22    }
23}
24#[doc = "Field `LOM` reader - Listen-Only Mode"]
25pub type LomR = crate::BitReader<Lom>;
26impl LomR {
27    #[doc = "Get enumerated values variant"]
28    #[inline(always)]
29    pub const fn variant(&self) -> Lom {
30        match self.bits {
31            false => Lom::ListenOnlyModeDisabled,
32            true => Lom::ListenOnlyModeEnabled,
33        }
34    }
35    #[doc = "Listen-Only mode is deactivated."]
36    #[inline(always)]
37    pub fn is_listen_only_mode_disabled(&self) -> bool {
38        *self == Lom::ListenOnlyModeDisabled
39    }
40    #[doc = "FlexCAN module operates in Listen-Only mode."]
41    #[inline(always)]
42    pub fn is_listen_only_mode_enabled(&self) -> bool {
43        *self == Lom::ListenOnlyModeEnabled
44    }
45}
46#[doc = "Field `LOM` writer - Listen-Only Mode"]
47pub type LomW<'a, REG> = crate::BitWriter<'a, REG, Lom>;
48impl<'a, REG> LomW<'a, REG>
49where
50    REG: crate::Writable + crate::RegisterSpec,
51{
52    #[doc = "Listen-Only mode is deactivated."]
53    #[inline(always)]
54    pub fn listen_only_mode_disabled(self) -> &'a mut crate::W<REG> {
55        self.variant(Lom::ListenOnlyModeDisabled)
56    }
57    #[doc = "FlexCAN module operates in Listen-Only mode."]
58    #[inline(always)]
59    pub fn listen_only_mode_enabled(self) -> &'a mut crate::W<REG> {
60        self.variant(Lom::ListenOnlyModeEnabled)
61    }
62}
63#[doc = "Lowest Buffer Transmitted First\n\nValue on reset: 0"]
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum Lbuf {
67    #[doc = "0: Buffer with highest priority is transmitted first."]
68    HighestBufferFirst = 0,
69    #[doc = "1: Lowest number buffer is transmitted first."]
70    LowestBufferFirst = 1,
71}
72impl From<Lbuf> for bool {
73    #[inline(always)]
74    fn from(variant: Lbuf) -> Self {
75        variant as u8 != 0
76    }
77}
78#[doc = "Field `LBUF` reader - Lowest Buffer Transmitted First"]
79pub type LbufR = crate::BitReader<Lbuf>;
80impl LbufR {
81    #[doc = "Get enumerated values variant"]
82    #[inline(always)]
83    pub const fn variant(&self) -> Lbuf {
84        match self.bits {
85            false => Lbuf::HighestBufferFirst,
86            true => Lbuf::LowestBufferFirst,
87        }
88    }
89    #[doc = "Buffer with highest priority is transmitted first."]
90    #[inline(always)]
91    pub fn is_highest_buffer_first(&self) -> bool {
92        *self == Lbuf::HighestBufferFirst
93    }
94    #[doc = "Lowest number buffer is transmitted first."]
95    #[inline(always)]
96    pub fn is_lowest_buffer_first(&self) -> bool {
97        *self == Lbuf::LowestBufferFirst
98    }
99}
100#[doc = "Field `LBUF` writer - Lowest Buffer Transmitted First"]
101pub type LbufW<'a, REG> = crate::BitWriter<'a, REG, Lbuf>;
102impl<'a, REG> LbufW<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    #[doc = "Buffer with highest priority is transmitted first."]
107    #[inline(always)]
108    pub fn highest_buffer_first(self) -> &'a mut crate::W<REG> {
109        self.variant(Lbuf::HighestBufferFirst)
110    }
111    #[doc = "Lowest number buffer is transmitted first."]
112    #[inline(always)]
113    pub fn lowest_buffer_first(self) -> &'a mut crate::W<REG> {
114        self.variant(Lbuf::LowestBufferFirst)
115    }
116}
117#[doc = "Timer Sync\n\nValue on reset: 0"]
118#[cfg_attr(feature = "defmt", derive(defmt::Format))]
119#[derive(Clone, Copy, Debug, PartialEq, Eq)]
120pub enum Tsyn {
121    #[doc = "0: Disable"]
122    TimerSyncDisabled = 0,
123    #[doc = "1: Enable"]
124    TimerSyncEnabled = 1,
125}
126impl From<Tsyn> for bool {
127    #[inline(always)]
128    fn from(variant: Tsyn) -> Self {
129        variant as u8 != 0
130    }
131}
132#[doc = "Field `TSYN` reader - Timer Sync"]
133pub type TsynR = crate::BitReader<Tsyn>;
134impl TsynR {
135    #[doc = "Get enumerated values variant"]
136    #[inline(always)]
137    pub const fn variant(&self) -> Tsyn {
138        match self.bits {
139            false => Tsyn::TimerSyncDisabled,
140            true => Tsyn::TimerSyncEnabled,
141        }
142    }
143    #[doc = "Disable"]
144    #[inline(always)]
145    pub fn is_timer_sync_disabled(&self) -> bool {
146        *self == Tsyn::TimerSyncDisabled
147    }
148    #[doc = "Enable"]
149    #[inline(always)]
150    pub fn is_timer_sync_enabled(&self) -> bool {
151        *self == Tsyn::TimerSyncEnabled
152    }
153}
154#[doc = "Field `TSYN` writer - Timer Sync"]
155pub type TsynW<'a, REG> = crate::BitWriter<'a, REG, Tsyn>;
156impl<'a, REG> TsynW<'a, REG>
157where
158    REG: crate::Writable + crate::RegisterSpec,
159{
160    #[doc = "Disable"]
161    #[inline(always)]
162    pub fn timer_sync_disabled(self) -> &'a mut crate::W<REG> {
163        self.variant(Tsyn::TimerSyncDisabled)
164    }
165    #[doc = "Enable"]
166    #[inline(always)]
167    pub fn timer_sync_enabled(self) -> &'a mut crate::W<REG> {
168        self.variant(Tsyn::TimerSyncEnabled)
169    }
170}
171#[doc = "Bus Off Recovery\n\nValue on reset: 0"]
172#[cfg_attr(feature = "defmt", derive(defmt::Format))]
173#[derive(Clone, Copy, Debug, PartialEq, Eq)]
174pub enum Boffrec {
175    #[doc = "0: Enabled"]
176    AutoRecoverEnabled = 0,
177    #[doc = "1: Disabled"]
178    AutoRecoverDisabled = 1,
179}
180impl From<Boffrec> for bool {
181    #[inline(always)]
182    fn from(variant: Boffrec) -> Self {
183        variant as u8 != 0
184    }
185}
186#[doc = "Field `BOFFREC` reader - Bus Off Recovery"]
187pub type BoffrecR = crate::BitReader<Boffrec>;
188impl BoffrecR {
189    #[doc = "Get enumerated values variant"]
190    #[inline(always)]
191    pub const fn variant(&self) -> Boffrec {
192        match self.bits {
193            false => Boffrec::AutoRecoverEnabled,
194            true => Boffrec::AutoRecoverDisabled,
195        }
196    }
197    #[doc = "Enabled"]
198    #[inline(always)]
199    pub fn is_auto_recover_enabled(&self) -> bool {
200        *self == Boffrec::AutoRecoverEnabled
201    }
202    #[doc = "Disabled"]
203    #[inline(always)]
204    pub fn is_auto_recover_disabled(&self) -> bool {
205        *self == Boffrec::AutoRecoverDisabled
206    }
207}
208#[doc = "Field `BOFFREC` writer - Bus Off Recovery"]
209pub type BoffrecW<'a, REG> = crate::BitWriter<'a, REG, Boffrec>;
210impl<'a, REG> BoffrecW<'a, REG>
211where
212    REG: crate::Writable + crate::RegisterSpec,
213{
214    #[doc = "Enabled"]
215    #[inline(always)]
216    pub fn auto_recover_enabled(self) -> &'a mut crate::W<REG> {
217        self.variant(Boffrec::AutoRecoverEnabled)
218    }
219    #[doc = "Disabled"]
220    #[inline(always)]
221    pub fn auto_recover_disabled(self) -> &'a mut crate::W<REG> {
222        self.variant(Boffrec::AutoRecoverDisabled)
223    }
224}
225#[doc = "CAN Bit Sampling\n\nValue on reset: 0"]
226#[cfg_attr(feature = "defmt", derive(defmt::Format))]
227#[derive(Clone, Copy, Debug, PartialEq, Eq)]
228pub enum Smp {
229    #[doc = "0: One sample is used to determine the bit value."]
230    OneSample = 0,
231    #[doc = "1: Three samples are used to determine the value of the received bit: the regular one (sample point) and two preceding samples. A majority rule is used."]
232    ThreeSample = 1,
233}
234impl From<Smp> for bool {
235    #[inline(always)]
236    fn from(variant: Smp) -> Self {
237        variant as u8 != 0
238    }
239}
240#[doc = "Field `SMP` reader - CAN Bit Sampling"]
241pub type SmpR = crate::BitReader<Smp>;
242impl SmpR {
243    #[doc = "Get enumerated values variant"]
244    #[inline(always)]
245    pub const fn variant(&self) -> Smp {
246        match self.bits {
247            false => Smp::OneSample,
248            true => Smp::ThreeSample,
249        }
250    }
251    #[doc = "One sample is used to determine the bit value."]
252    #[inline(always)]
253    pub fn is_one_sample(&self) -> bool {
254        *self == Smp::OneSample
255    }
256    #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and two preceding samples. A majority rule is used."]
257    #[inline(always)]
258    pub fn is_three_sample(&self) -> bool {
259        *self == Smp::ThreeSample
260    }
261}
262#[doc = "Field `SMP` writer - CAN Bit Sampling"]
263pub type SmpW<'a, REG> = crate::BitWriter<'a, REG, Smp>;
264impl<'a, REG> SmpW<'a, REG>
265where
266    REG: crate::Writable + crate::RegisterSpec,
267{
268    #[doc = "One sample is used to determine the bit value."]
269    #[inline(always)]
270    pub fn one_sample(self) -> &'a mut crate::W<REG> {
271        self.variant(Smp::OneSample)
272    }
273    #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and two preceding samples. A majority rule is used."]
274    #[inline(always)]
275    pub fn three_sample(self) -> &'a mut crate::W<REG> {
276        self.variant(Smp::ThreeSample)
277    }
278}
279#[doc = "RX Warning Interrupt Mask\n\nValue on reset: 0"]
280#[cfg_attr(feature = "defmt", derive(defmt::Format))]
281#[derive(Clone, Copy, Debug, PartialEq, Eq)]
282pub enum Rwrnmsk {
283    #[doc = "0: Disabled"]
284    RxWarningIntDisabled = 0,
285    #[doc = "1: Enabled"]
286    RxWarningIntEnabled = 1,
287}
288impl From<Rwrnmsk> for bool {
289    #[inline(always)]
290    fn from(variant: Rwrnmsk) -> Self {
291        variant as u8 != 0
292    }
293}
294#[doc = "Field `RWRNMSK` reader - RX Warning Interrupt Mask"]
295pub type RwrnmskR = crate::BitReader<Rwrnmsk>;
296impl RwrnmskR {
297    #[doc = "Get enumerated values variant"]
298    #[inline(always)]
299    pub const fn variant(&self) -> Rwrnmsk {
300        match self.bits {
301            false => Rwrnmsk::RxWarningIntDisabled,
302            true => Rwrnmsk::RxWarningIntEnabled,
303        }
304    }
305    #[doc = "Disabled"]
306    #[inline(always)]
307    pub fn is_rx_warning_int_disabled(&self) -> bool {
308        *self == Rwrnmsk::RxWarningIntDisabled
309    }
310    #[doc = "Enabled"]
311    #[inline(always)]
312    pub fn is_rx_warning_int_enabled(&self) -> bool {
313        *self == Rwrnmsk::RxWarningIntEnabled
314    }
315}
316#[doc = "Field `RWRNMSK` writer - RX Warning Interrupt Mask"]
317pub type RwrnmskW<'a, REG> = crate::BitWriter<'a, REG, Rwrnmsk>;
318impl<'a, REG> RwrnmskW<'a, REG>
319where
320    REG: crate::Writable + crate::RegisterSpec,
321{
322    #[doc = "Disabled"]
323    #[inline(always)]
324    pub fn rx_warning_int_disabled(self) -> &'a mut crate::W<REG> {
325        self.variant(Rwrnmsk::RxWarningIntDisabled)
326    }
327    #[doc = "Enabled"]
328    #[inline(always)]
329    pub fn rx_warning_int_enabled(self) -> &'a mut crate::W<REG> {
330        self.variant(Rwrnmsk::RxWarningIntEnabled)
331    }
332}
333#[doc = "TX Warning Interrupt Mask\n\nValue on reset: 0"]
334#[cfg_attr(feature = "defmt", derive(defmt::Format))]
335#[derive(Clone, Copy, Debug, PartialEq, Eq)]
336pub enum Twrnmsk {
337    #[doc = "0: Disabled"]
338    TxWarningIntDisabled = 0,
339    #[doc = "1: Enabled"]
340    TxWarningIntEnabled = 1,
341}
342impl From<Twrnmsk> for bool {
343    #[inline(always)]
344    fn from(variant: Twrnmsk) -> Self {
345        variant as u8 != 0
346    }
347}
348#[doc = "Field `TWRNMSK` reader - TX Warning Interrupt Mask"]
349pub type TwrnmskR = crate::BitReader<Twrnmsk>;
350impl TwrnmskR {
351    #[doc = "Get enumerated values variant"]
352    #[inline(always)]
353    pub const fn variant(&self) -> Twrnmsk {
354        match self.bits {
355            false => Twrnmsk::TxWarningIntDisabled,
356            true => Twrnmsk::TxWarningIntEnabled,
357        }
358    }
359    #[doc = "Disabled"]
360    #[inline(always)]
361    pub fn is_tx_warning_int_disabled(&self) -> bool {
362        *self == Twrnmsk::TxWarningIntDisabled
363    }
364    #[doc = "Enabled"]
365    #[inline(always)]
366    pub fn is_tx_warning_int_enabled(&self) -> bool {
367        *self == Twrnmsk::TxWarningIntEnabled
368    }
369}
370#[doc = "Field `TWRNMSK` writer - TX Warning Interrupt Mask"]
371pub type TwrnmskW<'a, REG> = crate::BitWriter<'a, REG, Twrnmsk>;
372impl<'a, REG> TwrnmskW<'a, REG>
373where
374    REG: crate::Writable + crate::RegisterSpec,
375{
376    #[doc = "Disabled"]
377    #[inline(always)]
378    pub fn tx_warning_int_disabled(self) -> &'a mut crate::W<REG> {
379        self.variant(Twrnmsk::TxWarningIntDisabled)
380    }
381    #[doc = "Enabled"]
382    #[inline(always)]
383    pub fn tx_warning_int_enabled(self) -> &'a mut crate::W<REG> {
384        self.variant(Twrnmsk::TxWarningIntEnabled)
385    }
386}
387#[doc = "Loopback Mode\n\nValue on reset: 0"]
388#[cfg_attr(feature = "defmt", derive(defmt::Format))]
389#[derive(Clone, Copy, Debug, PartialEq, Eq)]
390pub enum Lpb {
391    #[doc = "0: Disabled"]
392    LoopbackDisabled = 0,
393    #[doc = "1: Enabled"]
394    LoopbackEnabled = 1,
395}
396impl From<Lpb> for bool {
397    #[inline(always)]
398    fn from(variant: Lpb) -> Self {
399        variant as u8 != 0
400    }
401}
402#[doc = "Field `LPB` reader - Loopback Mode"]
403pub type LpbR = crate::BitReader<Lpb>;
404impl LpbR {
405    #[doc = "Get enumerated values variant"]
406    #[inline(always)]
407    pub const fn variant(&self) -> Lpb {
408        match self.bits {
409            false => Lpb::LoopbackDisabled,
410            true => Lpb::LoopbackEnabled,
411        }
412    }
413    #[doc = "Disabled"]
414    #[inline(always)]
415    pub fn is_loopback_disabled(&self) -> bool {
416        *self == Lpb::LoopbackDisabled
417    }
418    #[doc = "Enabled"]
419    #[inline(always)]
420    pub fn is_loopback_enabled(&self) -> bool {
421        *self == Lpb::LoopbackEnabled
422    }
423}
424#[doc = "Field `LPB` writer - Loopback Mode"]
425pub type LpbW<'a, REG> = crate::BitWriter<'a, REG, Lpb>;
426impl<'a, REG> LpbW<'a, REG>
427where
428    REG: crate::Writable + crate::RegisterSpec,
429{
430    #[doc = "Disabled"]
431    #[inline(always)]
432    pub fn loopback_disabled(self) -> &'a mut crate::W<REG> {
433        self.variant(Lpb::LoopbackDisabled)
434    }
435    #[doc = "Enabled"]
436    #[inline(always)]
437    pub fn loopback_enabled(self) -> &'a mut crate::W<REG> {
438        self.variant(Lpb::LoopbackEnabled)
439    }
440}
441#[doc = "Error Interrupt Mask\n\nValue on reset: 0"]
442#[cfg_attr(feature = "defmt", derive(defmt::Format))]
443#[derive(Clone, Copy, Debug, PartialEq, Eq)]
444pub enum Errmsk {
445    #[doc = "0: Interrupt disabled"]
446    ErrorIntDisabled = 0,
447    #[doc = "1: Interrupt enabled"]
448    ErrorIntEnabled = 1,
449}
450impl From<Errmsk> for bool {
451    #[inline(always)]
452    fn from(variant: Errmsk) -> Self {
453        variant as u8 != 0
454    }
455}
456#[doc = "Field `ERRMSK` reader - Error Interrupt Mask"]
457pub type ErrmskR = crate::BitReader<Errmsk>;
458impl ErrmskR {
459    #[doc = "Get enumerated values variant"]
460    #[inline(always)]
461    pub const fn variant(&self) -> Errmsk {
462        match self.bits {
463            false => Errmsk::ErrorIntDisabled,
464            true => Errmsk::ErrorIntEnabled,
465        }
466    }
467    #[doc = "Interrupt disabled"]
468    #[inline(always)]
469    pub fn is_error_int_disabled(&self) -> bool {
470        *self == Errmsk::ErrorIntDisabled
471    }
472    #[doc = "Interrupt enabled"]
473    #[inline(always)]
474    pub fn is_error_int_enabled(&self) -> bool {
475        *self == Errmsk::ErrorIntEnabled
476    }
477}
478#[doc = "Field `ERRMSK` writer - Error Interrupt Mask"]
479pub type ErrmskW<'a, REG> = crate::BitWriter<'a, REG, Errmsk>;
480impl<'a, REG> ErrmskW<'a, REG>
481where
482    REG: crate::Writable + crate::RegisterSpec,
483{
484    #[doc = "Interrupt disabled"]
485    #[inline(always)]
486    pub fn error_int_disabled(self) -> &'a mut crate::W<REG> {
487        self.variant(Errmsk::ErrorIntDisabled)
488    }
489    #[doc = "Interrupt enabled"]
490    #[inline(always)]
491    pub fn error_int_enabled(self) -> &'a mut crate::W<REG> {
492        self.variant(Errmsk::ErrorIntEnabled)
493    }
494}
495#[doc = "Bus Off Interrupt Mask\n\nValue on reset: 0"]
496#[cfg_attr(feature = "defmt", derive(defmt::Format))]
497#[derive(Clone, Copy, Debug, PartialEq, Eq)]
498pub enum Boffmsk {
499    #[doc = "0: Interrupt disabled"]
500    BusOffIntDisabled = 0,
501    #[doc = "1: Interrupt enabled"]
502    BusOffIntEnabled = 1,
503}
504impl From<Boffmsk> for bool {
505    #[inline(always)]
506    fn from(variant: Boffmsk) -> Self {
507        variant as u8 != 0
508    }
509}
510#[doc = "Field `BOFFMSK` reader - Bus Off Interrupt Mask"]
511pub type BoffmskR = crate::BitReader<Boffmsk>;
512impl BoffmskR {
513    #[doc = "Get enumerated values variant"]
514    #[inline(always)]
515    pub const fn variant(&self) -> Boffmsk {
516        match self.bits {
517            false => Boffmsk::BusOffIntDisabled,
518            true => Boffmsk::BusOffIntEnabled,
519        }
520    }
521    #[doc = "Interrupt disabled"]
522    #[inline(always)]
523    pub fn is_bus_off_int_disabled(&self) -> bool {
524        *self == Boffmsk::BusOffIntDisabled
525    }
526    #[doc = "Interrupt enabled"]
527    #[inline(always)]
528    pub fn is_bus_off_int_enabled(&self) -> bool {
529        *self == Boffmsk::BusOffIntEnabled
530    }
531}
532#[doc = "Field `BOFFMSK` writer - Bus Off Interrupt Mask"]
533pub type BoffmskW<'a, REG> = crate::BitWriter<'a, REG, Boffmsk>;
534impl<'a, REG> BoffmskW<'a, REG>
535where
536    REG: crate::Writable + crate::RegisterSpec,
537{
538    #[doc = "Interrupt disabled"]
539    #[inline(always)]
540    pub fn bus_off_int_disabled(self) -> &'a mut crate::W<REG> {
541        self.variant(Boffmsk::BusOffIntDisabled)
542    }
543    #[doc = "Interrupt enabled"]
544    #[inline(always)]
545    pub fn bus_off_int_enabled(self) -> &'a mut crate::W<REG> {
546        self.variant(Boffmsk::BusOffIntEnabled)
547    }
548}
549#[doc = "Field `PSEG2` reader - Phase Segment 2"]
550pub type Pseg2R = crate::FieldReader;
551#[doc = "Field `PSEG2` writer - Phase Segment 2"]
552pub type Pseg2W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
553#[doc = "Field `PSEG1` reader - Phase Segment 1"]
554pub type Pseg1R = crate::FieldReader;
555#[doc = "Field `PSEG1` writer - Phase Segment 1"]
556pub type Pseg1W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
557#[doc = "Field `RJW` reader - Resync Jump Width"]
558pub type RjwR = crate::FieldReader;
559#[doc = "Field `RJW` writer - Resync Jump Width"]
560pub type RjwW<'a, REG> = crate::FieldWriter<'a, REG, 2>;
561#[doc = "Field `PRESDIV` reader - Prescaler Division Factor"]
562pub type PresdivR = crate::FieldReader;
563#[doc = "Field `PRESDIV` writer - Prescaler Division Factor"]
564pub type PresdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
565impl R {
566    #[doc = "Bits 0:2 - Propagation Segment"]
567    #[inline(always)]
568    pub fn propseg(&self) -> PropsegR {
569        PropsegR::new((self.bits & 7) as u8)
570    }
571    #[doc = "Bit 3 - Listen-Only Mode"]
572    #[inline(always)]
573    pub fn lom(&self) -> LomR {
574        LomR::new(((self.bits >> 3) & 1) != 0)
575    }
576    #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
577    #[inline(always)]
578    pub fn lbuf(&self) -> LbufR {
579        LbufR::new(((self.bits >> 4) & 1) != 0)
580    }
581    #[doc = "Bit 5 - Timer Sync"]
582    #[inline(always)]
583    pub fn tsyn(&self) -> TsynR {
584        TsynR::new(((self.bits >> 5) & 1) != 0)
585    }
586    #[doc = "Bit 6 - Bus Off Recovery"]
587    #[inline(always)]
588    pub fn boffrec(&self) -> BoffrecR {
589        BoffrecR::new(((self.bits >> 6) & 1) != 0)
590    }
591    #[doc = "Bit 7 - CAN Bit Sampling"]
592    #[inline(always)]
593    pub fn smp(&self) -> SmpR {
594        SmpR::new(((self.bits >> 7) & 1) != 0)
595    }
596    #[doc = "Bit 10 - RX Warning Interrupt Mask"]
597    #[inline(always)]
598    pub fn rwrnmsk(&self) -> RwrnmskR {
599        RwrnmskR::new(((self.bits >> 10) & 1) != 0)
600    }
601    #[doc = "Bit 11 - TX Warning Interrupt Mask"]
602    #[inline(always)]
603    pub fn twrnmsk(&self) -> TwrnmskR {
604        TwrnmskR::new(((self.bits >> 11) & 1) != 0)
605    }
606    #[doc = "Bit 12 - Loopback Mode"]
607    #[inline(always)]
608    pub fn lpb(&self) -> LpbR {
609        LpbR::new(((self.bits >> 12) & 1) != 0)
610    }
611    #[doc = "Bit 14 - Error Interrupt Mask"]
612    #[inline(always)]
613    pub fn errmsk(&self) -> ErrmskR {
614        ErrmskR::new(((self.bits >> 14) & 1) != 0)
615    }
616    #[doc = "Bit 15 - Bus Off Interrupt Mask"]
617    #[inline(always)]
618    pub fn boffmsk(&self) -> BoffmskR {
619        BoffmskR::new(((self.bits >> 15) & 1) != 0)
620    }
621    #[doc = "Bits 16:18 - Phase Segment 2"]
622    #[inline(always)]
623    pub fn pseg2(&self) -> Pseg2R {
624        Pseg2R::new(((self.bits >> 16) & 7) as u8)
625    }
626    #[doc = "Bits 19:21 - Phase Segment 1"]
627    #[inline(always)]
628    pub fn pseg1(&self) -> Pseg1R {
629        Pseg1R::new(((self.bits >> 19) & 7) as u8)
630    }
631    #[doc = "Bits 22:23 - Resync Jump Width"]
632    #[inline(always)]
633    pub fn rjw(&self) -> RjwR {
634        RjwR::new(((self.bits >> 22) & 3) as u8)
635    }
636    #[doc = "Bits 24:31 - Prescaler Division Factor"]
637    #[inline(always)]
638    pub fn presdiv(&self) -> PresdivR {
639        PresdivR::new(((self.bits >> 24) & 0xff) as u8)
640    }
641}
642#[cfg(feature = "debug")]
643impl core::fmt::Debug for R {
644    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
645        f.debug_struct("CTRL1")
646            .field("propseg", &self.propseg())
647            .field("lom", &self.lom())
648            .field("lbuf", &self.lbuf())
649            .field("tsyn", &self.tsyn())
650            .field("boffrec", &self.boffrec())
651            .field("smp", &self.smp())
652            .field("rwrnmsk", &self.rwrnmsk())
653            .field("twrnmsk", &self.twrnmsk())
654            .field("lpb", &self.lpb())
655            .field("errmsk", &self.errmsk())
656            .field("boffmsk", &self.boffmsk())
657            .field("pseg2", &self.pseg2())
658            .field("pseg1", &self.pseg1())
659            .field("rjw", &self.rjw())
660            .field("presdiv", &self.presdiv())
661            .finish()
662    }
663}
664impl W {
665    #[doc = "Bits 0:2 - Propagation Segment"]
666    #[inline(always)]
667    pub fn propseg(&mut self) -> PropsegW<'_, Ctrl1Spec> {
668        PropsegW::new(self, 0)
669    }
670    #[doc = "Bit 3 - Listen-Only Mode"]
671    #[inline(always)]
672    pub fn lom(&mut self) -> LomW<'_, Ctrl1Spec> {
673        LomW::new(self, 3)
674    }
675    #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
676    #[inline(always)]
677    pub fn lbuf(&mut self) -> LbufW<'_, Ctrl1Spec> {
678        LbufW::new(self, 4)
679    }
680    #[doc = "Bit 5 - Timer Sync"]
681    #[inline(always)]
682    pub fn tsyn(&mut self) -> TsynW<'_, Ctrl1Spec> {
683        TsynW::new(self, 5)
684    }
685    #[doc = "Bit 6 - Bus Off Recovery"]
686    #[inline(always)]
687    pub fn boffrec(&mut self) -> BoffrecW<'_, Ctrl1Spec> {
688        BoffrecW::new(self, 6)
689    }
690    #[doc = "Bit 7 - CAN Bit Sampling"]
691    #[inline(always)]
692    pub fn smp(&mut self) -> SmpW<'_, Ctrl1Spec> {
693        SmpW::new(self, 7)
694    }
695    #[doc = "Bit 10 - RX Warning Interrupt Mask"]
696    #[inline(always)]
697    pub fn rwrnmsk(&mut self) -> RwrnmskW<'_, Ctrl1Spec> {
698        RwrnmskW::new(self, 10)
699    }
700    #[doc = "Bit 11 - TX Warning Interrupt Mask"]
701    #[inline(always)]
702    pub fn twrnmsk(&mut self) -> TwrnmskW<'_, Ctrl1Spec> {
703        TwrnmskW::new(self, 11)
704    }
705    #[doc = "Bit 12 - Loopback Mode"]
706    #[inline(always)]
707    pub fn lpb(&mut self) -> LpbW<'_, Ctrl1Spec> {
708        LpbW::new(self, 12)
709    }
710    #[doc = "Bit 14 - Error Interrupt Mask"]
711    #[inline(always)]
712    pub fn errmsk(&mut self) -> ErrmskW<'_, Ctrl1Spec> {
713        ErrmskW::new(self, 14)
714    }
715    #[doc = "Bit 15 - Bus Off Interrupt Mask"]
716    #[inline(always)]
717    pub fn boffmsk(&mut self) -> BoffmskW<'_, Ctrl1Spec> {
718        BoffmskW::new(self, 15)
719    }
720    #[doc = "Bits 16:18 - Phase Segment 2"]
721    #[inline(always)]
722    pub fn pseg2(&mut self) -> Pseg2W<'_, Ctrl1Spec> {
723        Pseg2W::new(self, 16)
724    }
725    #[doc = "Bits 19:21 - Phase Segment 1"]
726    #[inline(always)]
727    pub fn pseg1(&mut self) -> Pseg1W<'_, Ctrl1Spec> {
728        Pseg1W::new(self, 19)
729    }
730    #[doc = "Bits 22:23 - Resync Jump Width"]
731    #[inline(always)]
732    pub fn rjw(&mut self) -> RjwW<'_, Ctrl1Spec> {
733        RjwW::new(self, 22)
734    }
735    #[doc = "Bits 24:31 - Prescaler Division Factor"]
736    #[inline(always)]
737    pub fn presdiv(&mut self) -> PresdivW<'_, Ctrl1Spec> {
738        PresdivW::new(self, 24)
739    }
740}
741#[doc = "Control 1\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
742pub struct Ctrl1Spec;
743impl crate::RegisterSpec for Ctrl1Spec {
744    type Ux = u32;
745}
746#[doc = "`read()` method returns [`ctrl1::R`](R) reader structure"]
747impl crate::Readable for Ctrl1Spec {}
748#[doc = "`write(|w| ..)` method takes [`ctrl1::W`](W) writer structure"]
749impl crate::Writable for Ctrl1Spec {
750    type Safety = crate::Unsafe;
751}
752#[doc = "`reset()` method sets CTRL1 to value 0"]
753impl crate::Resettable for Ctrl1Spec {}
mcxa_pac/can0/ctrl1.rs

mcxa_pac/can0/
ctrl1.rs
