mcxa_pac/usb0/
stall_ol_dis.rs

1#[doc = "Register `STALL_OL_DIS` reader"]
2pub type R = crate::R<StallOlDisSpec>;
3#[doc = "Register `STALL_OL_DIS` writer"]
4pub type W = crate::W<StallOlDisSpec>;
5#[doc = "Disable Endpoint 0 OUT Direction\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum StallODis0 {
9    #[doc = "0: Enable"]
10    EnEp0OutStall = 0,
11    #[doc = "1: Disable"]
12    DisEp0OutStall = 1,
13}
14impl From<StallODis0> for bool {
15    #[inline(always)]
16    fn from(variant: StallODis0) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `STALL_O_DIS0` reader - Disable Endpoint 0 OUT Direction"]
21pub type StallODis0R = crate::BitReader<StallODis0>;
22impl StallODis0R {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> StallODis0 {
26        match self.bits {
27            false => StallODis0::EnEp0OutStall,
28            true => StallODis0::DisEp0OutStall,
29        }
30    }
31    #[doc = "Enable"]
32    #[inline(always)]
33    pub fn is_en_ep0_out_stall(&self) -> bool {
34        *self == StallODis0::EnEp0OutStall
35    }
36    #[doc = "Disable"]
37    #[inline(always)]
38    pub fn is_dis_ep0_out_stall(&self) -> bool {
39        *self == StallODis0::DisEp0OutStall
40    }
41}
42#[doc = "Field `STALL_O_DIS0` writer - Disable Endpoint 0 OUT Direction"]
43pub type StallODis0W<'a, REG> = crate::BitWriter<'a, REG, StallODis0>;
44impl<'a, REG> StallODis0W<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Enable"]
49    #[inline(always)]
50    pub fn en_ep0_out_stall(self) -> &'a mut crate::W<REG> {
51        self.variant(StallODis0::EnEp0OutStall)
52    }
53    #[doc = "Disable"]
54    #[inline(always)]
55    pub fn dis_ep0_out_stall(self) -> &'a mut crate::W<REG> {
56        self.variant(StallODis0::DisEp0OutStall)
57    }
58}
59#[doc = "Disable Endpoint 1 OUT Direction\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum StallODis1 {
63    #[doc = "0: Enable"]
64    EnEp1OutStall = 0,
65    #[doc = "1: Disable"]
66    DisEp1OutStall = 1,
67}
68impl From<StallODis1> for bool {
69    #[inline(always)]
70    fn from(variant: StallODis1) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `STALL_O_DIS1` reader - Disable Endpoint 1 OUT Direction"]
75pub type StallODis1R = crate::BitReader<StallODis1>;
76impl StallODis1R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> StallODis1 {
80        match self.bits {
81            false => StallODis1::EnEp1OutStall,
82            true => StallODis1::DisEp1OutStall,
83        }
84    }
85    #[doc = "Enable"]
86    #[inline(always)]
87    pub fn is_en_ep1_out_stall(&self) -> bool {
88        *self == StallODis1::EnEp1OutStall
89    }
90    #[doc = "Disable"]
91    #[inline(always)]
92    pub fn is_dis_ep1_out_stall(&self) -> bool {
93        *self == StallODis1::DisEp1OutStall
94    }
95}
96#[doc = "Field `STALL_O_DIS1` writer - Disable Endpoint 1 OUT Direction"]
97pub type StallODis1W<'a, REG> = crate::BitWriter<'a, REG, StallODis1>;
98impl<'a, REG> StallODis1W<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Enable"]
103    #[inline(always)]
104    pub fn en_ep1_out_stall(self) -> &'a mut crate::W<REG> {
105        self.variant(StallODis1::EnEp1OutStall)
106    }
107    #[doc = "Disable"]
108    #[inline(always)]
109    pub fn dis_ep1_out_stall(self) -> &'a mut crate::W<REG> {
110        self.variant(StallODis1::DisEp1OutStall)
111    }
112}
113#[doc = "Disable Endpoint 2 OUT Direction\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum StallODis2 {
117    #[doc = "0: Enable"]
118    EnEp2OutStall = 0,
119    #[doc = "1: Disable"]
120    DisEp2OutStall = 1,
121}
122impl From<StallODis2> for bool {
123    #[inline(always)]
124    fn from(variant: StallODis2) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `STALL_O_DIS2` reader - Disable Endpoint 2 OUT Direction"]
129pub type StallODis2R = crate::BitReader<StallODis2>;
130impl StallODis2R {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> StallODis2 {
134        match self.bits {
135            false => StallODis2::EnEp2OutStall,
136            true => StallODis2::DisEp2OutStall,
137        }
138    }
139    #[doc = "Enable"]
140    #[inline(always)]
141    pub fn is_en_ep2_out_stall(&self) -> bool {
142        *self == StallODis2::EnEp2OutStall
143    }
144    #[doc = "Disable"]
145    #[inline(always)]
146    pub fn is_dis_ep2_out_stall(&self) -> bool {
147        *self == StallODis2::DisEp2OutStall
148    }
149}
150#[doc = "Field `STALL_O_DIS2` writer - Disable Endpoint 2 OUT Direction"]
151pub type StallODis2W<'a, REG> = crate::BitWriter<'a, REG, StallODis2>;
152impl<'a, REG> StallODis2W<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Enable"]
157    #[inline(always)]
158    pub fn en_ep2_out_stall(self) -> &'a mut crate::W<REG> {
159        self.variant(StallODis2::EnEp2OutStall)
160    }
161    #[doc = "Disable"]
162    #[inline(always)]
163    pub fn dis_ep2_out_stall(self) -> &'a mut crate::W<REG> {
164        self.variant(StallODis2::DisEp2OutStall)
165    }
166}
167#[doc = "Disable Endpoint 3 OUT Direction\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum StallODis3 {
171    #[doc = "0: Enable"]
172    EnEp3OutStall = 0,
173    #[doc = "1: Disable"]
174    DisEp3OutStall = 1,
175}
176impl From<StallODis3> for bool {
177    #[inline(always)]
178    fn from(variant: StallODis3) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `STALL_O_DIS3` reader - Disable Endpoint 3 OUT Direction"]
183pub type StallODis3R = crate::BitReader<StallODis3>;
184impl StallODis3R {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> StallODis3 {
188        match self.bits {
189            false => StallODis3::EnEp3OutStall,
190            true => StallODis3::DisEp3OutStall,
191        }
192    }
193    #[doc = "Enable"]
194    #[inline(always)]
195    pub fn is_en_ep3_out_stall(&self) -> bool {
196        *self == StallODis3::EnEp3OutStall
197    }
198    #[doc = "Disable"]
199    #[inline(always)]
200    pub fn is_dis_ep3_out_stall(&self) -> bool {
201        *self == StallODis3::DisEp3OutStall
202    }
203}
204#[doc = "Field `STALL_O_DIS3` writer - Disable Endpoint 3 OUT Direction"]
205pub type StallODis3W<'a, REG> = crate::BitWriter<'a, REG, StallODis3>;
206impl<'a, REG> StallODis3W<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Enable"]
211    #[inline(always)]
212    pub fn en_ep3_out_stall(self) -> &'a mut crate::W<REG> {
213        self.variant(StallODis3::EnEp3OutStall)
214    }
215    #[doc = "Disable"]
216    #[inline(always)]
217    pub fn dis_ep3_out_stall(self) -> &'a mut crate::W<REG> {
218        self.variant(StallODis3::DisEp3OutStall)
219    }
220}
221#[doc = "Disable Endpoint 4 OUT Direction\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum StallODis4 {
225    #[doc = "0: Enable"]
226    EnEp4OutStall = 0,
227    #[doc = "1: Disable"]
228    DisEp4OutStall = 1,
229}
230impl From<StallODis4> for bool {
231    #[inline(always)]
232    fn from(variant: StallODis4) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `STALL_O_DIS4` reader - Disable Endpoint 4 OUT Direction"]
237pub type StallODis4R = crate::BitReader<StallODis4>;
238impl StallODis4R {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> StallODis4 {
242        match self.bits {
243            false => StallODis4::EnEp4OutStall,
244            true => StallODis4::DisEp4OutStall,
245        }
246    }
247    #[doc = "Enable"]
248    #[inline(always)]
249    pub fn is_en_ep4_out_stall(&self) -> bool {
250        *self == StallODis4::EnEp4OutStall
251    }
252    #[doc = "Disable"]
253    #[inline(always)]
254    pub fn is_dis_ep4_out_stall(&self) -> bool {
255        *self == StallODis4::DisEp4OutStall
256    }
257}
258#[doc = "Field `STALL_O_DIS4` writer - Disable Endpoint 4 OUT Direction"]
259pub type StallODis4W<'a, REG> = crate::BitWriter<'a, REG, StallODis4>;
260impl<'a, REG> StallODis4W<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Enable"]
265    #[inline(always)]
266    pub fn en_ep4_out_stall(self) -> &'a mut crate::W<REG> {
267        self.variant(StallODis4::EnEp4OutStall)
268    }
269    #[doc = "Disable"]
270    #[inline(always)]
271    pub fn dis_ep4_out_stall(self) -> &'a mut crate::W<REG> {
272        self.variant(StallODis4::DisEp4OutStall)
273    }
274}
275#[doc = "Disable Endpoint 5 OUT Direction\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum StallODis5 {
279    #[doc = "0: Enable"]
280    EnEp5OutStall = 0,
281    #[doc = "1: Disable"]
282    DisEp5OutStall = 1,
283}
284impl From<StallODis5> for bool {
285    #[inline(always)]
286    fn from(variant: StallODis5) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `STALL_O_DIS5` reader - Disable Endpoint 5 OUT Direction"]
291pub type StallODis5R = crate::BitReader<StallODis5>;
292impl StallODis5R {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> StallODis5 {
296        match self.bits {
297            false => StallODis5::EnEp5OutStall,
298            true => StallODis5::DisEp5OutStall,
299        }
300    }
301    #[doc = "Enable"]
302    #[inline(always)]
303    pub fn is_en_ep5_out_stall(&self) -> bool {
304        *self == StallODis5::EnEp5OutStall
305    }
306    #[doc = "Disable"]
307    #[inline(always)]
308    pub fn is_dis_ep5_out_stall(&self) -> bool {
309        *self == StallODis5::DisEp5OutStall
310    }
311}
312#[doc = "Field `STALL_O_DIS5` writer - Disable Endpoint 5 OUT Direction"]
313pub type StallODis5W<'a, REG> = crate::BitWriter<'a, REG, StallODis5>;
314impl<'a, REG> StallODis5W<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "Enable"]
319    #[inline(always)]
320    pub fn en_ep5_out_stall(self) -> &'a mut crate::W<REG> {
321        self.variant(StallODis5::EnEp5OutStall)
322    }
323    #[doc = "Disable"]
324    #[inline(always)]
325    pub fn dis_ep5_out_stall(self) -> &'a mut crate::W<REG> {
326        self.variant(StallODis5::DisEp5OutStall)
327    }
328}
329#[doc = "Disable Endpoint 6 OUT Direction\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum StallODis6 {
333    #[doc = "0: Enable"]
334    EnEp6OutStall = 0,
335    #[doc = "1: Disable"]
336    DisEp6OutStall = 1,
337}
338impl From<StallODis6> for bool {
339    #[inline(always)]
340    fn from(variant: StallODis6) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `STALL_O_DIS6` reader - Disable Endpoint 6 OUT Direction"]
345pub type StallODis6R = crate::BitReader<StallODis6>;
346impl StallODis6R {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> StallODis6 {
350        match self.bits {
351            false => StallODis6::EnEp6OutStall,
352            true => StallODis6::DisEp6OutStall,
353        }
354    }
355    #[doc = "Enable"]
356    #[inline(always)]
357    pub fn is_en_ep6_out_stall(&self) -> bool {
358        *self == StallODis6::EnEp6OutStall
359    }
360    #[doc = "Disable"]
361    #[inline(always)]
362    pub fn is_dis_ep6_out_stall(&self) -> bool {
363        *self == StallODis6::DisEp6OutStall
364    }
365}
366#[doc = "Field `STALL_O_DIS6` writer - Disable Endpoint 6 OUT Direction"]
367pub type StallODis6W<'a, REG> = crate::BitWriter<'a, REG, StallODis6>;
368impl<'a, REG> StallODis6W<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "Enable"]
373    #[inline(always)]
374    pub fn en_ep6_out_stall(self) -> &'a mut crate::W<REG> {
375        self.variant(StallODis6::EnEp6OutStall)
376    }
377    #[doc = "Disable"]
378    #[inline(always)]
379    pub fn dis_ep6_out_stall(self) -> &'a mut crate::W<REG> {
380        self.variant(StallODis6::DisEp6OutStall)
381    }
382}
383#[doc = "Disable Endpoint 7 OUT Direction\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum StallODis7 {
387    #[doc = "0: Enable"]
388    EnEp7OutStall = 0,
389    #[doc = "1: Disable"]
390    DisEp7OutStall = 1,
391}
392impl From<StallODis7> for bool {
393    #[inline(always)]
394    fn from(variant: StallODis7) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `STALL_O_DIS7` reader - Disable Endpoint 7 OUT Direction"]
399pub type StallODis7R = crate::BitReader<StallODis7>;
400impl StallODis7R {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> StallODis7 {
404        match self.bits {
405            false => StallODis7::EnEp7OutStall,
406            true => StallODis7::DisEp7OutStall,
407        }
408    }
409    #[doc = "Enable"]
410    #[inline(always)]
411    pub fn is_en_ep7_out_stall(&self) -> bool {
412        *self == StallODis7::EnEp7OutStall
413    }
414    #[doc = "Disable"]
415    #[inline(always)]
416    pub fn is_dis_ep7_out_stall(&self) -> bool {
417        *self == StallODis7::DisEp7OutStall
418    }
419}
420#[doc = "Field `STALL_O_DIS7` writer - Disable Endpoint 7 OUT Direction"]
421pub type StallODis7W<'a, REG> = crate::BitWriter<'a, REG, StallODis7>;
422impl<'a, REG> StallODis7W<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "Enable"]
427    #[inline(always)]
428    pub fn en_ep7_out_stall(self) -> &'a mut crate::W<REG> {
429        self.variant(StallODis7::EnEp7OutStall)
430    }
431    #[doc = "Disable"]
432    #[inline(always)]
433    pub fn dis_ep7_out_stall(self) -> &'a mut crate::W<REG> {
434        self.variant(StallODis7::DisEp7OutStall)
435    }
436}
437impl R {
438    #[doc = "Bit 0 - Disable Endpoint 0 OUT Direction"]
439    #[inline(always)]
440    pub fn stall_o_dis0(&self) -> StallODis0R {
441        StallODis0R::new((self.bits & 1) != 0)
442    }
443    #[doc = "Bit 1 - Disable Endpoint 1 OUT Direction"]
444    #[inline(always)]
445    pub fn stall_o_dis1(&self) -> StallODis1R {
446        StallODis1R::new(((self.bits >> 1) & 1) != 0)
447    }
448    #[doc = "Bit 2 - Disable Endpoint 2 OUT Direction"]
449    #[inline(always)]
450    pub fn stall_o_dis2(&self) -> StallODis2R {
451        StallODis2R::new(((self.bits >> 2) & 1) != 0)
452    }
453    #[doc = "Bit 3 - Disable Endpoint 3 OUT Direction"]
454    #[inline(always)]
455    pub fn stall_o_dis3(&self) -> StallODis3R {
456        StallODis3R::new(((self.bits >> 3) & 1) != 0)
457    }
458    #[doc = "Bit 4 - Disable Endpoint 4 OUT Direction"]
459    #[inline(always)]
460    pub fn stall_o_dis4(&self) -> StallODis4R {
461        StallODis4R::new(((self.bits >> 4) & 1) != 0)
462    }
463    #[doc = "Bit 5 - Disable Endpoint 5 OUT Direction"]
464    #[inline(always)]
465    pub fn stall_o_dis5(&self) -> StallODis5R {
466        StallODis5R::new(((self.bits >> 5) & 1) != 0)
467    }
468    #[doc = "Bit 6 - Disable Endpoint 6 OUT Direction"]
469    #[inline(always)]
470    pub fn stall_o_dis6(&self) -> StallODis6R {
471        StallODis6R::new(((self.bits >> 6) & 1) != 0)
472    }
473    #[doc = "Bit 7 - Disable Endpoint 7 OUT Direction"]
474    #[inline(always)]
475    pub fn stall_o_dis7(&self) -> StallODis7R {
476        StallODis7R::new(((self.bits >> 7) & 1) != 0)
477    }
478}
479#[cfg(feature = "debug")]
480impl core::fmt::Debug for R {
481    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
482        f.debug_struct("STALL_OL_DIS")
483            .field("stall_o_dis0", &self.stall_o_dis0())
484            .field("stall_o_dis1", &self.stall_o_dis1())
485            .field("stall_o_dis2", &self.stall_o_dis2())
486            .field("stall_o_dis3", &self.stall_o_dis3())
487            .field("stall_o_dis4", &self.stall_o_dis4())
488            .field("stall_o_dis5", &self.stall_o_dis5())
489            .field("stall_o_dis6", &self.stall_o_dis6())
490            .field("stall_o_dis7", &self.stall_o_dis7())
491            .finish()
492    }
493}
494impl W {
495    #[doc = "Bit 0 - Disable Endpoint 0 OUT Direction"]
496    #[inline(always)]
497    pub fn stall_o_dis0(&mut self) -> StallODis0W<'_, StallOlDisSpec> {
498        StallODis0W::new(self, 0)
499    }
500    #[doc = "Bit 1 - Disable Endpoint 1 OUT Direction"]
501    #[inline(always)]
502    pub fn stall_o_dis1(&mut self) -> StallODis1W<'_, StallOlDisSpec> {
503        StallODis1W::new(self, 1)
504    }
505    #[doc = "Bit 2 - Disable Endpoint 2 OUT Direction"]
506    #[inline(always)]
507    pub fn stall_o_dis2(&mut self) -> StallODis2W<'_, StallOlDisSpec> {
508        StallODis2W::new(self, 2)
509    }
510    #[doc = "Bit 3 - Disable Endpoint 3 OUT Direction"]
511    #[inline(always)]
512    pub fn stall_o_dis3(&mut self) -> StallODis3W<'_, StallOlDisSpec> {
513        StallODis3W::new(self, 3)
514    }
515    #[doc = "Bit 4 - Disable Endpoint 4 OUT Direction"]
516    #[inline(always)]
517    pub fn stall_o_dis4(&mut self) -> StallODis4W<'_, StallOlDisSpec> {
518        StallODis4W::new(self, 4)
519    }
520    #[doc = "Bit 5 - Disable Endpoint 5 OUT Direction"]
521    #[inline(always)]
522    pub fn stall_o_dis5(&mut self) -> StallODis5W<'_, StallOlDisSpec> {
523        StallODis5W::new(self, 5)
524    }
525    #[doc = "Bit 6 - Disable Endpoint 6 OUT Direction"]
526    #[inline(always)]
527    pub fn stall_o_dis6(&mut self) -> StallODis6W<'_, StallOlDisSpec> {
528        StallODis6W::new(self, 6)
529    }
530    #[doc = "Bit 7 - Disable Endpoint 7 OUT Direction"]
531    #[inline(always)]
532    pub fn stall_o_dis7(&mut self) -> StallODis7W<'_, StallOlDisSpec> {
533        StallODis7W::new(self, 7)
534    }
535}
536#[doc = "Peripheral Mode Stall Disable for Endpoints 7 to 0 in OUT Direction\n\nYou can [`read`](crate::Reg::read) this register and get [`stall_ol_dis::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stall_ol_dis::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
537pub struct StallOlDisSpec;
538impl crate::RegisterSpec for StallOlDisSpec {
539    type Ux = u8;
540}
541#[doc = "`read()` method returns [`stall_ol_dis::R`](R) reader structure"]
542impl crate::Readable for StallOlDisSpec {}
543#[doc = "`write(|w| ..)` method takes [`stall_ol_dis::W`](W) writer structure"]
544impl crate::Writable for StallOlDisSpec {
545    type Safety = crate::Unsafe;
546}
547#[doc = "`reset()` method sets STALL_OL_DIS to value 0"]
548impl crate::Resettable for StallOlDisSpec {}
mcxa_pac/usb0/stall_ol_dis.rs

mcxa_pac/usb0/
stall_ol_dis.rs
