mcxa_pac/usb0/
clk_recover_ctrl.rs1#[doc = "Register `CLK_RECOVER_CTRL` reader"]
2pub type R = crate::R<ClkRecoverCtrlSpec>;
3#[doc = "Register `CLK_RECOVER_CTRL` writer"]
4pub type W = crate::W<ClkRecoverCtrlSpec>;
5#[doc = "Selects the source for the initial FIRC trim fine value used after a reset.\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum TrimInitValSel {
9 #[doc = "0: Mid-scale"]
10 InitTrimFineMid = 0,
11 #[doc = "1: IFR"]
12 InitTrimFineIfr = 1,
13}
14impl From<TrimInitValSel> for bool {
15 #[inline(always)]
16 fn from(variant: TrimInitValSel) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `TRIM_INIT_VAL_SEL` reader - Selects the source for the initial FIRC trim fine value used after a reset."]
21pub type TrimInitValSelR = crate::BitReader<TrimInitValSel>;
22impl TrimInitValSelR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> TrimInitValSel {
26 match self.bits {
27 false => TrimInitValSel::InitTrimFineMid,
28 true => TrimInitValSel::InitTrimFineIfr,
29 }
30 }
31 #[doc = "Mid-scale"]
32 #[inline(always)]
33 pub fn is_init_trim_fine_mid(&self) -> bool {
34 *self == TrimInitValSel::InitTrimFineMid
35 }
36 #[doc = "IFR"]
37 #[inline(always)]
38 pub fn is_init_trim_fine_ifr(&self) -> bool {
39 *self == TrimInitValSel::InitTrimFineIfr
40 }
41}
42#[doc = "Field `TRIM_INIT_VAL_SEL` writer - Selects the source for the initial FIRC trim fine value used after a reset."]
43pub type TrimInitValSelW<'a, REG> = crate::BitWriter<'a, REG, TrimInitValSel>;
44impl<'a, REG> TrimInitValSelW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Mid-scale"]
49 #[inline(always)]
50 pub fn init_trim_fine_mid(self) -> &'a mut crate::W<REG> {
51 self.variant(TrimInitValSel::InitTrimFineMid)
52 }
53 #[doc = "IFR"]
54 #[inline(always)]
55 pub fn init_trim_fine_ifr(self) -> &'a mut crate::W<REG> {
56 self.variant(TrimInitValSel::InitTrimFineIfr)
57 }
58}
59#[doc = "Restart from IFR Trim Value\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum RestartIfrtrimEn {
63 #[doc = "0: Trim fine adjustment always works based on the previous updated trim fine value."]
64 LoadTrimFineMid = 0,
65 #[doc = "1: Trim fine restarts from the IFR trim value whenever you detect bus_reset or bus_resume or deassert module enable."]
66 LoadTrimFineIfr = 1,
67}
68impl From<RestartIfrtrimEn> for bool {
69 #[inline(always)]
70 fn from(variant: RestartIfrtrimEn) -> Self {
71 variant as u8 != 0
72 }
73}
74#[doc = "Field `RESTART_IFRTRIM_EN` reader - Restart from IFR Trim Value"]
75pub type RestartIfrtrimEnR = crate::BitReader<RestartIfrtrimEn>;
76impl RestartIfrtrimEnR {
77 #[doc = "Get enumerated values variant"]
78 #[inline(always)]
79 pub const fn variant(&self) -> RestartIfrtrimEn {
80 match self.bits {
81 false => RestartIfrtrimEn::LoadTrimFineMid,
82 true => RestartIfrtrimEn::LoadTrimFineIfr,
83 }
84 }
85 #[doc = "Trim fine adjustment always works based on the previous updated trim fine value."]
86 #[inline(always)]
87 pub fn is_load_trim_fine_mid(&self) -> bool {
88 *self == RestartIfrtrimEn::LoadTrimFineMid
89 }
90 #[doc = "Trim fine restarts from the IFR trim value whenever you detect bus_reset or bus_resume or deassert module enable."]
91 #[inline(always)]
92 pub fn is_load_trim_fine_ifr(&self) -> bool {
93 *self == RestartIfrtrimEn::LoadTrimFineIfr
94 }
95}
96#[doc = "Field `RESTART_IFRTRIM_EN` writer - Restart from IFR Trim Value"]
97pub type RestartIfrtrimEnW<'a, REG> = crate::BitWriter<'a, REG, RestartIfrtrimEn>;
98impl<'a, REG> RestartIfrtrimEnW<'a, REG>
99where
100 REG: crate::Writable + crate::RegisterSpec,
101{
102 #[doc = "Trim fine adjustment always works based on the previous updated trim fine value."]
103 #[inline(always)]
104 pub fn load_trim_fine_mid(self) -> &'a mut crate::W<REG> {
105 self.variant(RestartIfrtrimEn::LoadTrimFineMid)
106 }
107 #[doc = "Trim fine restarts from the IFR trim value whenever you detect bus_reset or bus_resume or deassert module enable."]
108 #[inline(always)]
109 pub fn load_trim_fine_ifr(self) -> &'a mut crate::W<REG> {
110 self.variant(RestartIfrtrimEn::LoadTrimFineIfr)
111 }
112}
113#[doc = "Reset or Resume to Rough Phase Enable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum ResetResumeRoughEn {
117 #[doc = "0: Always works in tracking phase after the first time rough phase, to track transition."]
118 KeepTrimFineOnReset = 0,
119 #[doc = "1: Go back to rough stage whenever a bus reset or bus resume occurs."]
120 UseIfrTrimFineOnReset = 1,
121}
122impl From<ResetResumeRoughEn> for bool {
123 #[inline(always)]
124 fn from(variant: ResetResumeRoughEn) -> Self {
125 variant as u8 != 0
126 }
127}
128#[doc = "Field `RESET_RESUME_ROUGH_EN` reader - Reset or Resume to Rough Phase Enable"]
129pub type ResetResumeRoughEnR = crate::BitReader<ResetResumeRoughEn>;
130impl ResetResumeRoughEnR {
131 #[doc = "Get enumerated values variant"]
132 #[inline(always)]
133 pub const fn variant(&self) -> ResetResumeRoughEn {
134 match self.bits {
135 false => ResetResumeRoughEn::KeepTrimFineOnReset,
136 true => ResetResumeRoughEn::UseIfrTrimFineOnReset,
137 }
138 }
139 #[doc = "Always works in tracking phase after the first time rough phase, to track transition."]
140 #[inline(always)]
141 pub fn is_keep_trim_fine_on_reset(&self) -> bool {
142 *self == ResetResumeRoughEn::KeepTrimFineOnReset
143 }
144 #[doc = "Go back to rough stage whenever a bus reset or bus resume occurs."]
145 #[inline(always)]
146 pub fn is_use_ifr_trim_fine_on_reset(&self) -> bool {
147 *self == ResetResumeRoughEn::UseIfrTrimFineOnReset
148 }
149}
150#[doc = "Field `RESET_RESUME_ROUGH_EN` writer - Reset or Resume to Rough Phase Enable"]
151pub type ResetResumeRoughEnW<'a, REG> = crate::BitWriter<'a, REG, ResetResumeRoughEn>;
152impl<'a, REG> ResetResumeRoughEnW<'a, REG>
153where
154 REG: crate::Writable + crate::RegisterSpec,
155{
156 #[doc = "Always works in tracking phase after the first time rough phase, to track transition."]
157 #[inline(always)]
158 pub fn keep_trim_fine_on_reset(self) -> &'a mut crate::W<REG> {
159 self.variant(ResetResumeRoughEn::KeepTrimFineOnReset)
160 }
161 #[doc = "Go back to rough stage whenever a bus reset or bus resume occurs."]
162 #[inline(always)]
163 pub fn use_ifr_trim_fine_on_reset(self) -> &'a mut crate::W<REG> {
164 self.variant(ResetResumeRoughEn::UseIfrTrimFineOnReset)
165 }
166}
167#[doc = "Crystal-Less USB Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum ClockRecoverEn {
171 #[doc = "0: Disable"]
172 DisClkRecover = 0,
173 #[doc = "1: Enable"]
174 EnClkRecover = 1,
175}
176impl From<ClockRecoverEn> for bool {
177 #[inline(always)]
178 fn from(variant: ClockRecoverEn) -> Self {
179 variant as u8 != 0
180 }
181}
182#[doc = "Field `CLOCK_RECOVER_EN` reader - Crystal-Less USB Enable"]
183pub type ClockRecoverEnR = crate::BitReader<ClockRecoverEn>;
184impl ClockRecoverEnR {
185 #[doc = "Get enumerated values variant"]
186 #[inline(always)]
187 pub const fn variant(&self) -> ClockRecoverEn {
188 match self.bits {
189 false => ClockRecoverEn::DisClkRecover,
190 true => ClockRecoverEn::EnClkRecover,
191 }
192 }
193 #[doc = "Disable"]
194 #[inline(always)]
195 pub fn is_dis_clk_recover(&self) -> bool {
196 *self == ClockRecoverEn::DisClkRecover
197 }
198 #[doc = "Enable"]
199 #[inline(always)]
200 pub fn is_en_clk_recover(&self) -> bool {
201 *self == ClockRecoverEn::EnClkRecover
202 }
203}
204#[doc = "Field `CLOCK_RECOVER_EN` writer - Crystal-Less USB Enable"]
205pub type ClockRecoverEnW<'a, REG> = crate::BitWriter<'a, REG, ClockRecoverEn>;
206impl<'a, REG> ClockRecoverEnW<'a, REG>
207where
208 REG: crate::Writable + crate::RegisterSpec,
209{
210 #[doc = "Disable"]
211 #[inline(always)]
212 pub fn dis_clk_recover(self) -> &'a mut crate::W<REG> {
213 self.variant(ClockRecoverEn::DisClkRecover)
214 }
215 #[doc = "Enable"]
216 #[inline(always)]
217 pub fn en_clk_recover(self) -> &'a mut crate::W<REG> {
218 self.variant(ClockRecoverEn::EnClkRecover)
219 }
220}
221impl R {
222 #[doc = "Bit 3 - Selects the source for the initial FIRC trim fine value used after a reset."]
223 #[inline(always)]
224 pub fn trim_init_val_sel(&self) -> TrimInitValSelR {
225 TrimInitValSelR::new(((self.bits >> 3) & 1) != 0)
226 }
227 #[doc = "Bit 5 - Restart from IFR Trim Value"]
228 #[inline(always)]
229 pub fn restart_ifrtrim_en(&self) -> RestartIfrtrimEnR {
230 RestartIfrtrimEnR::new(((self.bits >> 5) & 1) != 0)
231 }
232 #[doc = "Bit 6 - Reset or Resume to Rough Phase Enable"]
233 #[inline(always)]
234 pub fn reset_resume_rough_en(&self) -> ResetResumeRoughEnR {
235 ResetResumeRoughEnR::new(((self.bits >> 6) & 1) != 0)
236 }
237 #[doc = "Bit 7 - Crystal-Less USB Enable"]
238 #[inline(always)]
239 pub fn clock_recover_en(&self) -> ClockRecoverEnR {
240 ClockRecoverEnR::new(((self.bits >> 7) & 1) != 0)
241 }
242}
243#[cfg(feature = "debug")]
244impl core::fmt::Debug for R {
245 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
246 f.debug_struct("CLK_RECOVER_CTRL")
247 .field("trim_init_val_sel", &self.trim_init_val_sel())
248 .field("restart_ifrtrim_en", &self.restart_ifrtrim_en())
249 .field("reset_resume_rough_en", &self.reset_resume_rough_en())
250 .field("clock_recover_en", &self.clock_recover_en())
251 .finish()
252 }
253}
254impl W {
255 #[doc = "Bit 3 - Selects the source for the initial FIRC trim fine value used after a reset."]
256 #[inline(always)]
257 pub fn trim_init_val_sel(&mut self) -> TrimInitValSelW<'_, ClkRecoverCtrlSpec> {
258 TrimInitValSelW::new(self, 3)
259 }
260 #[doc = "Bit 5 - Restart from IFR Trim Value"]
261 #[inline(always)]
262 pub fn restart_ifrtrim_en(&mut self) -> RestartIfrtrimEnW<'_, ClkRecoverCtrlSpec> {
263 RestartIfrtrimEnW::new(self, 5)
264 }
265 #[doc = "Bit 6 - Reset or Resume to Rough Phase Enable"]
266 #[inline(always)]
267 pub fn reset_resume_rough_en(&mut self) -> ResetResumeRoughEnW<'_, ClkRecoverCtrlSpec> {
268 ResetResumeRoughEnW::new(self, 6)
269 }
270 #[doc = "Bit 7 - Crystal-Less USB Enable"]
271 #[inline(always)]
272 pub fn clock_recover_en(&mut self) -> ClockRecoverEnW<'_, ClkRecoverCtrlSpec> {
273 ClockRecoverEnW::new(self, 7)
274 }
275}
276#[doc = "USB Clock Recovery Control\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_recover_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_recover_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
277pub struct ClkRecoverCtrlSpec;
278impl crate::RegisterSpec for ClkRecoverCtrlSpec {
279 type Ux = u8;
280}
281#[doc = "`read()` method returns [`clk_recover_ctrl::R`](R) reader structure"]
282impl crate::Readable for ClkRecoverCtrlSpec {}
283#[doc = "`write(|w| ..)` method takes [`clk_recover_ctrl::W`](W) writer structure"]
284impl crate::Writable for ClkRecoverCtrlSpec {
285 type Safety = crate::Unsafe;
286}
287#[doc = "`reset()` method sets CLK_RECOVER_CTRL to value 0"]
288impl crate::Resettable for ClkRecoverCtrlSpec {}