mcxa_pac/syscon/
sram_xen_dp.rs

1#[doc = "Register `SRAM_XEN_DP` reader"]
2pub type R = crate::R<SramXenDpSpec>;
3#[doc = "Register `SRAM_XEN_DP` writer"]
4pub type W = crate::W<SramXenDpSpec>;
5#[doc = "Field `RAMX0_XEN` reader - Refer to SRAM_XEN for more details."]
6pub type Ramx0XenR = crate::BitReader;
7#[doc = "Field `RAMX0_XEN` writer - Refer to SRAM_XEN for more details."]
8pub type Ramx0XenW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RAMX1_XEN` reader - Refer to SRAM_XEN for more details."]
10pub type Ramx1XenR = crate::BitReader;
11#[doc = "Field `RAMX1_XEN` writer - Refer to SRAM_XEN for more details."]
12pub type Ramx1XenW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `RAMA0_XEN` reader - Refer to SRAM_XEN for more details."]
14pub type Rama0XenR = crate::BitReader;
15#[doc = "Field `RAMA0_XEN` writer - Refer to SRAM_XEN for more details."]
16pub type Rama0XenW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RAMA1_XEN` reader - Refer to SRAM_XEN for more details."]
18pub type Rama1XenR = crate::BitReader;
19#[doc = "Field `RAMA1_XEN` writer - Refer to SRAM_XEN for more details."]
20pub type Rama1XenW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `RAMB_XEN` reader - Refer to SRAM_XEN for more details."]
22pub type RambXenR = crate::BitReader;
23#[doc = "Field `RAMB_XEN` writer - Refer to SRAM_XEN for more details."]
24pub type RambXenW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `RAMC_XEN` reader - Refer to SRAM_XEN for more details."]
26pub type RamcXenR = crate::BitReader;
27#[doc = "Field `RAMC_XEN` writer - Refer to SRAM_XEN for more details."]
28pub type RamcXenW<'a, REG> = crate::BitWriter<'a, REG>;
29impl R {
30    #[doc = "Bit 0 - Refer to SRAM_XEN for more details."]
31    #[inline(always)]
32    pub fn ramx0_xen(&self) -> Ramx0XenR {
33        Ramx0XenR::new((self.bits & 1) != 0)
34    }
35    #[doc = "Bit 1 - Refer to SRAM_XEN for more details."]
36    #[inline(always)]
37    pub fn ramx1_xen(&self) -> Ramx1XenR {
38        Ramx1XenR::new(((self.bits >> 1) & 1) != 0)
39    }
40    #[doc = "Bit 2 - Refer to SRAM_XEN for more details."]
41    #[inline(always)]
42    pub fn rama0_xen(&self) -> Rama0XenR {
43        Rama0XenR::new(((self.bits >> 2) & 1) != 0)
44    }
45    #[doc = "Bit 3 - Refer to SRAM_XEN for more details."]
46    #[inline(always)]
47    pub fn rama1_xen(&self) -> Rama1XenR {
48        Rama1XenR::new(((self.bits >> 3) & 1) != 0)
49    }
50    #[doc = "Bit 4 - Refer to SRAM_XEN for more details."]
51    #[inline(always)]
52    pub fn ramb_xen(&self) -> RambXenR {
53        RambXenR::new(((self.bits >> 4) & 1) != 0)
54    }
55    #[doc = "Bit 5 - Refer to SRAM_XEN for more details."]
56    #[inline(always)]
57    pub fn ramc_xen(&self) -> RamcXenR {
58        RamcXenR::new(((self.bits >> 5) & 1) != 0)
59    }
60}
61#[cfg(feature = "debug")]
62impl core::fmt::Debug for R {
63    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
64        f.debug_struct("SRAM_XEN_DP")
65            .field("ramx0_xen", &self.ramx0_xen())
66            .field("ramx1_xen", &self.ramx1_xen())
67            .field("rama0_xen", &self.rama0_xen())
68            .field("rama1_xen", &self.rama1_xen())
69            .field("ramb_xen", &self.ramb_xen())
70            .field("ramc_xen", &self.ramc_xen())
71            .finish()
72    }
73}
74impl W {
75    #[doc = "Bit 0 - Refer to SRAM_XEN for more details."]
76    #[inline(always)]
77    pub fn ramx0_xen(&mut self) -> Ramx0XenW<'_, SramXenDpSpec> {
78        Ramx0XenW::new(self, 0)
79    }
80    #[doc = "Bit 1 - Refer to SRAM_XEN for more details."]
81    #[inline(always)]
82    pub fn ramx1_xen(&mut self) -> Ramx1XenW<'_, SramXenDpSpec> {
83        Ramx1XenW::new(self, 1)
84    }
85    #[doc = "Bit 2 - Refer to SRAM_XEN for more details."]
86    #[inline(always)]
87    pub fn rama0_xen(&mut self) -> Rama0XenW<'_, SramXenDpSpec> {
88        Rama0XenW::new(self, 2)
89    }
90    #[doc = "Bit 3 - Refer to SRAM_XEN for more details."]
91    #[inline(always)]
92    pub fn rama1_xen(&mut self) -> Rama1XenW<'_, SramXenDpSpec> {
93        Rama1XenW::new(self, 3)
94    }
95    #[doc = "Bit 4 - Refer to SRAM_XEN for more details."]
96    #[inline(always)]
97    pub fn ramb_xen(&mut self) -> RambXenW<'_, SramXenDpSpec> {
98        RambXenW::new(self, 4)
99    }
100    #[doc = "Bit 5 - Refer to SRAM_XEN for more details."]
101    #[inline(always)]
102    pub fn ramc_xen(&mut self) -> RamcXenW<'_, SramXenDpSpec> {
103        RamcXenW::new(self, 5)
104    }
105}
106#[doc = "RAM XEN Control (Duplicate)\n\nYou can [`read`](crate::Reg::read) this register and get [`sram_xen_dp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_xen_dp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
107pub struct SramXenDpSpec;
108impl crate::RegisterSpec for SramXenDpSpec {
109    type Ux = u32;
110}
111#[doc = "`read()` method returns [`sram_xen_dp::R`](R) reader structure"]
112impl crate::Readable for SramXenDpSpec {}
113#[doc = "`write(|w| ..)` method takes [`sram_xen_dp::W`](W) writer structure"]
114impl crate::Writable for SramXenDpSpec {
115    type Safety = crate::Unsafe;
116}
117#[doc = "`reset()` method sets SRAM_XEN_DP to value 0"]
118impl crate::Resettable for SramXenDpSpec {}
mcxa_pac/syscon/sram_xen_dp.rs

mcxa_pac/syscon/
sram_xen_dp.rs
