mcxa_pac/syscon/
clkunlock.rs

1#[doc = "Register `CLKUNLOCK` reader"]
2pub type R = crate::R<ClkunlockSpec>;
3#[doc = "Register `CLKUNLOCK` writer"]
4pub type W = crate::W<ClkunlockSpec>;
5#[doc = "Controls clock configuration registers access (for example, SLOWCLKDIV, BUSCLKDIV, AHBCLKDIV, FROHFDIV, FROLFDIV, PLLxCLKDIV, MRCC_xxx_CLKDIV, MRCC_xxx_CLKSEL, MRCC_GLB_xxx)\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Unlock {
9    #[doc = "0: Updates are allowed to all clock configuration registers"]
10    Enable = 0,
11    #[doc = "1: Freezes all clock configuration registers update."]
12    Freeze = 1,
13}
14impl From<Unlock> for bool {
15    #[inline(always)]
16    fn from(variant: Unlock) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `UNLOCK` reader - Controls clock configuration registers access (for example, SLOWCLKDIV, BUSCLKDIV, AHBCLKDIV, FROHFDIV, FROLFDIV, PLLxCLKDIV, MRCC_xxx_CLKDIV, MRCC_xxx_CLKSEL, MRCC_GLB_xxx)"]
21pub type UnlockR = crate::BitReader<Unlock>;
22impl UnlockR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Unlock {
26        match self.bits {
27            false => Unlock::Enable,
28            true => Unlock::Freeze,
29        }
30    }
31    #[doc = "Updates are allowed to all clock configuration registers"]
32    #[inline(always)]
33    pub fn is_enable(&self) -> bool {
34        *self == Unlock::Enable
35    }
36    #[doc = "Freezes all clock configuration registers update."]
37    #[inline(always)]
38    pub fn is_freeze(&self) -> bool {
39        *self == Unlock::Freeze
40    }
41}
42#[doc = "Field `UNLOCK` writer - Controls clock configuration registers access (for example, SLOWCLKDIV, BUSCLKDIV, AHBCLKDIV, FROHFDIV, FROLFDIV, PLLxCLKDIV, MRCC_xxx_CLKDIV, MRCC_xxx_CLKSEL, MRCC_GLB_xxx)"]
43pub type UnlockW<'a, REG> = crate::BitWriter<'a, REG, Unlock>;
44impl<'a, REG> UnlockW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Updates are allowed to all clock configuration registers"]
49    #[inline(always)]
50    pub fn enable(self) -> &'a mut crate::W<REG> {
51        self.variant(Unlock::Enable)
52    }
53    #[doc = "Freezes all clock configuration registers update."]
54    #[inline(always)]
55    pub fn freeze(self) -> &'a mut crate::W<REG> {
56        self.variant(Unlock::Freeze)
57    }
58}
59impl R {
60    #[doc = "Bit 0 - Controls clock configuration registers access (for example, SLOWCLKDIV, BUSCLKDIV, AHBCLKDIV, FROHFDIV, FROLFDIV, PLLxCLKDIV, MRCC_xxx_CLKDIV, MRCC_xxx_CLKSEL, MRCC_GLB_xxx)"]
61    #[inline(always)]
62    pub fn unlock(&self) -> UnlockR {
63        UnlockR::new((self.bits & 1) != 0)
64    }
65}
66#[cfg(feature = "debug")]
67impl core::fmt::Debug for R {
68    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
69        f.debug_struct("CLKUNLOCK").field("unlock", &self.unlock()).finish()
70    }
71}
72impl W {
73    #[doc = "Bit 0 - Controls clock configuration registers access (for example, SLOWCLKDIV, BUSCLKDIV, AHBCLKDIV, FROHFDIV, FROLFDIV, PLLxCLKDIV, MRCC_xxx_CLKDIV, MRCC_xxx_CLKSEL, MRCC_GLB_xxx)"]
74    #[inline(always)]
75    pub fn unlock(&mut self) -> UnlockW<'_, ClkunlockSpec> {
76        UnlockW::new(self, 0)
77    }
78}
79#[doc = "Clock Configuration Unlock\n\nYou can [`read`](crate::Reg::read) this register and get [`clkunlock::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clkunlock::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct ClkunlockSpec;
81impl crate::RegisterSpec for ClkunlockSpec {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`clkunlock::R`](R) reader structure"]
85impl crate::Readable for ClkunlockSpec {}
86#[doc = "`write(|w| ..)` method takes [`clkunlock::W`](W) writer structure"]
87impl crate::Writable for ClkunlockSpec {
88    type Safety = crate::Unsafe;
89}
90#[doc = "`reset()` method sets CLKUNLOCK to value 0"]
91impl crate::Resettable for ClkunlockSpec {}
mcxa_pac/syscon/clkunlock.rs

mcxa_pac/syscon/
clkunlock.rs
