mcxa_pac/spc0/
lp_cfg1.rs

1#[doc = "Register `LP_CFG1` reader"]
2pub type R = crate::R<LpCfg1Spec>;
3#[doc = "Register `LP_CFG1` writer"]
4pub type W = crate::W<LpCfg1Spec>;
5#[doc = "Field `SOC_CNTRL` reader - Low-Power Configuration Chip Control"]
6pub type SocCntrlR = crate::FieldReader<u32>;
7#[doc = "Field `SOC_CNTRL` writer - Low-Power Configuration Chip Control"]
8pub type SocCntrlW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    #[doc = "Bits 0:31 - Low-Power Configuration Chip Control"]
11    #[inline(always)]
12    pub fn soc_cntrl(&self) -> SocCntrlR {
13        SocCntrlR::new(self.bits)
14    }
15}
16#[cfg(feature = "debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("LP_CFG1").field("soc_cntrl", &self.soc_cntrl()).finish()
20    }
21}
22impl W {
23    #[doc = "Bits 0:31 - Low-Power Configuration Chip Control"]
24    #[inline(always)]
25    pub fn soc_cntrl(&mut self) -> SocCntrlW<'_, LpCfg1Spec> {
26        SocCntrlW::new(self, 0)
27    }
28}
29#[doc = "Low Power Mode Configuration 1\n\nYou can [`read`](crate::Reg::read) this register and get [`lp_cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lp_cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
30pub struct LpCfg1Spec;
31impl crate::RegisterSpec for LpCfg1Spec {
32    type Ux = u32;
33}
34#[doc = "`read()` method returns [`lp_cfg1::R`](R) reader structure"]
35impl crate::Readable for LpCfg1Spec {}
36#[doc = "`write(|w| ..)` method takes [`lp_cfg1::W`](W) writer structure"]
37impl crate::Writable for LpCfg1Spec {
38    type Safety = crate::Unsafe;
39}
40#[doc = "`reset()` method sets LP_CFG1 to value 0x02"]
41impl crate::Resettable for LpCfg1Spec {
42    const RESET_VALUE: u32 = 0x02;
43}
mcxa_pac/spc0/lp_cfg1.rs

mcxa_pac/spc0/
lp_cfg1.rs
