mcxa_pac/scg0/
spllpdiv.rs

1#[doc = "Register `SPLLPDIV` reader"]
2pub type R = crate::R<SpllpdivSpec>;
3#[doc = "Register `SPLLPDIV` writer"]
4pub type W = crate::W<SpllpdivSpec>;
5#[doc = "Field `PDIV` reader - Post-divider divider ratio (P-divider)"]
6pub type PdivR = crate::FieldReader;
7#[doc = "Field `PDIV` writer - Post-divider divider ratio (P-divider)"]
8pub type PdivW<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9#[doc = "Post-divider ratio change request\n\nValue on reset: 0"]
10#[cfg_attr(feature = "defmt", derive(defmt::Format))]
11#[derive(Clone, Copy, Debug, PartialEq, Eq)]
12pub enum Preq {
13    #[doc = "0: Post-divider ratio change is not requested"]
14    Disabled = 0,
15    #[doc = "1: Post-divider ratio change is requested"]
16    Enabled = 1,
17}
18impl From<Preq> for bool {
19    #[inline(always)]
20    fn from(variant: Preq) -> Self {
21        variant as u8 != 0
22    }
23}
24#[doc = "Field `PREQ` reader - Post-divider ratio change request"]
25pub type PreqR = crate::BitReader<Preq>;
26impl PreqR {
27    #[doc = "Get enumerated values variant"]
28    #[inline(always)]
29    pub const fn variant(&self) -> Preq {
30        match self.bits {
31            false => Preq::Disabled,
32            true => Preq::Enabled,
33        }
34    }
35    #[doc = "Post-divider ratio change is not requested"]
36    #[inline(always)]
37    pub fn is_disabled(&self) -> bool {
38        *self == Preq::Disabled
39    }
40    #[doc = "Post-divider ratio change is requested"]
41    #[inline(always)]
42    pub fn is_enabled(&self) -> bool {
43        *self == Preq::Enabled
44    }
45}
46#[doc = "Field `PREQ` writer - Post-divider ratio change request"]
47pub type PreqW<'a, REG> = crate::BitWriter<'a, REG, Preq>;
48impl<'a, REG> PreqW<'a, REG>
49where
50    REG: crate::Writable + crate::RegisterSpec,
51{
52    #[doc = "Post-divider ratio change is not requested"]
53    #[inline(always)]
54    pub fn disabled(self) -> &'a mut crate::W<REG> {
55        self.variant(Preq::Disabled)
56    }
57    #[doc = "Post-divider ratio change is requested"]
58    #[inline(always)]
59    pub fn enabled(self) -> &'a mut crate::W<REG> {
60        self.variant(Preq::Enabled)
61    }
62}
63impl R {
64    #[doc = "Bits 0:4 - Post-divider divider ratio (P-divider)"]
65    #[inline(always)]
66    pub fn pdiv(&self) -> PdivR {
67        PdivR::new((self.bits & 0x1f) as u8)
68    }
69    #[doc = "Bit 31 - Post-divider ratio change request"]
70    #[inline(always)]
71    pub fn preq(&self) -> PreqR {
72        PreqR::new(((self.bits >> 31) & 1) != 0)
73    }
74}
75#[cfg(feature = "debug")]
76impl core::fmt::Debug for R {
77    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
78        f.debug_struct("SPLLPDIV")
79            .field("pdiv", &self.pdiv())
80            .field("preq", &self.preq())
81            .finish()
82    }
83}
84impl W {
85    #[doc = "Bits 0:4 - Post-divider divider ratio (P-divider)"]
86    #[inline(always)]
87    pub fn pdiv(&mut self) -> PdivW<'_, SpllpdivSpec> {
88        PdivW::new(self, 0)
89    }
90    #[doc = "Bit 31 - Post-divider ratio change request"]
91    #[inline(always)]
92    pub fn preq(&mut self) -> PreqW<'_, SpllpdivSpec> {
93        PreqW::new(self, 31)
94    }
95}
96#[doc = "SPLL P Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`spllpdiv::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spllpdiv::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
97pub struct SpllpdivSpec;
98impl crate::RegisterSpec for SpllpdivSpec {
99    type Ux = u32;
100}
101#[doc = "`read()` method returns [`spllpdiv::R`](R) reader structure"]
102impl crate::Readable for SpllpdivSpec {}
103#[doc = "`write(|w| ..)` method takes [`spllpdiv::W`](W) writer structure"]
104impl crate::Writable for SpllpdivSpec {
105    type Safety = crate::Unsafe;
106}
107#[doc = "`reset()` method sets SPLLPDIV to value 0x01"]
108impl crate::Resettable for SpllpdivSpec {
109    const RESET_VALUE: u32 = 0x01;
110}
mcxa_pac/scg0/spllpdiv.rs

mcxa_pac/scg0/
spllpdiv.rs
