mcxa_pac/scg0/
sosccsr.rs

1#[doc = "Register `SOSCCSR` reader"]
2pub type R = crate::R<SosccsrSpec>;
3#[doc = "Register `SOSCCSR` writer"]
4pub type W = crate::W<SosccsrSpec>;
5#[doc = "SOSC Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Soscen {
9    #[doc = "0: SOSC is disabled"]
10    Disabled = 0,
11    #[doc = "1: SOSC is enabled"]
12    Enabled = 1,
13}
14impl From<Soscen> for bool {
15    #[inline(always)]
16    fn from(variant: Soscen) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `SOSCEN` reader - SOSC Enable"]
21pub type SoscenR = crate::BitReader<Soscen>;
22impl SoscenR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Soscen {
26        match self.bits {
27            false => Soscen::Disabled,
28            true => Soscen::Enabled,
29        }
30    }
31    #[doc = "SOSC is disabled"]
32    #[inline(always)]
33    pub fn is_disabled(&self) -> bool {
34        *self == Soscen::Disabled
35    }
36    #[doc = "SOSC is enabled"]
37    #[inline(always)]
38    pub fn is_enabled(&self) -> bool {
39        *self == Soscen::Enabled
40    }
41}
42#[doc = "Field `SOSCEN` writer - SOSC Enable"]
43pub type SoscenW<'a, REG> = crate::BitWriter<'a, REG, Soscen>;
44impl<'a, REG> SoscenW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "SOSC is disabled"]
49    #[inline(always)]
50    pub fn disabled(self) -> &'a mut crate::W<REG> {
51        self.variant(Soscen::Disabled)
52    }
53    #[doc = "SOSC is enabled"]
54    #[inline(always)]
55    pub fn enabled(self) -> &'a mut crate::W<REG> {
56        self.variant(Soscen::Enabled)
57    }
58}
59#[doc = "SOSC Stop Enable\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Soscsten {
63    #[doc = "0: SOSC is disabled in Deep Sleep mode"]
64    Disabled = 0,
65    #[doc = "1: SOSC is enabled in Deep Sleep mode only if SOSCEN is set"]
66    Enabled = 1,
67}
68impl From<Soscsten> for bool {
69    #[inline(always)]
70    fn from(variant: Soscsten) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `SOSCSTEN` reader - SOSC Stop Enable"]
75pub type SoscstenR = crate::BitReader<Soscsten>;
76impl SoscstenR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Soscsten {
80        match self.bits {
81            false => Soscsten::Disabled,
82            true => Soscsten::Enabled,
83        }
84    }
85    #[doc = "SOSC is disabled in Deep Sleep mode"]
86    #[inline(always)]
87    pub fn is_disabled(&self) -> bool {
88        *self == Soscsten::Disabled
89    }
90    #[doc = "SOSC is enabled in Deep Sleep mode only if SOSCEN is set"]
91    #[inline(always)]
92    pub fn is_enabled(&self) -> bool {
93        *self == Soscsten::Enabled
94    }
95}
96#[doc = "Field `SOSCSTEN` writer - SOSC Stop Enable"]
97pub type SoscstenW<'a, REG> = crate::BitWriter<'a, REG, Soscsten>;
98impl<'a, REG> SoscstenW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "SOSC is disabled in Deep Sleep mode"]
103    #[inline(always)]
104    pub fn disabled(self) -> &'a mut crate::W<REG> {
105        self.variant(Soscsten::Disabled)
106    }
107    #[doc = "SOSC is enabled in Deep Sleep mode only if SOSCEN is set"]
108    #[inline(always)]
109    pub fn enabled(self) -> &'a mut crate::W<REG> {
110        self.variant(Soscsten::Enabled)
111    }
112}
113#[doc = "SOSC Clock Monitor Enable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Sosccm {
117    #[doc = "0: SOSC Clock Monitor is disabled"]
118    Disabled = 0,
119    #[doc = "1: SOSC Clock Monitor is enabled"]
120    Enabled = 1,
121}
122impl From<Sosccm> for bool {
123    #[inline(always)]
124    fn from(variant: Sosccm) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `SOSCCM` reader - SOSC Clock Monitor Enable"]
129pub type SosccmR = crate::BitReader<Sosccm>;
130impl SosccmR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Sosccm {
134        match self.bits {
135            false => Sosccm::Disabled,
136            true => Sosccm::Enabled,
137        }
138    }
139    #[doc = "SOSC Clock Monitor is disabled"]
140    #[inline(always)]
141    pub fn is_disabled(&self) -> bool {
142        *self == Sosccm::Disabled
143    }
144    #[doc = "SOSC Clock Monitor is enabled"]
145    #[inline(always)]
146    pub fn is_enabled(&self) -> bool {
147        *self == Sosccm::Enabled
148    }
149}
150#[doc = "Field `SOSCCM` writer - SOSC Clock Monitor Enable"]
151pub type SosccmW<'a, REG> = crate::BitWriter<'a, REG, Sosccm>;
152impl<'a, REG> SosccmW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "SOSC Clock Monitor is disabled"]
157    #[inline(always)]
158    pub fn disabled(self) -> &'a mut crate::W<REG> {
159        self.variant(Sosccm::Disabled)
160    }
161    #[doc = "SOSC Clock Monitor is enabled"]
162    #[inline(always)]
163    pub fn enabled(self) -> &'a mut crate::W<REG> {
164        self.variant(Sosccm::Enabled)
165    }
166}
167#[doc = "SOSC Clock Monitor Reset Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Sosccmre {
171    #[doc = "0: Clock monitor generates an interrupt when an error is detected"]
172    GenerateInterrupt = 0,
173    #[doc = "1: Clock monitor generates a reset when an error is detected"]
174    GenerateReset = 1,
175}
176impl From<Sosccmre> for bool {
177    #[inline(always)]
178    fn from(variant: Sosccmre) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `SOSCCMRE` reader - SOSC Clock Monitor Reset Enable"]
183pub type SosccmreR = crate::BitReader<Sosccmre>;
184impl SosccmreR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Sosccmre {
188        match self.bits {
189            false => Sosccmre::GenerateInterrupt,
190            true => Sosccmre::GenerateReset,
191        }
192    }
193    #[doc = "Clock monitor generates an interrupt when an error is detected"]
194    #[inline(always)]
195    pub fn is_generate_interrupt(&self) -> bool {
196        *self == Sosccmre::GenerateInterrupt
197    }
198    #[doc = "Clock monitor generates a reset when an error is detected"]
199    #[inline(always)]
200    pub fn is_generate_reset(&self) -> bool {
201        *self == Sosccmre::GenerateReset
202    }
203}
204#[doc = "Field `SOSCCMRE` writer - SOSC Clock Monitor Reset Enable"]
205pub type SosccmreW<'a, REG> = crate::BitWriter<'a, REG, Sosccmre>;
206impl<'a, REG> SosccmreW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Clock monitor generates an interrupt when an error is detected"]
211    #[inline(always)]
212    pub fn generate_interrupt(self) -> &'a mut crate::W<REG> {
213        self.variant(Sosccmre::GenerateInterrupt)
214    }
215    #[doc = "Clock monitor generates a reset when an error is detected"]
216    #[inline(always)]
217    pub fn generate_reset(self) -> &'a mut crate::W<REG> {
218        self.variant(Sosccmre::GenerateReset)
219    }
220}
221#[doc = "Lock Register\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Lk {
225    #[doc = "0: This Control Status Register can be written"]
226    WriteEnabled = 0,
227    #[doc = "1: This Control Status Register cannot be written"]
228    WriteDisabled = 1,
229}
230impl From<Lk> for bool {
231    #[inline(always)]
232    fn from(variant: Lk) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `LK` reader - Lock Register"]
237pub type LkR = crate::BitReader<Lk>;
238impl LkR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Lk {
242        match self.bits {
243            false => Lk::WriteEnabled,
244            true => Lk::WriteDisabled,
245        }
246    }
247    #[doc = "This Control Status Register can be written"]
248    #[inline(always)]
249    pub fn is_write_enabled(&self) -> bool {
250        *self == Lk::WriteEnabled
251    }
252    #[doc = "This Control Status Register cannot be written"]
253    #[inline(always)]
254    pub fn is_write_disabled(&self) -> bool {
255        *self == Lk::WriteDisabled
256    }
257}
258#[doc = "Field `LK` writer - Lock Register"]
259pub type LkW<'a, REG> = crate::BitWriter<'a, REG, Lk>;
260impl<'a, REG> LkW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "This Control Status Register can be written"]
265    #[inline(always)]
266    pub fn write_enabled(self) -> &'a mut crate::W<REG> {
267        self.variant(Lk::WriteEnabled)
268    }
269    #[doc = "This Control Status Register cannot be written"]
270    #[inline(always)]
271    pub fn write_disabled(self) -> &'a mut crate::W<REG> {
272        self.variant(Lk::WriteDisabled)
273    }
274}
275#[doc = "SOSC Valid\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Soscvld {
279    #[doc = "0: SOSC is not enabled or clock is not valid"]
280    Disabled = 0,
281    #[doc = "1: SOSC is enabled and output clock is valid"]
282    Enabled = 1,
283}
284impl From<Soscvld> for bool {
285    #[inline(always)]
286    fn from(variant: Soscvld) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `SOSCVLD` reader - SOSC Valid"]
291pub type SoscvldR = crate::BitReader<Soscvld>;
292impl SoscvldR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Soscvld {
296        match self.bits {
297            false => Soscvld::Disabled,
298            true => Soscvld::Enabled,
299        }
300    }
301    #[doc = "SOSC is not enabled or clock is not valid"]
302    #[inline(always)]
303    pub fn is_disabled(&self) -> bool {
304        *self == Soscvld::Disabled
305    }
306    #[doc = "SOSC is enabled and output clock is valid"]
307    #[inline(always)]
308    pub fn is_enabled(&self) -> bool {
309        *self == Soscvld::Enabled
310    }
311}
312#[doc = "SOSC Selected\n\nValue on reset: 0"]
313#[cfg_attr(feature = "defmt", derive(defmt::Format))]
314#[derive(Clone, Copy, Debug, PartialEq, Eq)]
315pub enum Soscsel {
316    #[doc = "0: SOSC is not the system clock source"]
317    NotSosc = 0,
318    #[doc = "1: SOSC is the system clock source"]
319    Sosc = 1,
320}
321impl From<Soscsel> for bool {
322    #[inline(always)]
323    fn from(variant: Soscsel) -> Self {
324        variant as u8 != 0
325    }
326}
327#[doc = "Field `SOSCSEL` reader - SOSC Selected"]
328pub type SoscselR = crate::BitReader<Soscsel>;
329impl SoscselR {
330    #[doc = "Get enumerated values variant"]
331    #[inline(always)]
332    pub const fn variant(&self) -> Soscsel {
333        match self.bits {
334            false => Soscsel::NotSosc,
335            true => Soscsel::Sosc,
336        }
337    }
338    #[doc = "SOSC is not the system clock source"]
339    #[inline(always)]
340    pub fn is_not_sosc(&self) -> bool {
341        *self == Soscsel::NotSosc
342    }
343    #[doc = "SOSC is the system clock source"]
344    #[inline(always)]
345    pub fn is_sosc(&self) -> bool {
346        *self == Soscsel::Sosc
347    }
348}
349#[doc = "SOSC Clock Error\n\nValue on reset: 0"]
350#[cfg_attr(feature = "defmt", derive(defmt::Format))]
351#[derive(Clone, Copy, Debug, PartialEq, Eq)]
352pub enum Soscerr {
353    #[doc = "0: SOSC Clock Monitor is disabled or has not detected an error"]
354    DisabledOrNoError = 0,
355    #[doc = "1: SOSC Clock Monitor is enabled and detected an error"]
356    EnabledAndError = 1,
357}
358impl From<Soscerr> for bool {
359    #[inline(always)]
360    fn from(variant: Soscerr) -> Self {
361        variant as u8 != 0
362    }
363}
364#[doc = "Field `SOSCERR` reader - SOSC Clock Error"]
365pub type SoscerrR = crate::BitReader<Soscerr>;
366impl SoscerrR {
367    #[doc = "Get enumerated values variant"]
368    #[inline(always)]
369    pub const fn variant(&self) -> Soscerr {
370        match self.bits {
371            false => Soscerr::DisabledOrNoError,
372            true => Soscerr::EnabledAndError,
373        }
374    }
375    #[doc = "SOSC Clock Monitor is disabled or has not detected an error"]
376    #[inline(always)]
377    pub fn is_disabled_or_no_error(&self) -> bool {
378        *self == Soscerr::DisabledOrNoError
379    }
380    #[doc = "SOSC Clock Monitor is enabled and detected an error"]
381    #[inline(always)]
382    pub fn is_enabled_and_error(&self) -> bool {
383        *self == Soscerr::EnabledAndError
384    }
385}
386#[doc = "Field `SOSCERR` writer - SOSC Clock Error"]
387pub type SoscerrW<'a, REG> = crate::BitWriter1C<'a, REG, Soscerr>;
388impl<'a, REG> SoscerrW<'a, REG>
389where
390    REG: crate::Writable + crate::RegisterSpec,
391{
392    #[doc = "SOSC Clock Monitor is disabled or has not detected an error"]
393    #[inline(always)]
394    pub fn disabled_or_no_error(self) -> &'a mut crate::W<REG> {
395        self.variant(Soscerr::DisabledOrNoError)
396    }
397    #[doc = "SOSC Clock Monitor is enabled and detected an error"]
398    #[inline(always)]
399    pub fn enabled_and_error(self) -> &'a mut crate::W<REG> {
400        self.variant(Soscerr::EnabledAndError)
401    }
402}
403#[doc = "SOSC Valid Interrupt Enable\n\nValue on reset: 0"]
404#[cfg_attr(feature = "defmt", derive(defmt::Format))]
405#[derive(Clone, Copy, Debug, PartialEq, Eq)]
406pub enum SoscvldIe {
407    #[doc = "0: SOSCVLD interrupt is not enabled"]
408    NotSosc = 0,
409    #[doc = "1: SOSCVLD interrupt is enabled"]
410    Sosc = 1,
411}
412impl From<SoscvldIe> for bool {
413    #[inline(always)]
414    fn from(variant: SoscvldIe) -> Self {
415        variant as u8 != 0
416    }
417}
418#[doc = "Field `SOSCVLD_IE` reader - SOSC Valid Interrupt Enable"]
419pub type SoscvldIeR = crate::BitReader<SoscvldIe>;
420impl SoscvldIeR {
421    #[doc = "Get enumerated values variant"]
422    #[inline(always)]
423    pub const fn variant(&self) -> SoscvldIe {
424        match self.bits {
425            false => SoscvldIe::NotSosc,
426            true => SoscvldIe::Sosc,
427        }
428    }
429    #[doc = "SOSCVLD interrupt is not enabled"]
430    #[inline(always)]
431    pub fn is_not_sosc(&self) -> bool {
432        *self == SoscvldIe::NotSosc
433    }
434    #[doc = "SOSCVLD interrupt is enabled"]
435    #[inline(always)]
436    pub fn is_sosc(&self) -> bool {
437        *self == SoscvldIe::Sosc
438    }
439}
440#[doc = "Field `SOSCVLD_IE` writer - SOSC Valid Interrupt Enable"]
441pub type SoscvldIeW<'a, REG> = crate::BitWriter<'a, REG, SoscvldIe>;
442impl<'a, REG> SoscvldIeW<'a, REG>
443where
444    REG: crate::Writable + crate::RegisterSpec,
445{
446    #[doc = "SOSCVLD interrupt is not enabled"]
447    #[inline(always)]
448    pub fn not_sosc(self) -> &'a mut crate::W<REG> {
449        self.variant(SoscvldIe::NotSosc)
450    }
451    #[doc = "SOSCVLD interrupt is enabled"]
452    #[inline(always)]
453    pub fn sosc(self) -> &'a mut crate::W<REG> {
454        self.variant(SoscvldIe::Sosc)
455    }
456}
457#[doc = "SOSC clock safety enable\n\nValue on reset: 0"]
458#[cfg_attr(feature = "defmt", derive(defmt::Format))]
459#[derive(Clone, Copy, Debug, PartialEq, Eq)]
460pub enum SoscSafeEn {
461    #[doc = "0: SOSC clock safety is disabled"]
462    Disable = 0,
463    #[doc = "1: SOSC clock safety is enabled"]
464    Enable = 1,
465}
466impl From<SoscSafeEn> for bool {
467    #[inline(always)]
468    fn from(variant: SoscSafeEn) -> Self {
469        variant as u8 != 0
470    }
471}
472#[doc = "Field `SOSC_SAFE_EN` reader - SOSC clock safety enable"]
473pub type SoscSafeEnR = crate::BitReader<SoscSafeEn>;
474impl SoscSafeEnR {
475    #[doc = "Get enumerated values variant"]
476    #[inline(always)]
477    pub const fn variant(&self) -> SoscSafeEn {
478        match self.bits {
479            false => SoscSafeEn::Disable,
480            true => SoscSafeEn::Enable,
481        }
482    }
483    #[doc = "SOSC clock safety is disabled"]
484    #[inline(always)]
485    pub fn is_disable(&self) -> bool {
486        *self == SoscSafeEn::Disable
487    }
488    #[doc = "SOSC clock safety is enabled"]
489    #[inline(always)]
490    pub fn is_enable(&self) -> bool {
491        *self == SoscSafeEn::Enable
492    }
493}
494#[doc = "Field `SOSC_SAFE_EN` writer - SOSC clock safety enable"]
495pub type SoscSafeEnW<'a, REG> = crate::BitWriter<'a, REG, SoscSafeEn>;
496impl<'a, REG> SoscSafeEnW<'a, REG>
497where
498    REG: crate::Writable + crate::RegisterSpec,
499{
500    #[doc = "SOSC clock safety is disabled"]
501    #[inline(always)]
502    pub fn disable(self) -> &'a mut crate::W<REG> {
503        self.variant(SoscSafeEn::Disable)
504    }
505    #[doc = "SOSC clock safety is enabled"]
506    #[inline(always)]
507    pub fn enable(self) -> &'a mut crate::W<REG> {
508        self.variant(SoscSafeEn::Enable)
509    }
510}
511impl R {
512    #[doc = "Bit 0 - SOSC Enable"]
513    #[inline(always)]
514    pub fn soscen(&self) -> SoscenR {
515        SoscenR::new((self.bits & 1) != 0)
516    }
517    #[doc = "Bit 1 - SOSC Stop Enable"]
518    #[inline(always)]
519    pub fn soscsten(&self) -> SoscstenR {
520        SoscstenR::new(((self.bits >> 1) & 1) != 0)
521    }
522    #[doc = "Bit 16 - SOSC Clock Monitor Enable"]
523    #[inline(always)]
524    pub fn sosccm(&self) -> SosccmR {
525        SosccmR::new(((self.bits >> 16) & 1) != 0)
526    }
527    #[doc = "Bit 17 - SOSC Clock Monitor Reset Enable"]
528    #[inline(always)]
529    pub fn sosccmre(&self) -> SosccmreR {
530        SosccmreR::new(((self.bits >> 17) & 1) != 0)
531    }
532    #[doc = "Bit 23 - Lock Register"]
533    #[inline(always)]
534    pub fn lk(&self) -> LkR {
535        LkR::new(((self.bits >> 23) & 1) != 0)
536    }
537    #[doc = "Bit 24 - SOSC Valid"]
538    #[inline(always)]
539    pub fn soscvld(&self) -> SoscvldR {
540        SoscvldR::new(((self.bits >> 24) & 1) != 0)
541    }
542    #[doc = "Bit 25 - SOSC Selected"]
543    #[inline(always)]
544    pub fn soscsel(&self) -> SoscselR {
545        SoscselR::new(((self.bits >> 25) & 1) != 0)
546    }
547    #[doc = "Bit 26 - SOSC Clock Error"]
548    #[inline(always)]
549    pub fn soscerr(&self) -> SoscerrR {
550        SoscerrR::new(((self.bits >> 26) & 1) != 0)
551    }
552    #[doc = "Bit 30 - SOSC Valid Interrupt Enable"]
553    #[inline(always)]
554    pub fn soscvld_ie(&self) -> SoscvldIeR {
555        SoscvldIeR::new(((self.bits >> 30) & 1) != 0)
556    }
557    #[doc = "Bit 31 - SOSC clock safety enable"]
558    #[inline(always)]
559    pub fn sosc_safe_en(&self) -> SoscSafeEnR {
560        SoscSafeEnR::new(((self.bits >> 31) & 1) != 0)
561    }
562}
563#[cfg(feature = "debug")]
564impl core::fmt::Debug for R {
565    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
566        f.debug_struct("SOSCCSR")
567            .field("soscen", &self.soscen())
568            .field("soscsten", &self.soscsten())
569            .field("sosccm", &self.sosccm())
570            .field("sosccmre", &self.sosccmre())
571            .field("lk", &self.lk())
572            .field("soscvld", &self.soscvld())
573            .field("soscsel", &self.soscsel())
574            .field("soscerr", &self.soscerr())
575            .field("soscvld_ie", &self.soscvld_ie())
576            .field("sosc_safe_en", &self.sosc_safe_en())
577            .finish()
578    }
579}
580impl W {
581    #[doc = "Bit 0 - SOSC Enable"]
582    #[inline(always)]
583    pub fn soscen(&mut self) -> SoscenW<'_, SosccsrSpec> {
584        SoscenW::new(self, 0)
585    }
586    #[doc = "Bit 1 - SOSC Stop Enable"]
587    #[inline(always)]
588    pub fn soscsten(&mut self) -> SoscstenW<'_, SosccsrSpec> {
589        SoscstenW::new(self, 1)
590    }
591    #[doc = "Bit 16 - SOSC Clock Monitor Enable"]
592    #[inline(always)]
593    pub fn sosccm(&mut self) -> SosccmW<'_, SosccsrSpec> {
594        SosccmW::new(self, 16)
595    }
596    #[doc = "Bit 17 - SOSC Clock Monitor Reset Enable"]
597    #[inline(always)]
598    pub fn sosccmre(&mut self) -> SosccmreW<'_, SosccsrSpec> {
599        SosccmreW::new(self, 17)
600    }
601    #[doc = "Bit 23 - Lock Register"]
602    #[inline(always)]
603    pub fn lk(&mut self) -> LkW<'_, SosccsrSpec> {
604        LkW::new(self, 23)
605    }
606    #[doc = "Bit 26 - SOSC Clock Error"]
607    #[inline(always)]
608    pub fn soscerr(&mut self) -> SoscerrW<'_, SosccsrSpec> {
609        SoscerrW::new(self, 26)
610    }
611    #[doc = "Bit 30 - SOSC Valid Interrupt Enable"]
612    #[inline(always)]
613    pub fn soscvld_ie(&mut self) -> SoscvldIeW<'_, SosccsrSpec> {
614        SoscvldIeW::new(self, 30)
615    }
616    #[doc = "Bit 31 - SOSC clock safety enable"]
617    #[inline(always)]
618    pub fn sosc_safe_en(&mut self) -> SoscSafeEnW<'_, SosccsrSpec> {
619        SoscSafeEnW::new(self, 31)
620    }
621}
622#[doc = "SOSC Control Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sosccsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sosccsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
623pub struct SosccsrSpec;
624impl crate::RegisterSpec for SosccsrSpec {
625    type Ux = u32;
626}
627#[doc = "`read()` method returns [`sosccsr::R`](R) reader structure"]
628impl crate::Readable for SosccsrSpec {}
629#[doc = "`write(|w| ..)` method takes [`sosccsr::W`](W) writer structure"]
630impl crate::Writable for SosccsrSpec {
631    type Safety = crate::Unsafe;
632    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x0400_0000;
633}
634#[doc = "`reset()` method sets SOSCCSR to value 0"]
635impl crate::Resettable for SosccsrSpec {}
mcxa_pac/scg0/sosccsr.rs

mcxa_pac/scg0/
sosccsr.rs
