mcxa_pac/scg0/
rccr.rs

1#[doc = "Register `RCCR` reader"]
2pub type R = crate::R<RccrSpec>;
3#[doc = "Register `RCCR` writer"]
4pub type W = crate::W<RccrSpec>;
5#[doc = "System Clock Source\n\nValue on reset: 3"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Scs {
10    #[doc = "1: SOSC"]
11    Sosc = 1,
12    #[doc = "2: SIRC"]
13    Sirc = 2,
14    #[doc = "3: FIRC"]
15    Firc = 3,
16    #[doc = "4: ROSC"]
17    Rosc = 4,
18    #[doc = "6: SPLL"]
19    Spll = 6,
20}
21impl From<Scs> for u8 {
22    #[inline(always)]
23    fn from(variant: Scs) -> Self {
24        variant as _
25    }
26}
27impl crate::FieldSpec for Scs {
28    type Ux = u8;
29}
30impl crate::IsEnum for Scs {}
31#[doc = "Field `SCS` reader - System Clock Source"]
32pub type ScsR = crate::FieldReader<Scs>;
33impl ScsR {
34    #[doc = "Get enumerated values variant"]
35    #[inline(always)]
36    pub const fn variant(&self) -> Option<Scs> {
37        match self.bits {
38            1 => Some(Scs::Sosc),
39            2 => Some(Scs::Sirc),
40            3 => Some(Scs::Firc),
41            4 => Some(Scs::Rosc),
42            6 => Some(Scs::Spll),
43            _ => None,
44        }
45    }
46    #[doc = "SOSC"]
47    #[inline(always)]
48    pub fn is_sosc(&self) -> bool {
49        *self == Scs::Sosc
50    }
51    #[doc = "SIRC"]
52    #[inline(always)]
53    pub fn is_sirc(&self) -> bool {
54        *self == Scs::Sirc
55    }
56    #[doc = "FIRC"]
57    #[inline(always)]
58    pub fn is_firc(&self) -> bool {
59        *self == Scs::Firc
60    }
61    #[doc = "ROSC"]
62    #[inline(always)]
63    pub fn is_rosc(&self) -> bool {
64        *self == Scs::Rosc
65    }
66    #[doc = "SPLL"]
67    #[inline(always)]
68    pub fn is_spll(&self) -> bool {
69        *self == Scs::Spll
70    }
71}
72#[doc = "Field `SCS` writer - System Clock Source"]
73pub type ScsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Scs>;
74impl<'a, REG> ScsW<'a, REG>
75where
76    REG: crate::Writable + crate::RegisterSpec,
77    REG::Ux: From<u8>,
78{
79    #[doc = "SOSC"]
80    #[inline(always)]
81    pub fn sosc(self) -> &'a mut crate::W<REG> {
82        self.variant(Scs::Sosc)
83    }
84    #[doc = "SIRC"]
85    #[inline(always)]
86    pub fn sirc(self) -> &'a mut crate::W<REG> {
87        self.variant(Scs::Sirc)
88    }
89    #[doc = "FIRC"]
90    #[inline(always)]
91    pub fn firc(self) -> &'a mut crate::W<REG> {
92        self.variant(Scs::Firc)
93    }
94    #[doc = "ROSC"]
95    #[inline(always)]
96    pub fn rosc(self) -> &'a mut crate::W<REG> {
97        self.variant(Scs::Rosc)
98    }
99    #[doc = "SPLL"]
100    #[inline(always)]
101    pub fn spll(self) -> &'a mut crate::W<REG> {
102        self.variant(Scs::Spll)
103    }
104}
105impl R {
106    #[doc = "Bits 24:26 - System Clock Source"]
107    #[inline(always)]
108    pub fn scs(&self) -> ScsR {
109        ScsR::new(((self.bits >> 24) & 7) as u8)
110    }
111}
112#[cfg(feature = "debug")]
113impl core::fmt::Debug for R {
114    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
115        f.debug_struct("RCCR").field("scs", &self.scs()).finish()
116    }
117}
118impl W {
119    #[doc = "Bits 24:26 - System Clock Source"]
120    #[inline(always)]
121    pub fn scs(&mut self) -> ScsW<'_, RccrSpec> {
122        ScsW::new(self, 24)
123    }
124}
125#[doc = "Run Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rccr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rccr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
126pub struct RccrSpec;
127impl crate::RegisterSpec for RccrSpec {
128    type Ux = u32;
129}
130#[doc = "`read()` method returns [`rccr::R`](R) reader structure"]
131impl crate::Readable for RccrSpec {}
132#[doc = "`write(|w| ..)` method takes [`rccr::W`](W) writer structure"]
133impl crate::Writable for RccrSpec {
134    type Safety = crate::Unsafe;
135}
136#[doc = "`reset()` method sets RCCR to value 0x0300_0000"]
137impl crate::Resettable for RccrSpec {
138    const RESET_VALUE: u32 = 0x0300_0000;
139}
mcxa_pac/scg0/rccr.rs

mcxa_pac/scg0/
rccr.rs
