mcxa_pac/scg0/
ldocsr.rs

1#[doc = "Register `LDOCSR` reader"]
2pub type R = crate::R<LdocsrSpec>;
3#[doc = "Register `LDOCSR` writer"]
4pub type W = crate::W<LdocsrSpec>;
5#[doc = "LDO Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Ldoen {
9    #[doc = "0: LDO is disabled"]
10    Disabled = 0,
11    #[doc = "1: LDO is enabled"]
12    Enabled = 1,
13}
14impl From<Ldoen> for bool {
15    #[inline(always)]
16    fn from(variant: Ldoen) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `LDOEN` reader - LDO Enable"]
21pub type LdoenR = crate::BitReader<Ldoen>;
22impl LdoenR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Ldoen {
26        match self.bits {
27            false => Ldoen::Disabled,
28            true => Ldoen::Enabled,
29        }
30    }
31    #[doc = "LDO is disabled"]
32    #[inline(always)]
33    pub fn is_disabled(&self) -> bool {
34        *self == Ldoen::Disabled
35    }
36    #[doc = "LDO is enabled"]
37    #[inline(always)]
38    pub fn is_enabled(&self) -> bool {
39        *self == Ldoen::Enabled
40    }
41}
42#[doc = "Field `LDOEN` writer - LDO Enable"]
43pub type LdoenW<'a, REG> = crate::BitWriter<'a, REG, Ldoen>;
44impl<'a, REG> LdoenW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "LDO is disabled"]
49    #[inline(always)]
50    pub fn disabled(self) -> &'a mut crate::W<REG> {
51        self.variant(Ldoen::Disabled)
52    }
53    #[doc = "LDO is enabled"]
54    #[inline(always)]
55    pub fn enabled(self) -> &'a mut crate::W<REG> {
56        self.variant(Ldoen::Enabled)
57    }
58}
59#[doc = "LDO output voltage select\n\nValue on reset: 4"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62#[repr(u8)]
63pub enum VoutSel {
64    #[doc = "0: VOUT = 1V"]
65    Vout1v1 = 0,
66    #[doc = "1: VOUT = 1V"]
67    Vout1v2 = 1,
68    #[doc = "2: VOUT = 1V"]
69    Vout1v3 = 2,
70    #[doc = "3: VOUT = 1.05V"]
71    Vout105v = 3,
72    #[doc = "4: VOUT = 1.1V"]
73    Vout11v = 4,
74    #[doc = "5: VOUT = 1.15V"]
75    Vout115v = 5,
76    #[doc = "6: VOUT = 1.2V"]
77    Vout12v = 6,
78    #[doc = "7: VOUT = 1.25V"]
79    Vout125v = 7,
80}
81impl From<VoutSel> for u8 {
82    #[inline(always)]
83    fn from(variant: VoutSel) -> Self {
84        variant as _
85    }
86}
87impl crate::FieldSpec for VoutSel {
88    type Ux = u8;
89}
90impl crate::IsEnum for VoutSel {}
91#[doc = "Field `VOUT_SEL` reader - LDO output voltage select"]
92pub type VoutSelR = crate::FieldReader<VoutSel>;
93impl VoutSelR {
94    #[doc = "Get enumerated values variant"]
95    #[inline(always)]
96    pub const fn variant(&self) -> VoutSel {
97        match self.bits {
98            0 => VoutSel::Vout1v1,
99            1 => VoutSel::Vout1v2,
100            2 => VoutSel::Vout1v3,
101            3 => VoutSel::Vout105v,
102            4 => VoutSel::Vout11v,
103            5 => VoutSel::Vout115v,
104            6 => VoutSel::Vout12v,
105            7 => VoutSel::Vout125v,
106            _ => unreachable!(),
107        }
108    }
109    #[doc = "VOUT = 1V"]
110    #[inline(always)]
111    pub fn is_vout_1v_1(&self) -> bool {
112        *self == VoutSel::Vout1v1
113    }
114    #[doc = "VOUT = 1V"]
115    #[inline(always)]
116    pub fn is_vout_1v_2(&self) -> bool {
117        *self == VoutSel::Vout1v2
118    }
119    #[doc = "VOUT = 1V"]
120    #[inline(always)]
121    pub fn is_vout_1v_3(&self) -> bool {
122        *self == VoutSel::Vout1v3
123    }
124    #[doc = "VOUT = 1.05V"]
125    #[inline(always)]
126    pub fn is_vout_105v(&self) -> bool {
127        *self == VoutSel::Vout105v
128    }
129    #[doc = "VOUT = 1.1V"]
130    #[inline(always)]
131    pub fn is_vout_11v(&self) -> bool {
132        *self == VoutSel::Vout11v
133    }
134    #[doc = "VOUT = 1.15V"]
135    #[inline(always)]
136    pub fn is_vout_115v(&self) -> bool {
137        *self == VoutSel::Vout115v
138    }
139    #[doc = "VOUT = 1.2V"]
140    #[inline(always)]
141    pub fn is_vout_12v(&self) -> bool {
142        *self == VoutSel::Vout12v
143    }
144    #[doc = "VOUT = 1.25V"]
145    #[inline(always)]
146    pub fn is_vout_125v(&self) -> bool {
147        *self == VoutSel::Vout125v
148    }
149}
150#[doc = "Field `VOUT_SEL` writer - LDO output voltage select"]
151pub type VoutSelW<'a, REG> = crate::FieldWriter<'a, REG, 3, VoutSel, crate::Safe>;
152impl<'a, REG> VoutSelW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155    REG::Ux: From<u8>,
156{
157    #[doc = "VOUT = 1V"]
158    #[inline(always)]
159    pub fn vout_1v_1(self) -> &'a mut crate::W<REG> {
160        self.variant(VoutSel::Vout1v1)
161    }
162    #[doc = "VOUT = 1V"]
163    #[inline(always)]
164    pub fn vout_1v_2(self) -> &'a mut crate::W<REG> {
165        self.variant(VoutSel::Vout1v2)
166    }
167    #[doc = "VOUT = 1V"]
168    #[inline(always)]
169    pub fn vout_1v_3(self) -> &'a mut crate::W<REG> {
170        self.variant(VoutSel::Vout1v3)
171    }
172    #[doc = "VOUT = 1.05V"]
173    #[inline(always)]
174    pub fn vout_105v(self) -> &'a mut crate::W<REG> {
175        self.variant(VoutSel::Vout105v)
176    }
177    #[doc = "VOUT = 1.1V"]
178    #[inline(always)]
179    pub fn vout_11v(self) -> &'a mut crate::W<REG> {
180        self.variant(VoutSel::Vout11v)
181    }
182    #[doc = "VOUT = 1.15V"]
183    #[inline(always)]
184    pub fn vout_115v(self) -> &'a mut crate::W<REG> {
185        self.variant(VoutSel::Vout115v)
186    }
187    #[doc = "VOUT = 1.2V"]
188    #[inline(always)]
189    pub fn vout_12v(self) -> &'a mut crate::W<REG> {
190        self.variant(VoutSel::Vout12v)
191    }
192    #[doc = "VOUT = 1.25V"]
193    #[inline(always)]
194    pub fn vout_125v(self) -> &'a mut crate::W<REG> {
195        self.variant(VoutSel::Vout125v)
196    }
197}
198#[doc = "LDO Bypass\n\nValue on reset: 0"]
199#[cfg_attr(feature = "defmt", derive(defmt::Format))]
200#[derive(Clone, Copy, Debug, PartialEq, Eq)]
201pub enum Ldobypass {
202    #[doc = "0: LDO is not bypassed"]
203    Disabled = 0,
204    #[doc = "1: LDO is bypassed"]
205    Enabled = 1,
206}
207impl From<Ldobypass> for bool {
208    #[inline(always)]
209    fn from(variant: Ldobypass) -> Self {
210        variant as u8 != 0
211    }
212}
213#[doc = "Field `LDOBYPASS` reader - LDO Bypass"]
214pub type LdobypassR = crate::BitReader<Ldobypass>;
215impl LdobypassR {
216    #[doc = "Get enumerated values variant"]
217    #[inline(always)]
218    pub const fn variant(&self) -> Ldobypass {
219        match self.bits {
220            false => Ldobypass::Disabled,
221            true => Ldobypass::Enabled,
222        }
223    }
224    #[doc = "LDO is not bypassed"]
225    #[inline(always)]
226    pub fn is_disabled(&self) -> bool {
227        *self == Ldobypass::Disabled
228    }
229    #[doc = "LDO is bypassed"]
230    #[inline(always)]
231    pub fn is_enabled(&self) -> bool {
232        *self == Ldobypass::Enabled
233    }
234}
235#[doc = "Field `LDOBYPASS` writer - LDO Bypass"]
236pub type LdobypassW<'a, REG> = crate::BitWriter<'a, REG, Ldobypass>;
237impl<'a, REG> LdobypassW<'a, REG>
238where
239    REG: crate::Writable + crate::RegisterSpec,
240{
241    #[doc = "LDO is not bypassed"]
242    #[inline(always)]
243    pub fn disabled(self) -> &'a mut crate::W<REG> {
244        self.variant(Ldobypass::Disabled)
245    }
246    #[doc = "LDO is bypassed"]
247    #[inline(always)]
248    pub fn enabled(self) -> &'a mut crate::W<REG> {
249        self.variant(Ldobypass::Enabled)
250    }
251}
252#[doc = "LDO VOUT OK Inform.\n\nValue on reset: 0"]
253#[cfg_attr(feature = "defmt", derive(defmt::Format))]
254#[derive(Clone, Copy, Debug, PartialEq, Eq)]
255pub enum VoutOk {
256    #[doc = "0: LDO output VOUT is not OK"]
257    Disabled = 0,
258    #[doc = "1: LDO output VOUT is OK"]
259    Enabled = 1,
260}
261impl From<VoutOk> for bool {
262    #[inline(always)]
263    fn from(variant: VoutOk) -> Self {
264        variant as u8 != 0
265    }
266}
267#[doc = "Field `VOUT_OK` reader - LDO VOUT OK Inform."]
268pub type VoutOkR = crate::BitReader<VoutOk>;
269impl VoutOkR {
270    #[doc = "Get enumerated values variant"]
271    #[inline(always)]
272    pub const fn variant(&self) -> VoutOk {
273        match self.bits {
274            false => VoutOk::Disabled,
275            true => VoutOk::Enabled,
276        }
277    }
278    #[doc = "LDO output VOUT is not OK"]
279    #[inline(always)]
280    pub fn is_disabled(&self) -> bool {
281        *self == VoutOk::Disabled
282    }
283    #[doc = "LDO output VOUT is OK"]
284    #[inline(always)]
285    pub fn is_enabled(&self) -> bool {
286        *self == VoutOk::Enabled
287    }
288}
289impl R {
290    #[doc = "Bit 0 - LDO Enable"]
291    #[inline(always)]
292    pub fn ldoen(&self) -> LdoenR {
293        LdoenR::new((self.bits & 1) != 0)
294    }
295    #[doc = "Bits 1:3 - LDO output voltage select"]
296    #[inline(always)]
297    pub fn vout_sel(&self) -> VoutSelR {
298        VoutSelR::new(((self.bits >> 1) & 7) as u8)
299    }
300    #[doc = "Bit 4 - LDO Bypass"]
301    #[inline(always)]
302    pub fn ldobypass(&self) -> LdobypassR {
303        LdobypassR::new(((self.bits >> 4) & 1) != 0)
304    }
305    #[doc = "Bit 31 - LDO VOUT OK Inform."]
306    #[inline(always)]
307    pub fn vout_ok(&self) -> VoutOkR {
308        VoutOkR::new(((self.bits >> 31) & 1) != 0)
309    }
310}
311#[cfg(feature = "debug")]
312impl core::fmt::Debug for R {
313    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
314        f.debug_struct("LDOCSR")
315            .field("ldoen", &self.ldoen())
316            .field("vout_sel", &self.vout_sel())
317            .field("ldobypass", &self.ldobypass())
318            .field("vout_ok", &self.vout_ok())
319            .finish()
320    }
321}
322impl W {
323    #[doc = "Bit 0 - LDO Enable"]
324    #[inline(always)]
325    pub fn ldoen(&mut self) -> LdoenW<'_, LdocsrSpec> {
326        LdoenW::new(self, 0)
327    }
328    #[doc = "Bits 1:3 - LDO output voltage select"]
329    #[inline(always)]
330    pub fn vout_sel(&mut self) -> VoutSelW<'_, LdocsrSpec> {
331        VoutSelW::new(self, 1)
332    }
333    #[doc = "Bit 4 - LDO Bypass"]
334    #[inline(always)]
335    pub fn ldobypass(&mut self) -> LdobypassW<'_, LdocsrSpec> {
336        LdobypassW::new(self, 4)
337    }
338}
339#[doc = "LDO Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ldocsr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ldocsr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
340pub struct LdocsrSpec;
341impl crate::RegisterSpec for LdocsrSpec {
342    type Ux = u32;
343}
344#[doc = "`read()` method returns [`ldocsr::R`](R) reader structure"]
345impl crate::Readable for LdocsrSpec {}
346#[doc = "`write(|w| ..)` method takes [`ldocsr::W`](W) writer structure"]
347impl crate::Writable for LdocsrSpec {
348    type Safety = crate::Unsafe;
349}
350#[doc = "`reset()` method sets LDOCSR to value 0x08"]
351impl crate::Resettable for LdocsrSpec {
352    const RESET_VALUE: u32 = 0x08;
353}
mcxa_pac/scg0/ldocsr.rs

mcxa_pac/scg0/
ldocsr.rs
