mcxa_pac/rtc0/
ier.rs

1#[doc = "Register `IER` reader"]
2pub type R = crate::R<IerSpec>;
3#[doc = "Register `IER` writer"]
4pub type W = crate::W<IerSpec>;
5#[doc = "Time Invalid Interrupt Enable\n\nValue on reset: 1"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Tiie {
9    #[doc = "0: No interrupt is generated."]
10    Tiie0 = 0,
11    #[doc = "1: An interrupt is generated."]
12    Tiie1 = 1,
13}
14impl From<Tiie> for bool {
15    #[inline(always)]
16    fn from(variant: Tiie) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `TIIE` reader - Time Invalid Interrupt Enable"]
21pub type TiieR = crate::BitReader<Tiie>;
22impl TiieR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Tiie {
26        match self.bits {
27            false => Tiie::Tiie0,
28            true => Tiie::Tiie1,
29        }
30    }
31    #[doc = "No interrupt is generated."]
32    #[inline(always)]
33    pub fn is_tiie_0(&self) -> bool {
34        *self == Tiie::Tiie0
35    }
36    #[doc = "An interrupt is generated."]
37    #[inline(always)]
38    pub fn is_tiie_1(&self) -> bool {
39        *self == Tiie::Tiie1
40    }
41}
42#[doc = "Field `TIIE` writer - Time Invalid Interrupt Enable"]
43pub type TiieW<'a, REG> = crate::BitWriter<'a, REG, Tiie>;
44impl<'a, REG> TiieW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "No interrupt is generated."]
49    #[inline(always)]
50    pub fn tiie_0(self) -> &'a mut crate::W<REG> {
51        self.variant(Tiie::Tiie0)
52    }
53    #[doc = "An interrupt is generated."]
54    #[inline(always)]
55    pub fn tiie_1(self) -> &'a mut crate::W<REG> {
56        self.variant(Tiie::Tiie1)
57    }
58}
59#[doc = "Time Overflow Interrupt Enable\n\nValue on reset: 1"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Toie {
63    #[doc = "0: No interrupt is generated."]
64    Toie0 = 0,
65    #[doc = "1: An interrupt is generated."]
66    Toie1 = 1,
67}
68impl From<Toie> for bool {
69    #[inline(always)]
70    fn from(variant: Toie) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `TOIE` reader - Time Overflow Interrupt Enable"]
75pub type ToieR = crate::BitReader<Toie>;
76impl ToieR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Toie {
80        match self.bits {
81            false => Toie::Toie0,
82            true => Toie::Toie1,
83        }
84    }
85    #[doc = "No interrupt is generated."]
86    #[inline(always)]
87    pub fn is_toie_0(&self) -> bool {
88        *self == Toie::Toie0
89    }
90    #[doc = "An interrupt is generated."]
91    #[inline(always)]
92    pub fn is_toie_1(&self) -> bool {
93        *self == Toie::Toie1
94    }
95}
96#[doc = "Field `TOIE` writer - Time Overflow Interrupt Enable"]
97pub type ToieW<'a, REG> = crate::BitWriter<'a, REG, Toie>;
98impl<'a, REG> ToieW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "No interrupt is generated."]
103    #[inline(always)]
104    pub fn toie_0(self) -> &'a mut crate::W<REG> {
105        self.variant(Toie::Toie0)
106    }
107    #[doc = "An interrupt is generated."]
108    #[inline(always)]
109    pub fn toie_1(self) -> &'a mut crate::W<REG> {
110        self.variant(Toie::Toie1)
111    }
112}
113#[doc = "Time Alarm Interrupt Enable\n\nValue on reset: 1"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Taie {
117    #[doc = "0: No interrupt is generated."]
118    Taie0 = 0,
119    #[doc = "1: An interrupt is generated."]
120    Taie1 = 1,
121}
122impl From<Taie> for bool {
123    #[inline(always)]
124    fn from(variant: Taie) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `TAIE` reader - Time Alarm Interrupt Enable"]
129pub type TaieR = crate::BitReader<Taie>;
130impl TaieR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Taie {
134        match self.bits {
135            false => Taie::Taie0,
136            true => Taie::Taie1,
137        }
138    }
139    #[doc = "No interrupt is generated."]
140    #[inline(always)]
141    pub fn is_taie_0(&self) -> bool {
142        *self == Taie::Taie0
143    }
144    #[doc = "An interrupt is generated."]
145    #[inline(always)]
146    pub fn is_taie_1(&self) -> bool {
147        *self == Taie::Taie1
148    }
149}
150#[doc = "Field `TAIE` writer - Time Alarm Interrupt Enable"]
151pub type TaieW<'a, REG> = crate::BitWriter<'a, REG, Taie>;
152impl<'a, REG> TaieW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "No interrupt is generated."]
157    #[inline(always)]
158    pub fn taie_0(self) -> &'a mut crate::W<REG> {
159        self.variant(Taie::Taie0)
160    }
161    #[doc = "An interrupt is generated."]
162    #[inline(always)]
163    pub fn taie_1(self) -> &'a mut crate::W<REG> {
164        self.variant(Taie::Taie1)
165    }
166}
167#[doc = "Time Seconds Interrupt Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Tsie {
171    #[doc = "0: Disables"]
172    Tsie0 = 0,
173    #[doc = "1: Enables"]
174    Tsie1 = 1,
175}
176impl From<Tsie> for bool {
177    #[inline(always)]
178    fn from(variant: Tsie) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `TSIE` reader - Time Seconds Interrupt Enable"]
183pub type TsieR = crate::BitReader<Tsie>;
184impl TsieR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Tsie {
188        match self.bits {
189            false => Tsie::Tsie0,
190            true => Tsie::Tsie1,
191        }
192    }
193    #[doc = "Disables"]
194    #[inline(always)]
195    pub fn is_tsie_0(&self) -> bool {
196        *self == Tsie::Tsie0
197    }
198    #[doc = "Enables"]
199    #[inline(always)]
200    pub fn is_tsie_1(&self) -> bool {
201        *self == Tsie::Tsie1
202    }
203}
204#[doc = "Field `TSIE` writer - Time Seconds Interrupt Enable"]
205pub type TsieW<'a, REG> = crate::BitWriter<'a, REG, Tsie>;
206impl<'a, REG> TsieW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Disables"]
211    #[inline(always)]
212    pub fn tsie_0(self) -> &'a mut crate::W<REG> {
213        self.variant(Tsie::Tsie0)
214    }
215    #[doc = "Enables"]
216    #[inline(always)]
217    pub fn tsie_1(self) -> &'a mut crate::W<REG> {
218        self.variant(Tsie::Tsie1)
219    }
220}
221#[doc = "Timer Seconds Interrupt Configuration\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224#[repr(u8)]
225pub enum Tsic {
226    #[doc = "0: 1 Hz."]
227    Tsic0 = 0,
228    #[doc = "1: 2 Hz."]
229    Tsic1 = 1,
230    #[doc = "2: 4 Hz."]
231    Tsic2 = 2,
232    #[doc = "3: 8 Hz."]
233    Tsic3 = 3,
234    #[doc = "4: 16 Hz."]
235    Tsic4 = 4,
236    #[doc = "5: 32 Hz."]
237    Tsic5 = 5,
238    #[doc = "6: 64 Hz."]
239    Tsic6 = 6,
240    #[doc = "7: 128 Hz."]
241    Tsic7 = 7,
242}
243impl From<Tsic> for u8 {
244    #[inline(always)]
245    fn from(variant: Tsic) -> Self {
246        variant as _
247    }
248}
249impl crate::FieldSpec for Tsic {
250    type Ux = u8;
251}
252impl crate::IsEnum for Tsic {}
253#[doc = "Field `TSIC` reader - Timer Seconds Interrupt Configuration"]
254pub type TsicR = crate::FieldReader<Tsic>;
255impl TsicR {
256    #[doc = "Get enumerated values variant"]
257    #[inline(always)]
258    pub const fn variant(&self) -> Tsic {
259        match self.bits {
260            0 => Tsic::Tsic0,
261            1 => Tsic::Tsic1,
262            2 => Tsic::Tsic2,
263            3 => Tsic::Tsic3,
264            4 => Tsic::Tsic4,
265            5 => Tsic::Tsic5,
266            6 => Tsic::Tsic6,
267            7 => Tsic::Tsic7,
268            _ => unreachable!(),
269        }
270    }
271    #[doc = "1 Hz."]
272    #[inline(always)]
273    pub fn is_tsic_0(&self) -> bool {
274        *self == Tsic::Tsic0
275    }
276    #[doc = "2 Hz."]
277    #[inline(always)]
278    pub fn is_tsic_1(&self) -> bool {
279        *self == Tsic::Tsic1
280    }
281    #[doc = "4 Hz."]
282    #[inline(always)]
283    pub fn is_tsic_2(&self) -> bool {
284        *self == Tsic::Tsic2
285    }
286    #[doc = "8 Hz."]
287    #[inline(always)]
288    pub fn is_tsic_3(&self) -> bool {
289        *self == Tsic::Tsic3
290    }
291    #[doc = "16 Hz."]
292    #[inline(always)]
293    pub fn is_tsic_4(&self) -> bool {
294        *self == Tsic::Tsic4
295    }
296    #[doc = "32 Hz."]
297    #[inline(always)]
298    pub fn is_tsic_5(&self) -> bool {
299        *self == Tsic::Tsic5
300    }
301    #[doc = "64 Hz."]
302    #[inline(always)]
303    pub fn is_tsic_6(&self) -> bool {
304        *self == Tsic::Tsic6
305    }
306    #[doc = "128 Hz."]
307    #[inline(always)]
308    pub fn is_tsic_7(&self) -> bool {
309        *self == Tsic::Tsic7
310    }
311}
312#[doc = "Field `TSIC` writer - Timer Seconds Interrupt Configuration"]
313pub type TsicW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tsic, crate::Safe>;
314impl<'a, REG> TsicW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317    REG::Ux: From<u8>,
318{
319    #[doc = "1 Hz."]
320    #[inline(always)]
321    pub fn tsic_0(self) -> &'a mut crate::W<REG> {
322        self.variant(Tsic::Tsic0)
323    }
324    #[doc = "2 Hz."]
325    #[inline(always)]
326    pub fn tsic_1(self) -> &'a mut crate::W<REG> {
327        self.variant(Tsic::Tsic1)
328    }
329    #[doc = "4 Hz."]
330    #[inline(always)]
331    pub fn tsic_2(self) -> &'a mut crate::W<REG> {
332        self.variant(Tsic::Tsic2)
333    }
334    #[doc = "8 Hz."]
335    #[inline(always)]
336    pub fn tsic_3(self) -> &'a mut crate::W<REG> {
337        self.variant(Tsic::Tsic3)
338    }
339    #[doc = "16 Hz."]
340    #[inline(always)]
341    pub fn tsic_4(self) -> &'a mut crate::W<REG> {
342        self.variant(Tsic::Tsic4)
343    }
344    #[doc = "32 Hz."]
345    #[inline(always)]
346    pub fn tsic_5(self) -> &'a mut crate::W<REG> {
347        self.variant(Tsic::Tsic5)
348    }
349    #[doc = "64 Hz."]
350    #[inline(always)]
351    pub fn tsic_6(self) -> &'a mut crate::W<REG> {
352        self.variant(Tsic::Tsic6)
353    }
354    #[doc = "128 Hz."]
355    #[inline(always)]
356    pub fn tsic_7(self) -> &'a mut crate::W<REG> {
357        self.variant(Tsic::Tsic7)
358    }
359}
360impl R {
361    #[doc = "Bit 0 - Time Invalid Interrupt Enable"]
362    #[inline(always)]
363    pub fn tiie(&self) -> TiieR {
364        TiieR::new((self.bits & 1) != 0)
365    }
366    #[doc = "Bit 1 - Time Overflow Interrupt Enable"]
367    #[inline(always)]
368    pub fn toie(&self) -> ToieR {
369        ToieR::new(((self.bits >> 1) & 1) != 0)
370    }
371    #[doc = "Bit 2 - Time Alarm Interrupt Enable"]
372    #[inline(always)]
373    pub fn taie(&self) -> TaieR {
374        TaieR::new(((self.bits >> 2) & 1) != 0)
375    }
376    #[doc = "Bit 4 - Time Seconds Interrupt Enable"]
377    #[inline(always)]
378    pub fn tsie(&self) -> TsieR {
379        TsieR::new(((self.bits >> 4) & 1) != 0)
380    }
381    #[doc = "Bits 16:18 - Timer Seconds Interrupt Configuration"]
382    #[inline(always)]
383    pub fn tsic(&self) -> TsicR {
384        TsicR::new(((self.bits >> 16) & 7) as u8)
385    }
386}
387#[cfg(feature = "debug")]
388impl core::fmt::Debug for R {
389    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
390        f.debug_struct("IER")
391            .field("tiie", &self.tiie())
392            .field("toie", &self.toie())
393            .field("taie", &self.taie())
394            .field("tsie", &self.tsie())
395            .field("tsic", &self.tsic())
396            .finish()
397    }
398}
399impl W {
400    #[doc = "Bit 0 - Time Invalid Interrupt Enable"]
401    #[inline(always)]
402    pub fn tiie(&mut self) -> TiieW<'_, IerSpec> {
403        TiieW::new(self, 0)
404    }
405    #[doc = "Bit 1 - Time Overflow Interrupt Enable"]
406    #[inline(always)]
407    pub fn toie(&mut self) -> ToieW<'_, IerSpec> {
408        ToieW::new(self, 1)
409    }
410    #[doc = "Bit 2 - Time Alarm Interrupt Enable"]
411    #[inline(always)]
412    pub fn taie(&mut self) -> TaieW<'_, IerSpec> {
413        TaieW::new(self, 2)
414    }
415    #[doc = "Bit 4 - Time Seconds Interrupt Enable"]
416    #[inline(always)]
417    pub fn tsie(&mut self) -> TsieW<'_, IerSpec> {
418        TsieW::new(self, 4)
419    }
420    #[doc = "Bits 16:18 - Timer Seconds Interrupt Configuration"]
421    #[inline(always)]
422    pub fn tsic(&mut self) -> TsicW<'_, IerSpec> {
423        TsicW::new(self, 16)
424    }
425}
426#[doc = "RTC Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`ier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
427pub struct IerSpec;
428impl crate::RegisterSpec for IerSpec {
429    type Ux = u32;
430}
431#[doc = "`read()` method returns [`ier::R`](R) reader structure"]
432impl crate::Readable for IerSpec {}
433#[doc = "`write(|w| ..)` method takes [`ier::W`](W) writer structure"]
434impl crate::Writable for IerSpec {
435    type Safety = crate::Unsafe;
436}
437#[doc = "`reset()` method sets IER to value 0x07"]
438impl crate::Resettable for IerSpec {
439    const RESET_VALUE: u32 = 0x07;
440}
mcxa_pac/rtc0/ier.rs

mcxa_pac/rtc0/
ier.rs
