mcxa_pac/pkc0/
pkc_ctrl.rs1#[doc = "Register `PKC_CTRL` reader"]
2pub type R = crate::R<PkcCtrlSpec>;
3#[doc = "Register `PKC_CTRL` writer"]
4pub type W = crate::W<PkcCtrlSpec>;
5#[doc = "Field `RESET` reader - PKC reset control bit"]
6pub type ResetR = crate::BitReader;
7#[doc = "Field `RESET` writer - PKC reset control bit"]
8pub type ResetW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `STOP` reader - Freeze PKC calculation"]
10pub type StopR = crate::BitReader;
11#[doc = "Field `STOP` writer - Freeze PKC calculation"]
12pub type StopW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `GOD1` writer - Control bit to start direct operation using parameter set 1"]
14pub type God1W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `GOD2` writer - Control bit to start direct operation using parameter set 2"]
16pub type God2W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `GOM1` writer - Control bit to start MC pattern using parameter set 1"]
18pub type Gom1W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `GOM2` writer - Control bit to start MC pattern using parameter set 2"]
20pub type Gom2W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `GOU` writer - Control bit to start pipe operation"]
22pub type GouW<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `GF2CONV` reader - Convert to GF2 calculation modes"]
24pub type Gf2convR = crate::BitReader;
25#[doc = "Field `GF2CONV` writer - Convert to GF2 calculation modes"]
26pub type Gf2convW<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `CLRCACHE` writer - Clear universal pointer cache"]
28pub type ClrcacheW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `CACHE_EN` reader - Enable universal pointer cache"]
30pub type CacheEnR = crate::BitReader;
31#[doc = "Field `CACHE_EN` writer - Enable universal pointer cache"]
32pub type CacheEnW<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Reduced multiplier mode\n\nValue on reset: 0"]
34#[cfg_attr(feature = "defmt", derive(defmt::Format))]
35#[derive(Clone, Copy, Debug, PartialEq, Eq)]
36#[repr(u8)]
37pub enum Redmul {
38 #[doc = "0: full size mode, 3 least significant bits of pointer and length are ignored, minimum supported length 0x0008"]
39 Fullsz = 0,
40 #[doc = "2: 64-bit mode, 3 least significant bits of pointer and length are ignored, minimum supported length 0x0008"]
41 Value64bit = 2,
42}
43impl From<Redmul> for u8 {
44 #[inline(always)]
45 fn from(variant: Redmul) -> Self {
46 variant as _
47 }
48}
49impl crate::FieldSpec for Redmul {
50 type Ux = u8;
51}
52impl crate::IsEnum for Redmul {}
53#[doc = "Field `REDMUL` reader - Reduced multiplier mode"]
54pub type RedmulR = crate::FieldReader<Redmul>;
55impl RedmulR {
56 #[doc = "Get enumerated values variant"]
57 #[inline(always)]
58 pub const fn variant(&self) -> Option<Redmul> {
59 match self.bits {
60 0 => Some(Redmul::Fullsz),
61 2 => Some(Redmul::Value64bit),
62 _ => None,
63 }
64 }
65 #[doc = "full size mode, 3 least significant bits of pointer and length are ignored, minimum supported length 0x0008"]
66 #[inline(always)]
67 pub fn is_fullsz(&self) -> bool {
68 *self == Redmul::Fullsz
69 }
70 #[doc = "64-bit mode, 3 least significant bits of pointer and length are ignored, minimum supported length 0x0008"]
71 #[inline(always)]
72 pub fn is_value_64bit(&self) -> bool {
73 *self == Redmul::Value64bit
74 }
75}
76#[doc = "Field `REDMUL` writer - Reduced multiplier mode"]
77pub type RedmulW<'a, REG> = crate::FieldWriter<'a, REG, 2, Redmul>;
78impl<'a, REG> RedmulW<'a, REG>
79where
80 REG: crate::Writable + crate::RegisterSpec,
81 REG::Ux: From<u8>,
82{
83 #[doc = "full size mode, 3 least significant bits of pointer and length are ignored, minimum supported length 0x0008"]
84 #[inline(always)]
85 pub fn fullsz(self) -> &'a mut crate::W<REG> {
86 self.variant(Redmul::Fullsz)
87 }
88 #[doc = "64-bit mode, 3 least significant bits of pointer and length are ignored, minimum supported length 0x0008"]
89 #[inline(always)]
90 pub fn value_64bit(self) -> &'a mut crate::W<REG> {
91 self.variant(Redmul::Value64bit)
92 }
93}
94impl R {
95 #[doc = "Bit 0 - PKC reset control bit"]
96 #[inline(always)]
97 pub fn reset(&self) -> ResetR {
98 ResetR::new((self.bits & 1) != 0)
99 }
100 #[doc = "Bit 1 - Freeze PKC calculation"]
101 #[inline(always)]
102 pub fn stop(&self) -> StopR {
103 StopR::new(((self.bits >> 1) & 1) != 0)
104 }
105 #[doc = "Bit 7 - Convert to GF2 calculation modes"]
106 #[inline(always)]
107 pub fn gf2conv(&self) -> Gf2convR {
108 Gf2convR::new(((self.bits >> 7) & 1) != 0)
109 }
110 #[doc = "Bit 9 - Enable universal pointer cache"]
111 #[inline(always)]
112 pub fn cache_en(&self) -> CacheEnR {
113 CacheEnR::new(((self.bits >> 9) & 1) != 0)
114 }
115 #[doc = "Bits 10:11 - Reduced multiplier mode"]
116 #[inline(always)]
117 pub fn redmul(&self) -> RedmulR {
118 RedmulR::new(((self.bits >> 10) & 3) as u8)
119 }
120}
121#[cfg(feature = "debug")]
122impl core::fmt::Debug for R {
123 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
124 f.debug_struct("PKC_CTRL")
125 .field("reset", &self.reset())
126 .field("stop", &self.stop())
127 .field("gf2conv", &self.gf2conv())
128 .field("cache_en", &self.cache_en())
129 .field("redmul", &self.redmul())
130 .finish()
131 }
132}
133impl W {
134 #[doc = "Bit 0 - PKC reset control bit"]
135 #[inline(always)]
136 pub fn reset(&mut self) -> ResetW<'_, PkcCtrlSpec> {
137 ResetW::new(self, 0)
138 }
139 #[doc = "Bit 1 - Freeze PKC calculation"]
140 #[inline(always)]
141 pub fn stop(&mut self) -> StopW<'_, PkcCtrlSpec> {
142 StopW::new(self, 1)
143 }
144 #[doc = "Bit 2 - Control bit to start direct operation using parameter set 1"]
145 #[inline(always)]
146 pub fn god1(&mut self) -> God1W<'_, PkcCtrlSpec> {
147 God1W::new(self, 2)
148 }
149 #[doc = "Bit 3 - Control bit to start direct operation using parameter set 2"]
150 #[inline(always)]
151 pub fn god2(&mut self) -> God2W<'_, PkcCtrlSpec> {
152 God2W::new(self, 3)
153 }
154 #[doc = "Bit 4 - Control bit to start MC pattern using parameter set 1"]
155 #[inline(always)]
156 pub fn gom1(&mut self) -> Gom1W<'_, PkcCtrlSpec> {
157 Gom1W::new(self, 4)
158 }
159 #[doc = "Bit 5 - Control bit to start MC pattern using parameter set 2"]
160 #[inline(always)]
161 pub fn gom2(&mut self) -> Gom2W<'_, PkcCtrlSpec> {
162 Gom2W::new(self, 5)
163 }
164 #[doc = "Bit 6 - Control bit to start pipe operation"]
165 #[inline(always)]
166 pub fn gou(&mut self) -> GouW<'_, PkcCtrlSpec> {
167 GouW::new(self, 6)
168 }
169 #[doc = "Bit 7 - Convert to GF2 calculation modes"]
170 #[inline(always)]
171 pub fn gf2conv(&mut self) -> Gf2convW<'_, PkcCtrlSpec> {
172 Gf2convW::new(self, 7)
173 }
174 #[doc = "Bit 8 - Clear universal pointer cache"]
175 #[inline(always)]
176 pub fn clrcache(&mut self) -> ClrcacheW<'_, PkcCtrlSpec> {
177 ClrcacheW::new(self, 8)
178 }
179 #[doc = "Bit 9 - Enable universal pointer cache"]
180 #[inline(always)]
181 pub fn cache_en(&mut self) -> CacheEnW<'_, PkcCtrlSpec> {
182 CacheEnW::new(self, 9)
183 }
184 #[doc = "Bits 10:11 - Reduced multiplier mode"]
185 #[inline(always)]
186 pub fn redmul(&mut self) -> RedmulW<'_, PkcCtrlSpec> {
187 RedmulW::new(self, 10)
188 }
189}
190#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pkc_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pkc_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
191pub struct PkcCtrlSpec;
192impl crate::RegisterSpec for PkcCtrlSpec {
193 type Ux = u32;
194}
195#[doc = "`read()` method returns [`pkc_ctrl::R`](R) reader structure"]
196impl crate::Readable for PkcCtrlSpec {}
197#[doc = "`write(|w| ..)` method takes [`pkc_ctrl::W`](W) writer structure"]
198impl crate::Writable for PkcCtrlSpec {
199 type Safety = crate::Unsafe;
200}
201#[doc = "`reset()` method sets PKC_CTRL to value 0x01"]
202impl crate::Resettable for PkcCtrlSpec {
203 const RESET_VALUE: u32 = 0x01;
204}