mcxa_pac/lpuart0/
fifo.rs

1#[doc = "Register `FIFO` reader"]
2pub type R = crate::R<FifoSpec>;
3#[doc = "Register `FIFO` writer"]
4pub type W = crate::W<FifoSpec>;
5#[doc = "Receive FIFO Buffer Depth\n\nValue on reset: 1"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum Rxfifosize {
10    #[doc = "0: 1"]
11    Fifo1 = 0,
12    #[doc = "1: 4"]
13    Fifo4 = 1,
14    #[doc = "2: 8"]
15    Fifo8 = 2,
16    #[doc = "3: 16"]
17    Fifo16 = 3,
18    #[doc = "4: 32"]
19    Fifo32 = 4,
20    #[doc = "5: 64"]
21    Fifo64 = 5,
22    #[doc = "6: 128"]
23    Fifo128 = 6,
24    #[doc = "7: 256"]
25    Fifo256 = 7,
26}
27impl From<Rxfifosize> for u8 {
28    #[inline(always)]
29    fn from(variant: Rxfifosize) -> Self {
30        variant as _
31    }
32}
33impl crate::FieldSpec for Rxfifosize {
34    type Ux = u8;
35}
36impl crate::IsEnum for Rxfifosize {}
37#[doc = "Field `RXFIFOSIZE` reader - Receive FIFO Buffer Depth"]
38pub type RxfifosizeR = crate::FieldReader<Rxfifosize>;
39impl RxfifosizeR {
40    #[doc = "Get enumerated values variant"]
41    #[inline(always)]
42    pub const fn variant(&self) -> Rxfifosize {
43        match self.bits {
44            0 => Rxfifosize::Fifo1,
45            1 => Rxfifosize::Fifo4,
46            2 => Rxfifosize::Fifo8,
47            3 => Rxfifosize::Fifo16,
48            4 => Rxfifosize::Fifo32,
49            5 => Rxfifosize::Fifo64,
50            6 => Rxfifosize::Fifo128,
51            7 => Rxfifosize::Fifo256,
52            _ => unreachable!(),
53        }
54    }
55    #[doc = "1"]
56    #[inline(always)]
57    pub fn is_fifo_1(&self) -> bool {
58        *self == Rxfifosize::Fifo1
59    }
60    #[doc = "4"]
61    #[inline(always)]
62    pub fn is_fifo_4(&self) -> bool {
63        *self == Rxfifosize::Fifo4
64    }
65    #[doc = "8"]
66    #[inline(always)]
67    pub fn is_fifo_8(&self) -> bool {
68        *self == Rxfifosize::Fifo8
69    }
70    #[doc = "16"]
71    #[inline(always)]
72    pub fn is_fifo_16(&self) -> bool {
73        *self == Rxfifosize::Fifo16
74    }
75    #[doc = "32"]
76    #[inline(always)]
77    pub fn is_fifo_32(&self) -> bool {
78        *self == Rxfifosize::Fifo32
79    }
80    #[doc = "64"]
81    #[inline(always)]
82    pub fn is_fifo_64(&self) -> bool {
83        *self == Rxfifosize::Fifo64
84    }
85    #[doc = "128"]
86    #[inline(always)]
87    pub fn is_fifo_128(&self) -> bool {
88        *self == Rxfifosize::Fifo128
89    }
90    #[doc = "256"]
91    #[inline(always)]
92    pub fn is_fifo_256(&self) -> bool {
93        *self == Rxfifosize::Fifo256
94    }
95}
96#[doc = "Receive FIFO Enable\n\nValue on reset: 0"]
97#[cfg_attr(feature = "defmt", derive(defmt::Format))]
98#[derive(Clone, Copy, Debug, PartialEq, Eq)]
99pub enum Rxfe {
100    #[doc = "0: Disable"]
101    Disabled = 0,
102    #[doc = "1: Enable"]
103    Enabled = 1,
104}
105impl From<Rxfe> for bool {
106    #[inline(always)]
107    fn from(variant: Rxfe) -> Self {
108        variant as u8 != 0
109    }
110}
111#[doc = "Field `RXFE` reader - Receive FIFO Enable"]
112pub type RxfeR = crate::BitReader<Rxfe>;
113impl RxfeR {
114    #[doc = "Get enumerated values variant"]
115    #[inline(always)]
116    pub const fn variant(&self) -> Rxfe {
117        match self.bits {
118            false => Rxfe::Disabled,
119            true => Rxfe::Enabled,
120        }
121    }
122    #[doc = "Disable"]
123    #[inline(always)]
124    pub fn is_disabled(&self) -> bool {
125        *self == Rxfe::Disabled
126    }
127    #[doc = "Enable"]
128    #[inline(always)]
129    pub fn is_enabled(&self) -> bool {
130        *self == Rxfe::Enabled
131    }
132}
133#[doc = "Field `RXFE` writer - Receive FIFO Enable"]
134pub type RxfeW<'a, REG> = crate::BitWriter<'a, REG, Rxfe>;
135impl<'a, REG> RxfeW<'a, REG>
136where
137    REG: crate::Writable + crate::RegisterSpec,
138{
139    #[doc = "Disable"]
140    #[inline(always)]
141    pub fn disabled(self) -> &'a mut crate::W<REG> {
142        self.variant(Rxfe::Disabled)
143    }
144    #[doc = "Enable"]
145    #[inline(always)]
146    pub fn enabled(self) -> &'a mut crate::W<REG> {
147        self.variant(Rxfe::Enabled)
148    }
149}
150#[doc = "Transmit FIFO Buffer Depth\n\nValue on reset: 1"]
151#[cfg_attr(feature = "defmt", derive(defmt::Format))]
152#[derive(Clone, Copy, Debug, PartialEq, Eq)]
153#[repr(u8)]
154pub enum Txfifosize {
155    #[doc = "0: 1"]
156    Fifo1 = 0,
157    #[doc = "1: 4"]
158    Fifo4 = 1,
159    #[doc = "2: 8"]
160    Fifo8 = 2,
161    #[doc = "3: 16"]
162    Fifo16 = 3,
163    #[doc = "4: 32"]
164    Fifo32 = 4,
165    #[doc = "5: 64"]
166    Fifo64 = 5,
167    #[doc = "6: 128"]
168    Fifo128 = 6,
169    #[doc = "7: 256"]
170    Fifo256 = 7,
171}
172impl From<Txfifosize> for u8 {
173    #[inline(always)]
174    fn from(variant: Txfifosize) -> Self {
175        variant as _
176    }
177}
178impl crate::FieldSpec for Txfifosize {
179    type Ux = u8;
180}
181impl crate::IsEnum for Txfifosize {}
182#[doc = "Field `TXFIFOSIZE` reader - Transmit FIFO Buffer Depth"]
183pub type TxfifosizeR = crate::FieldReader<Txfifosize>;
184impl TxfifosizeR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Txfifosize {
188        match self.bits {
189            0 => Txfifosize::Fifo1,
190            1 => Txfifosize::Fifo4,
191            2 => Txfifosize::Fifo8,
192            3 => Txfifosize::Fifo16,
193            4 => Txfifosize::Fifo32,
194            5 => Txfifosize::Fifo64,
195            6 => Txfifosize::Fifo128,
196            7 => Txfifosize::Fifo256,
197            _ => unreachable!(),
198        }
199    }
200    #[doc = "1"]
201    #[inline(always)]
202    pub fn is_fifo_1(&self) -> bool {
203        *self == Txfifosize::Fifo1
204    }
205    #[doc = "4"]
206    #[inline(always)]
207    pub fn is_fifo_4(&self) -> bool {
208        *self == Txfifosize::Fifo4
209    }
210    #[doc = "8"]
211    #[inline(always)]
212    pub fn is_fifo_8(&self) -> bool {
213        *self == Txfifosize::Fifo8
214    }
215    #[doc = "16"]
216    #[inline(always)]
217    pub fn is_fifo_16(&self) -> bool {
218        *self == Txfifosize::Fifo16
219    }
220    #[doc = "32"]
221    #[inline(always)]
222    pub fn is_fifo_32(&self) -> bool {
223        *self == Txfifosize::Fifo32
224    }
225    #[doc = "64"]
226    #[inline(always)]
227    pub fn is_fifo_64(&self) -> bool {
228        *self == Txfifosize::Fifo64
229    }
230    #[doc = "128"]
231    #[inline(always)]
232    pub fn is_fifo_128(&self) -> bool {
233        *self == Txfifosize::Fifo128
234    }
235    #[doc = "256"]
236    #[inline(always)]
237    pub fn is_fifo_256(&self) -> bool {
238        *self == Txfifosize::Fifo256
239    }
240}
241#[doc = "Transmit FIFO Enable\n\nValue on reset: 0"]
242#[cfg_attr(feature = "defmt", derive(defmt::Format))]
243#[derive(Clone, Copy, Debug, PartialEq, Eq)]
244pub enum Txfe {
245    #[doc = "0: Disable"]
246    Disabled = 0,
247    #[doc = "1: Enable"]
248    Enabled = 1,
249}
250impl From<Txfe> for bool {
251    #[inline(always)]
252    fn from(variant: Txfe) -> Self {
253        variant as u8 != 0
254    }
255}
256#[doc = "Field `TXFE` reader - Transmit FIFO Enable"]
257pub type TxfeR = crate::BitReader<Txfe>;
258impl TxfeR {
259    #[doc = "Get enumerated values variant"]
260    #[inline(always)]
261    pub const fn variant(&self) -> Txfe {
262        match self.bits {
263            false => Txfe::Disabled,
264            true => Txfe::Enabled,
265        }
266    }
267    #[doc = "Disable"]
268    #[inline(always)]
269    pub fn is_disabled(&self) -> bool {
270        *self == Txfe::Disabled
271    }
272    #[doc = "Enable"]
273    #[inline(always)]
274    pub fn is_enabled(&self) -> bool {
275        *self == Txfe::Enabled
276    }
277}
278#[doc = "Field `TXFE` writer - Transmit FIFO Enable"]
279pub type TxfeW<'a, REG> = crate::BitWriter<'a, REG, Txfe>;
280impl<'a, REG> TxfeW<'a, REG>
281where
282    REG: crate::Writable + crate::RegisterSpec,
283{
284    #[doc = "Disable"]
285    #[inline(always)]
286    pub fn disabled(self) -> &'a mut crate::W<REG> {
287        self.variant(Txfe::Disabled)
288    }
289    #[doc = "Enable"]
290    #[inline(always)]
291    pub fn enabled(self) -> &'a mut crate::W<REG> {
292        self.variant(Txfe::Enabled)
293    }
294}
295#[doc = "Receive FIFO Underflow Interrupt Enable\n\nValue on reset: 0"]
296#[cfg_attr(feature = "defmt", derive(defmt::Format))]
297#[derive(Clone, Copy, Debug, PartialEq, Eq)]
298pub enum Rxufe {
299    #[doc = "0: Disable"]
300    Disabled = 0,
301    #[doc = "1: Enable"]
302    Enabled = 1,
303}
304impl From<Rxufe> for bool {
305    #[inline(always)]
306    fn from(variant: Rxufe) -> Self {
307        variant as u8 != 0
308    }
309}
310#[doc = "Field `RXUFE` reader - Receive FIFO Underflow Interrupt Enable"]
311pub type RxufeR = crate::BitReader<Rxufe>;
312impl RxufeR {
313    #[doc = "Get enumerated values variant"]
314    #[inline(always)]
315    pub const fn variant(&self) -> Rxufe {
316        match self.bits {
317            false => Rxufe::Disabled,
318            true => Rxufe::Enabled,
319        }
320    }
321    #[doc = "Disable"]
322    #[inline(always)]
323    pub fn is_disabled(&self) -> bool {
324        *self == Rxufe::Disabled
325    }
326    #[doc = "Enable"]
327    #[inline(always)]
328    pub fn is_enabled(&self) -> bool {
329        *self == Rxufe::Enabled
330    }
331}
332#[doc = "Field `RXUFE` writer - Receive FIFO Underflow Interrupt Enable"]
333pub type RxufeW<'a, REG> = crate::BitWriter<'a, REG, Rxufe>;
334impl<'a, REG> RxufeW<'a, REG>
335where
336    REG: crate::Writable + crate::RegisterSpec,
337{
338    #[doc = "Disable"]
339    #[inline(always)]
340    pub fn disabled(self) -> &'a mut crate::W<REG> {
341        self.variant(Rxufe::Disabled)
342    }
343    #[doc = "Enable"]
344    #[inline(always)]
345    pub fn enabled(self) -> &'a mut crate::W<REG> {
346        self.variant(Rxufe::Enabled)
347    }
348}
349#[doc = "Transmit FIFO Overflow Interrupt Enable\n\nValue on reset: 0"]
350#[cfg_attr(feature = "defmt", derive(defmt::Format))]
351#[derive(Clone, Copy, Debug, PartialEq, Eq)]
352pub enum Txofe {
353    #[doc = "0: Disable"]
354    Disabled = 0,
355    #[doc = "1: Enable"]
356    Enabled = 1,
357}
358impl From<Txofe> for bool {
359    #[inline(always)]
360    fn from(variant: Txofe) -> Self {
361        variant as u8 != 0
362    }
363}
364#[doc = "Field `TXOFE` reader - Transmit FIFO Overflow Interrupt Enable"]
365pub type TxofeR = crate::BitReader<Txofe>;
366impl TxofeR {
367    #[doc = "Get enumerated values variant"]
368    #[inline(always)]
369    pub const fn variant(&self) -> Txofe {
370        match self.bits {
371            false => Txofe::Disabled,
372            true => Txofe::Enabled,
373        }
374    }
375    #[doc = "Disable"]
376    #[inline(always)]
377    pub fn is_disabled(&self) -> bool {
378        *self == Txofe::Disabled
379    }
380    #[doc = "Enable"]
381    #[inline(always)]
382    pub fn is_enabled(&self) -> bool {
383        *self == Txofe::Enabled
384    }
385}
386#[doc = "Field `TXOFE` writer - Transmit FIFO Overflow Interrupt Enable"]
387pub type TxofeW<'a, REG> = crate::BitWriter<'a, REG, Txofe>;
388impl<'a, REG> TxofeW<'a, REG>
389where
390    REG: crate::Writable + crate::RegisterSpec,
391{
392    #[doc = "Disable"]
393    #[inline(always)]
394    pub fn disabled(self) -> &'a mut crate::W<REG> {
395        self.variant(Txofe::Disabled)
396    }
397    #[doc = "Enable"]
398    #[inline(always)]
399    pub fn enabled(self) -> &'a mut crate::W<REG> {
400        self.variant(Txofe::Enabled)
401    }
402}
403#[doc = "Receiver Idle Empty Enable\n\nValue on reset: 0"]
404#[cfg_attr(feature = "defmt", derive(defmt::Format))]
405#[derive(Clone, Copy, Debug, PartialEq, Eq)]
406#[repr(u8)]
407pub enum Rxiden {
408    #[doc = "0: Disable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle"]
409    Disabled = 0,
410    #[doc = "1: Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for one character"]
411    Idle1 = 1,
412    #[doc = "2: Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for two characters"]
413    Idle2 = 2,
414    #[doc = "3: Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for four characters"]
415    Idle4 = 3,
416    #[doc = "4: Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for eight characters"]
417    Idle8 = 4,
418    #[doc = "5: Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for 16 characters"]
419    Idle16 = 5,
420    #[doc = "6: Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for 32 characters"]
421    Idle32 = 6,
422    #[doc = "7: Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for 64 characters"]
423    Idle64 = 7,
424}
425impl From<Rxiden> for u8 {
426    #[inline(always)]
427    fn from(variant: Rxiden) -> Self {
428        variant as _
429    }
430}
431impl crate::FieldSpec for Rxiden {
432    type Ux = u8;
433}
434impl crate::IsEnum for Rxiden {}
435#[doc = "Field `RXIDEN` reader - Receiver Idle Empty Enable"]
436pub type RxidenR = crate::FieldReader<Rxiden>;
437impl RxidenR {
438    #[doc = "Get enumerated values variant"]
439    #[inline(always)]
440    pub const fn variant(&self) -> Rxiden {
441        match self.bits {
442            0 => Rxiden::Disabled,
443            1 => Rxiden::Idle1,
444            2 => Rxiden::Idle2,
445            3 => Rxiden::Idle4,
446            4 => Rxiden::Idle8,
447            5 => Rxiden::Idle16,
448            6 => Rxiden::Idle32,
449            7 => Rxiden::Idle64,
450            _ => unreachable!(),
451        }
452    }
453    #[doc = "Disable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle"]
454    #[inline(always)]
455    pub fn is_disabled(&self) -> bool {
456        *self == Rxiden::Disabled
457    }
458    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for one character"]
459    #[inline(always)]
460    pub fn is_idle_1(&self) -> bool {
461        *self == Rxiden::Idle1
462    }
463    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for two characters"]
464    #[inline(always)]
465    pub fn is_idle_2(&self) -> bool {
466        *self == Rxiden::Idle2
467    }
468    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for four characters"]
469    #[inline(always)]
470    pub fn is_idle_4(&self) -> bool {
471        *self == Rxiden::Idle4
472    }
473    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for eight characters"]
474    #[inline(always)]
475    pub fn is_idle_8(&self) -> bool {
476        *self == Rxiden::Idle8
477    }
478    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for 16 characters"]
479    #[inline(always)]
480    pub fn is_idle_16(&self) -> bool {
481        *self == Rxiden::Idle16
482    }
483    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for 32 characters"]
484    #[inline(always)]
485    pub fn is_idle_32(&self) -> bool {
486        *self == Rxiden::Idle32
487    }
488    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for 64 characters"]
489    #[inline(always)]
490    pub fn is_idle_64(&self) -> bool {
491        *self == Rxiden::Idle64
492    }
493}
494#[doc = "Field `RXIDEN` writer - Receiver Idle Empty Enable"]
495pub type RxidenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rxiden, crate::Safe>;
496impl<'a, REG> RxidenW<'a, REG>
497where
498    REG: crate::Writable + crate::RegisterSpec,
499    REG::Ux: From<u8>,
500{
501    #[doc = "Disable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle"]
502    #[inline(always)]
503    pub fn disabled(self) -> &'a mut crate::W<REG> {
504        self.variant(Rxiden::Disabled)
505    }
506    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for one character"]
507    #[inline(always)]
508    pub fn idle_1(self) -> &'a mut crate::W<REG> {
509        self.variant(Rxiden::Idle1)
510    }
511    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for two characters"]
512    #[inline(always)]
513    pub fn idle_2(self) -> &'a mut crate::W<REG> {
514        self.variant(Rxiden::Idle2)
515    }
516    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for four characters"]
517    #[inline(always)]
518    pub fn idle_4(self) -> &'a mut crate::W<REG> {
519        self.variant(Rxiden::Idle4)
520    }
521    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for eight characters"]
522    #[inline(always)]
523    pub fn idle_8(self) -> &'a mut crate::W<REG> {
524        self.variant(Rxiden::Idle8)
525    }
526    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for 16 characters"]
527    #[inline(always)]
528    pub fn idle_16(self) -> &'a mut crate::W<REG> {
529        self.variant(Rxiden::Idle16)
530    }
531    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for 32 characters"]
532    #[inline(always)]
533    pub fn idle_32(self) -> &'a mut crate::W<REG> {
534        self.variant(Rxiden::Idle32)
535    }
536    #[doc = "Enable STAT\\[RDRF\\] to become 1 because of partially filled FIFO when the receiver is idle for 64 characters"]
537    #[inline(always)]
538    pub fn idle_64(self) -> &'a mut crate::W<REG> {
539        self.variant(Rxiden::Idle64)
540    }
541}
542#[doc = "Receive FIFO Flush\n\nValue on reset: 0"]
543#[cfg_attr(feature = "defmt", derive(defmt::Format))]
544#[derive(Clone, Copy, Debug, PartialEq, Eq)]
545pub enum Rxflush {
546    #[doc = "0: No effect"]
547    NoEffect = 0,
548    #[doc = "1: All data flushed out"]
549    RxfifoRst = 1,
550}
551impl From<Rxflush> for bool {
552    #[inline(always)]
553    fn from(variant: Rxflush) -> Self {
554        variant as u8 != 0
555    }
556}
557#[doc = "Field `RXFLUSH` reader - Receive FIFO Flush"]
558pub type RxflushR = crate::BitReader<Rxflush>;
559impl RxflushR {
560    #[doc = "Get enumerated values variant"]
561    #[inline(always)]
562    pub const fn variant(&self) -> Rxflush {
563        match self.bits {
564            false => Rxflush::NoEffect,
565            true => Rxflush::RxfifoRst,
566        }
567    }
568    #[doc = "No effect"]
569    #[inline(always)]
570    pub fn is_no_effect(&self) -> bool {
571        *self == Rxflush::NoEffect
572    }
573    #[doc = "All data flushed out"]
574    #[inline(always)]
575    pub fn is_rxfifo_rst(&self) -> bool {
576        *self == Rxflush::RxfifoRst
577    }
578}
579#[doc = "Field `RXFLUSH` writer - Receive FIFO Flush"]
580pub type RxflushW<'a, REG> = crate::BitWriter<'a, REG, Rxflush>;
581impl<'a, REG> RxflushW<'a, REG>
582where
583    REG: crate::Writable + crate::RegisterSpec,
584{
585    #[doc = "No effect"]
586    #[inline(always)]
587    pub fn no_effect(self) -> &'a mut crate::W<REG> {
588        self.variant(Rxflush::NoEffect)
589    }
590    #[doc = "All data flushed out"]
591    #[inline(always)]
592    pub fn rxfifo_rst(self) -> &'a mut crate::W<REG> {
593        self.variant(Rxflush::RxfifoRst)
594    }
595}
596#[doc = "Transmit FIFO Flush\n\nValue on reset: 0"]
597#[cfg_attr(feature = "defmt", derive(defmt::Format))]
598#[derive(Clone, Copy, Debug, PartialEq, Eq)]
599pub enum Txflush {
600    #[doc = "0: No effect"]
601    NoEffect = 0,
602    #[doc = "1: All data flushed out"]
603    TxfifoRst = 1,
604}
605impl From<Txflush> for bool {
606    #[inline(always)]
607    fn from(variant: Txflush) -> Self {
608        variant as u8 != 0
609    }
610}
611#[doc = "Field `TXFLUSH` reader - Transmit FIFO Flush"]
612pub type TxflushR = crate::BitReader<Txflush>;
613impl TxflushR {
614    #[doc = "Get enumerated values variant"]
615    #[inline(always)]
616    pub const fn variant(&self) -> Txflush {
617        match self.bits {
618            false => Txflush::NoEffect,
619            true => Txflush::TxfifoRst,
620        }
621    }
622    #[doc = "No effect"]
623    #[inline(always)]
624    pub fn is_no_effect(&self) -> bool {
625        *self == Txflush::NoEffect
626    }
627    #[doc = "All data flushed out"]
628    #[inline(always)]
629    pub fn is_txfifo_rst(&self) -> bool {
630        *self == Txflush::TxfifoRst
631    }
632}
633#[doc = "Field `TXFLUSH` writer - Transmit FIFO Flush"]
634pub type TxflushW<'a, REG> = crate::BitWriter<'a, REG, Txflush>;
635impl<'a, REG> TxflushW<'a, REG>
636where
637    REG: crate::Writable + crate::RegisterSpec,
638{
639    #[doc = "No effect"]
640    #[inline(always)]
641    pub fn no_effect(self) -> &'a mut crate::W<REG> {
642        self.variant(Txflush::NoEffect)
643    }
644    #[doc = "All data flushed out"]
645    #[inline(always)]
646    pub fn txfifo_rst(self) -> &'a mut crate::W<REG> {
647        self.variant(Txflush::TxfifoRst)
648    }
649}
650#[doc = "Receiver FIFO Underflow Flag\n\nValue on reset: 0"]
651#[cfg_attr(feature = "defmt", derive(defmt::Format))]
652#[derive(Clone, Copy, Debug, PartialEq, Eq)]
653pub enum Rxuf {
654    #[doc = "0: No underflow"]
655    NoUnderflow = 0,
656    #[doc = "1: Underflow"]
657    Underflow = 1,
658}
659impl From<Rxuf> for bool {
660    #[inline(always)]
661    fn from(variant: Rxuf) -> Self {
662        variant as u8 != 0
663    }
664}
665#[doc = "Field `RXUF` reader - Receiver FIFO Underflow Flag"]
666pub type RxufR = crate::BitReader<Rxuf>;
667impl RxufR {
668    #[doc = "Get enumerated values variant"]
669    #[inline(always)]
670    pub const fn variant(&self) -> Rxuf {
671        match self.bits {
672            false => Rxuf::NoUnderflow,
673            true => Rxuf::Underflow,
674        }
675    }
676    #[doc = "No underflow"]
677    #[inline(always)]
678    pub fn is_no_underflow(&self) -> bool {
679        *self == Rxuf::NoUnderflow
680    }
681    #[doc = "Underflow"]
682    #[inline(always)]
683    pub fn is_underflow(&self) -> bool {
684        *self == Rxuf::Underflow
685    }
686}
687#[doc = "Field `RXUF` writer - Receiver FIFO Underflow Flag"]
688pub type RxufW<'a, REG> = crate::BitWriter1C<'a, REG, Rxuf>;
689impl<'a, REG> RxufW<'a, REG>
690where
691    REG: crate::Writable + crate::RegisterSpec,
692{
693    #[doc = "No underflow"]
694    #[inline(always)]
695    pub fn no_underflow(self) -> &'a mut crate::W<REG> {
696        self.variant(Rxuf::NoUnderflow)
697    }
698    #[doc = "Underflow"]
699    #[inline(always)]
700    pub fn underflow(self) -> &'a mut crate::W<REG> {
701        self.variant(Rxuf::Underflow)
702    }
703}
704#[doc = "Transmitter FIFO Overflow Flag\n\nValue on reset: 0"]
705#[cfg_attr(feature = "defmt", derive(defmt::Format))]
706#[derive(Clone, Copy, Debug, PartialEq, Eq)]
707pub enum Txof {
708    #[doc = "0: No overflow"]
709    NoOverflow = 0,
710    #[doc = "1: Overflow"]
711    Overflow = 1,
712}
713impl From<Txof> for bool {
714    #[inline(always)]
715    fn from(variant: Txof) -> Self {
716        variant as u8 != 0
717    }
718}
719#[doc = "Field `TXOF` reader - Transmitter FIFO Overflow Flag"]
720pub type TxofR = crate::BitReader<Txof>;
721impl TxofR {
722    #[doc = "Get enumerated values variant"]
723    #[inline(always)]
724    pub const fn variant(&self) -> Txof {
725        match self.bits {
726            false => Txof::NoOverflow,
727            true => Txof::Overflow,
728        }
729    }
730    #[doc = "No overflow"]
731    #[inline(always)]
732    pub fn is_no_overflow(&self) -> bool {
733        *self == Txof::NoOverflow
734    }
735    #[doc = "Overflow"]
736    #[inline(always)]
737    pub fn is_overflow(&self) -> bool {
738        *self == Txof::Overflow
739    }
740}
741#[doc = "Field `TXOF` writer - Transmitter FIFO Overflow Flag"]
742pub type TxofW<'a, REG> = crate::BitWriter1C<'a, REG, Txof>;
743impl<'a, REG> TxofW<'a, REG>
744where
745    REG: crate::Writable + crate::RegisterSpec,
746{
747    #[doc = "No overflow"]
748    #[inline(always)]
749    pub fn no_overflow(self) -> &'a mut crate::W<REG> {
750        self.variant(Txof::NoOverflow)
751    }
752    #[doc = "Overflow"]
753    #[inline(always)]
754    pub fn overflow(self) -> &'a mut crate::W<REG> {
755        self.variant(Txof::Overflow)
756    }
757}
758#[doc = "Receive FIFO Or Buffer Empty\n\nValue on reset: 1"]
759#[cfg_attr(feature = "defmt", derive(defmt::Format))]
760#[derive(Clone, Copy, Debug, PartialEq, Eq)]
761pub enum Rxempt {
762    #[doc = "0: Not empty"]
763    NotEmpty = 0,
764    #[doc = "1: Empty"]
765    Empty = 1,
766}
767impl From<Rxempt> for bool {
768    #[inline(always)]
769    fn from(variant: Rxempt) -> Self {
770        variant as u8 != 0
771    }
772}
773#[doc = "Field `RXEMPT` reader - Receive FIFO Or Buffer Empty"]
774pub type RxemptR = crate::BitReader<Rxempt>;
775impl RxemptR {
776    #[doc = "Get enumerated values variant"]
777    #[inline(always)]
778    pub const fn variant(&self) -> Rxempt {
779        match self.bits {
780            false => Rxempt::NotEmpty,
781            true => Rxempt::Empty,
782        }
783    }
784    #[doc = "Not empty"]
785    #[inline(always)]
786    pub fn is_not_empty(&self) -> bool {
787        *self == Rxempt::NotEmpty
788    }
789    #[doc = "Empty"]
790    #[inline(always)]
791    pub fn is_empty(&self) -> bool {
792        *self == Rxempt::Empty
793    }
794}
795#[doc = "Transmit FIFO Or Buffer Empty\n\nValue on reset: 1"]
796#[cfg_attr(feature = "defmt", derive(defmt::Format))]
797#[derive(Clone, Copy, Debug, PartialEq, Eq)]
798pub enum Txempt {
799    #[doc = "0: Not empty"]
800    NotEmpty = 0,
801    #[doc = "1: Empty"]
802    Empty = 1,
803}
804impl From<Txempt> for bool {
805    #[inline(always)]
806    fn from(variant: Txempt) -> Self {
807        variant as u8 != 0
808    }
809}
810#[doc = "Field `TXEMPT` reader - Transmit FIFO Or Buffer Empty"]
811pub type TxemptR = crate::BitReader<Txempt>;
812impl TxemptR {
813    #[doc = "Get enumerated values variant"]
814    #[inline(always)]
815    pub const fn variant(&self) -> Txempt {
816        match self.bits {
817            false => Txempt::NotEmpty,
818            true => Txempt::Empty,
819        }
820    }
821    #[doc = "Not empty"]
822    #[inline(always)]
823    pub fn is_not_empty(&self) -> bool {
824        *self == Txempt::NotEmpty
825    }
826    #[doc = "Empty"]
827    #[inline(always)]
828    pub fn is_empty(&self) -> bool {
829        *self == Txempt::Empty
830    }
831}
832impl R {
833    #[doc = "Bits 0:2 - Receive FIFO Buffer Depth"]
834    #[inline(always)]
835    pub fn rxfifosize(&self) -> RxfifosizeR {
836        RxfifosizeR::new((self.bits & 7) as u8)
837    }
838    #[doc = "Bit 3 - Receive FIFO Enable"]
839    #[inline(always)]
840    pub fn rxfe(&self) -> RxfeR {
841        RxfeR::new(((self.bits >> 3) & 1) != 0)
842    }
843    #[doc = "Bits 4:6 - Transmit FIFO Buffer Depth"]
844    #[inline(always)]
845    pub fn txfifosize(&self) -> TxfifosizeR {
846        TxfifosizeR::new(((self.bits >> 4) & 7) as u8)
847    }
848    #[doc = "Bit 7 - Transmit FIFO Enable"]
849    #[inline(always)]
850    pub fn txfe(&self) -> TxfeR {
851        TxfeR::new(((self.bits >> 7) & 1) != 0)
852    }
853    #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"]
854    #[inline(always)]
855    pub fn rxufe(&self) -> RxufeR {
856        RxufeR::new(((self.bits >> 8) & 1) != 0)
857    }
858    #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"]
859    #[inline(always)]
860    pub fn txofe(&self) -> TxofeR {
861        TxofeR::new(((self.bits >> 9) & 1) != 0)
862    }
863    #[doc = "Bits 10:12 - Receiver Idle Empty Enable"]
864    #[inline(always)]
865    pub fn rxiden(&self) -> RxidenR {
866        RxidenR::new(((self.bits >> 10) & 7) as u8)
867    }
868    #[doc = "Bit 14 - Receive FIFO Flush"]
869    #[inline(always)]
870    pub fn rxflush(&self) -> RxflushR {
871        RxflushR::new(((self.bits >> 14) & 1) != 0)
872    }
873    #[doc = "Bit 15 - Transmit FIFO Flush"]
874    #[inline(always)]
875    pub fn txflush(&self) -> TxflushR {
876        TxflushR::new(((self.bits >> 15) & 1) != 0)
877    }
878    #[doc = "Bit 16 - Receiver FIFO Underflow Flag"]
879    #[inline(always)]
880    pub fn rxuf(&self) -> RxufR {
881        RxufR::new(((self.bits >> 16) & 1) != 0)
882    }
883    #[doc = "Bit 17 - Transmitter FIFO Overflow Flag"]
884    #[inline(always)]
885    pub fn txof(&self) -> TxofR {
886        TxofR::new(((self.bits >> 17) & 1) != 0)
887    }
888    #[doc = "Bit 22 - Receive FIFO Or Buffer Empty"]
889    #[inline(always)]
890    pub fn rxempt(&self) -> RxemptR {
891        RxemptR::new(((self.bits >> 22) & 1) != 0)
892    }
893    #[doc = "Bit 23 - Transmit FIFO Or Buffer Empty"]
894    #[inline(always)]
895    pub fn txempt(&self) -> TxemptR {
896        TxemptR::new(((self.bits >> 23) & 1) != 0)
897    }
898}
899#[cfg(feature = "debug")]
900impl core::fmt::Debug for R {
901    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
902        f.debug_struct("FIFO")
903            .field("rxfifosize", &self.rxfifosize())
904            .field("rxfe", &self.rxfe())
905            .field("txfifosize", &self.txfifosize())
906            .field("txfe", &self.txfe())
907            .field("rxufe", &self.rxufe())
908            .field("txofe", &self.txofe())
909            .field("rxiden", &self.rxiden())
910            .field("rxflush", &self.rxflush())
911            .field("txflush", &self.txflush())
912            .field("rxuf", &self.rxuf())
913            .field("txof", &self.txof())
914            .field("rxempt", &self.rxempt())
915            .field("txempt", &self.txempt())
916            .finish()
917    }
918}
919impl W {
920    #[doc = "Bit 3 - Receive FIFO Enable"]
921    #[inline(always)]
922    pub fn rxfe(&mut self) -> RxfeW<'_, FifoSpec> {
923        RxfeW::new(self, 3)
924    }
925    #[doc = "Bit 7 - Transmit FIFO Enable"]
926    #[inline(always)]
927    pub fn txfe(&mut self) -> TxfeW<'_, FifoSpec> {
928        TxfeW::new(self, 7)
929    }
930    #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"]
931    #[inline(always)]
932    pub fn rxufe(&mut self) -> RxufeW<'_, FifoSpec> {
933        RxufeW::new(self, 8)
934    }
935    #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"]
936    #[inline(always)]
937    pub fn txofe(&mut self) -> TxofeW<'_, FifoSpec> {
938        TxofeW::new(self, 9)
939    }
940    #[doc = "Bits 10:12 - Receiver Idle Empty Enable"]
941    #[inline(always)]
942    pub fn rxiden(&mut self) -> RxidenW<'_, FifoSpec> {
943        RxidenW::new(self, 10)
944    }
945    #[doc = "Bit 14 - Receive FIFO Flush"]
946    #[inline(always)]
947    pub fn rxflush(&mut self) -> RxflushW<'_, FifoSpec> {
948        RxflushW::new(self, 14)
949    }
950    #[doc = "Bit 15 - Transmit FIFO Flush"]
951    #[inline(always)]
952    pub fn txflush(&mut self) -> TxflushW<'_, FifoSpec> {
953        TxflushW::new(self, 15)
954    }
955    #[doc = "Bit 16 - Receiver FIFO Underflow Flag"]
956    #[inline(always)]
957    pub fn rxuf(&mut self) -> RxufW<'_, FifoSpec> {
958        RxufW::new(self, 16)
959    }
960    #[doc = "Bit 17 - Transmitter FIFO Overflow Flag"]
961    #[inline(always)]
962    pub fn txof(&mut self) -> TxofW<'_, FifoSpec> {
963        TxofW::new(self, 17)
964    }
965}
966#[doc = "FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`fifo::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fifo::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
967pub struct FifoSpec;
968impl crate::RegisterSpec for FifoSpec {
969    type Ux = u32;
970}
971#[doc = "`read()` method returns [`fifo::R`](R) reader structure"]
972impl crate::Readable for FifoSpec {}
973#[doc = "`write(|w| ..)` method takes [`fifo::W`](W) writer structure"]
974impl crate::Writable for FifoSpec {
975    type Safety = crate::Unsafe;
976    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x0003_0000;
977}
978#[doc = "`reset()` method sets FIFO to value 0x00c0_0011"]
979impl crate::Resettable for FifoSpec {
980    const RESET_VALUE: u32 = 0x00c0_0011;
981}
mcxa_pac/lpuart0/fifo.rs

mcxa_pac/lpuart0/
fifo.rs
