mcxa_pac/lpi2c0/
sder.rs

1#[doc = "Register `SDER` reader"]
2pub type R = crate::R<SderSpec>;
3#[doc = "Register `SDER` writer"]
4pub type W = crate::W<SderSpec>;
5#[doc = "Transmit Data DMA Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Tdde {
9    #[doc = "0: Disable"]
10    Disabled = 0,
11    #[doc = "1: Enable"]
12    Enabled = 1,
13}
14impl From<Tdde> for bool {
15    #[inline(always)]
16    fn from(variant: Tdde) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `TDDE` reader - Transmit Data DMA Enable"]
21pub type TddeR = crate::BitReader<Tdde>;
22impl TddeR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Tdde {
26        match self.bits {
27            false => Tdde::Disabled,
28            true => Tdde::Enabled,
29        }
30    }
31    #[doc = "Disable"]
32    #[inline(always)]
33    pub fn is_disabled(&self) -> bool {
34        *self == Tdde::Disabled
35    }
36    #[doc = "Enable"]
37    #[inline(always)]
38    pub fn is_enabled(&self) -> bool {
39        *self == Tdde::Enabled
40    }
41}
42#[doc = "Field `TDDE` writer - Transmit Data DMA Enable"]
43pub type TddeW<'a, REG> = crate::BitWriter<'a, REG, Tdde>;
44impl<'a, REG> TddeW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disable"]
49    #[inline(always)]
50    pub fn disabled(self) -> &'a mut crate::W<REG> {
51        self.variant(Tdde::Disabled)
52    }
53    #[doc = "Enable"]
54    #[inline(always)]
55    pub fn enabled(self) -> &'a mut crate::W<REG> {
56        self.variant(Tdde::Enabled)
57    }
58}
59#[doc = "Receive Data DMA Enable\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Rdde {
63    #[doc = "0: Disable DMA request"]
64    Disabled = 0,
65    #[doc = "1: Enable DMA request"]
66    Enabled = 1,
67}
68impl From<Rdde> for bool {
69    #[inline(always)]
70    fn from(variant: Rdde) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `RDDE` reader - Receive Data DMA Enable"]
75pub type RddeR = crate::BitReader<Rdde>;
76impl RddeR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Rdde {
80        match self.bits {
81            false => Rdde::Disabled,
82            true => Rdde::Enabled,
83        }
84    }
85    #[doc = "Disable DMA request"]
86    #[inline(always)]
87    pub fn is_disabled(&self) -> bool {
88        *self == Rdde::Disabled
89    }
90    #[doc = "Enable DMA request"]
91    #[inline(always)]
92    pub fn is_enabled(&self) -> bool {
93        *self == Rdde::Enabled
94    }
95}
96#[doc = "Field `RDDE` writer - Receive Data DMA Enable"]
97pub type RddeW<'a, REG> = crate::BitWriter<'a, REG, Rdde>;
98impl<'a, REG> RddeW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Disable DMA request"]
103    #[inline(always)]
104    pub fn disabled(self) -> &'a mut crate::W<REG> {
105        self.variant(Rdde::Disabled)
106    }
107    #[doc = "Enable DMA request"]
108    #[inline(always)]
109    pub fn enabled(self) -> &'a mut crate::W<REG> {
110        self.variant(Rdde::Enabled)
111    }
112}
113#[doc = "Address Valid DMA Enable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Avde {
117    #[doc = "0: Disable"]
118    Disabled = 0,
119    #[doc = "1: Enable"]
120    Enabled = 1,
121}
122impl From<Avde> for bool {
123    #[inline(always)]
124    fn from(variant: Avde) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `AVDE` reader - Address Valid DMA Enable"]
129pub type AvdeR = crate::BitReader<Avde>;
130impl AvdeR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Avde {
134        match self.bits {
135            false => Avde::Disabled,
136            true => Avde::Enabled,
137        }
138    }
139    #[doc = "Disable"]
140    #[inline(always)]
141    pub fn is_disabled(&self) -> bool {
142        *self == Avde::Disabled
143    }
144    #[doc = "Enable"]
145    #[inline(always)]
146    pub fn is_enabled(&self) -> bool {
147        *self == Avde::Enabled
148    }
149}
150#[doc = "Field `AVDE` writer - Address Valid DMA Enable"]
151pub type AvdeW<'a, REG> = crate::BitWriter<'a, REG, Avde>;
152impl<'a, REG> AvdeW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Disable"]
157    #[inline(always)]
158    pub fn disabled(self) -> &'a mut crate::W<REG> {
159        self.variant(Avde::Disabled)
160    }
161    #[doc = "Enable"]
162    #[inline(always)]
163    pub fn enabled(self) -> &'a mut crate::W<REG> {
164        self.variant(Avde::Enabled)
165    }
166}
167#[doc = "Repeated Start DMA Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Rsde {
171    #[doc = "0: Disable"]
172    Disabled = 0,
173    #[doc = "1: Enable"]
174    Enabled = 1,
175}
176impl From<Rsde> for bool {
177    #[inline(always)]
178    fn from(variant: Rsde) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `RSDE` reader - Repeated Start DMA Enable"]
183pub type RsdeR = crate::BitReader<Rsde>;
184impl RsdeR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Rsde {
188        match self.bits {
189            false => Rsde::Disabled,
190            true => Rsde::Enabled,
191        }
192    }
193    #[doc = "Disable"]
194    #[inline(always)]
195    pub fn is_disabled(&self) -> bool {
196        *self == Rsde::Disabled
197    }
198    #[doc = "Enable"]
199    #[inline(always)]
200    pub fn is_enabled(&self) -> bool {
201        *self == Rsde::Enabled
202    }
203}
204#[doc = "Field `RSDE` writer - Repeated Start DMA Enable"]
205pub type RsdeW<'a, REG> = crate::BitWriter<'a, REG, Rsde>;
206impl<'a, REG> RsdeW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Disable"]
211    #[inline(always)]
212    pub fn disabled(self) -> &'a mut crate::W<REG> {
213        self.variant(Rsde::Disabled)
214    }
215    #[doc = "Enable"]
216    #[inline(always)]
217    pub fn enabled(self) -> &'a mut crate::W<REG> {
218        self.variant(Rsde::Enabled)
219    }
220}
221#[doc = "Stop Detect DMA Enable\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Sdde {
225    #[doc = "0: Disable"]
226    Disabled = 0,
227    #[doc = "1: Enable"]
228    Enabled = 1,
229}
230impl From<Sdde> for bool {
231    #[inline(always)]
232    fn from(variant: Sdde) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `SDDE` reader - Stop Detect DMA Enable"]
237pub type SddeR = crate::BitReader<Sdde>;
238impl SddeR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Sdde {
242        match self.bits {
243            false => Sdde::Disabled,
244            true => Sdde::Enabled,
245        }
246    }
247    #[doc = "Disable"]
248    #[inline(always)]
249    pub fn is_disabled(&self) -> bool {
250        *self == Sdde::Disabled
251    }
252    #[doc = "Enable"]
253    #[inline(always)]
254    pub fn is_enabled(&self) -> bool {
255        *self == Sdde::Enabled
256    }
257}
258#[doc = "Field `SDDE` writer - Stop Detect DMA Enable"]
259pub type SddeW<'a, REG> = crate::BitWriter<'a, REG, Sdde>;
260impl<'a, REG> SddeW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Disable"]
265    #[inline(always)]
266    pub fn disabled(self) -> &'a mut crate::W<REG> {
267        self.variant(Sdde::Disabled)
268    }
269    #[doc = "Enable"]
270    #[inline(always)]
271    pub fn enabled(self) -> &'a mut crate::W<REG> {
272        self.variant(Sdde::Enabled)
273    }
274}
275impl R {
276    #[doc = "Bit 0 - Transmit Data DMA Enable"]
277    #[inline(always)]
278    pub fn tdde(&self) -> TddeR {
279        TddeR::new((self.bits & 1) != 0)
280    }
281    #[doc = "Bit 1 - Receive Data DMA Enable"]
282    #[inline(always)]
283    pub fn rdde(&self) -> RddeR {
284        RddeR::new(((self.bits >> 1) & 1) != 0)
285    }
286    #[doc = "Bit 2 - Address Valid DMA Enable"]
287    #[inline(always)]
288    pub fn avde(&self) -> AvdeR {
289        AvdeR::new(((self.bits >> 2) & 1) != 0)
290    }
291    #[doc = "Bit 8 - Repeated Start DMA Enable"]
292    #[inline(always)]
293    pub fn rsde(&self) -> RsdeR {
294        RsdeR::new(((self.bits >> 8) & 1) != 0)
295    }
296    #[doc = "Bit 9 - Stop Detect DMA Enable"]
297    #[inline(always)]
298    pub fn sdde(&self) -> SddeR {
299        SddeR::new(((self.bits >> 9) & 1) != 0)
300    }
301}
302#[cfg(feature = "debug")]
303impl core::fmt::Debug for R {
304    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
305        f.debug_struct("SDER")
306            .field("tdde", &self.tdde())
307            .field("rdde", &self.rdde())
308            .field("avde", &self.avde())
309            .field("rsde", &self.rsde())
310            .field("sdde", &self.sdde())
311            .finish()
312    }
313}
314impl W {
315    #[doc = "Bit 0 - Transmit Data DMA Enable"]
316    #[inline(always)]
317    pub fn tdde(&mut self) -> TddeW<'_, SderSpec> {
318        TddeW::new(self, 0)
319    }
320    #[doc = "Bit 1 - Receive Data DMA Enable"]
321    #[inline(always)]
322    pub fn rdde(&mut self) -> RddeW<'_, SderSpec> {
323        RddeW::new(self, 1)
324    }
325    #[doc = "Bit 2 - Address Valid DMA Enable"]
326    #[inline(always)]
327    pub fn avde(&mut self) -> AvdeW<'_, SderSpec> {
328        AvdeW::new(self, 2)
329    }
330    #[doc = "Bit 8 - Repeated Start DMA Enable"]
331    #[inline(always)]
332    pub fn rsde(&mut self) -> RsdeW<'_, SderSpec> {
333        RsdeW::new(self, 8)
334    }
335    #[doc = "Bit 9 - Stop Detect DMA Enable"]
336    #[inline(always)]
337    pub fn sdde(&mut self) -> SddeW<'_, SderSpec> {
338        SddeW::new(self, 9)
339    }
340}
341#[doc = "Target DMA Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`sder::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sder::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
342pub struct SderSpec;
343impl crate::RegisterSpec for SderSpec {
344    type Ux = u32;
345}
346#[doc = "`read()` method returns [`sder::R`](R) reader structure"]
347impl crate::Readable for SderSpec {}
348#[doc = "`write(|w| ..)` method takes [`sder::W`](W) writer structure"]
349impl crate::Writable for SderSpec {
350    type Safety = crate::Unsafe;
351}
352#[doc = "`reset()` method sets SDER to value 0"]
353impl crate::Resettable for SderSpec {}
mcxa_pac/lpi2c0/sder.rs

mcxa_pac/lpi2c0/
sder.rs
