mcxa_pac/lpi2c0/
mier.rs

1#[doc = "Register `MIER` reader"]
2pub type R = crate::R<MierSpec>;
3#[doc = "Register `MIER` writer"]
4pub type W = crate::W<MierSpec>;
5#[doc = "Transmit Data Interrupt Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Tdie {
9    #[doc = "0: Disable"]
10    Disabled = 0,
11    #[doc = "1: Enable"]
12    Enabled = 1,
13}
14impl From<Tdie> for bool {
15    #[inline(always)]
16    fn from(variant: Tdie) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `TDIE` reader - Transmit Data Interrupt Enable"]
21pub type TdieR = crate::BitReader<Tdie>;
22impl TdieR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Tdie {
26        match self.bits {
27            false => Tdie::Disabled,
28            true => Tdie::Enabled,
29        }
30    }
31    #[doc = "Disable"]
32    #[inline(always)]
33    pub fn is_disabled(&self) -> bool {
34        *self == Tdie::Disabled
35    }
36    #[doc = "Enable"]
37    #[inline(always)]
38    pub fn is_enabled(&self) -> bool {
39        *self == Tdie::Enabled
40    }
41}
42#[doc = "Field `TDIE` writer - Transmit Data Interrupt Enable"]
43pub type TdieW<'a, REG> = crate::BitWriter<'a, REG, Tdie>;
44impl<'a, REG> TdieW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Disable"]
49    #[inline(always)]
50    pub fn disabled(self) -> &'a mut crate::W<REG> {
51        self.variant(Tdie::Disabled)
52    }
53    #[doc = "Enable"]
54    #[inline(always)]
55    pub fn enabled(self) -> &'a mut crate::W<REG> {
56        self.variant(Tdie::Enabled)
57    }
58}
59#[doc = "Receive Data Interrupt Enable\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Rdie {
63    #[doc = "0: Disable"]
64    Disabled = 0,
65    #[doc = "1: Enable"]
66    Enabled = 1,
67}
68impl From<Rdie> for bool {
69    #[inline(always)]
70    fn from(variant: Rdie) -> Self {
71        variant as u8 != 0
72    }
73}
74#[doc = "Field `RDIE` reader - Receive Data Interrupt Enable"]
75pub type RdieR = crate::BitReader<Rdie>;
76impl RdieR {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub const fn variant(&self) -> Rdie {
80        match self.bits {
81            false => Rdie::Disabled,
82            true => Rdie::Enabled,
83        }
84    }
85    #[doc = "Disable"]
86    #[inline(always)]
87    pub fn is_disabled(&self) -> bool {
88        *self == Rdie::Disabled
89    }
90    #[doc = "Enable"]
91    #[inline(always)]
92    pub fn is_enabled(&self) -> bool {
93        *self == Rdie::Enabled
94    }
95}
96#[doc = "Field `RDIE` writer - Receive Data Interrupt Enable"]
97pub type RdieW<'a, REG> = crate::BitWriter<'a, REG, Rdie>;
98impl<'a, REG> RdieW<'a, REG>
99where
100    REG: crate::Writable + crate::RegisterSpec,
101{
102    #[doc = "Disable"]
103    #[inline(always)]
104    pub fn disabled(self) -> &'a mut crate::W<REG> {
105        self.variant(Rdie::Disabled)
106    }
107    #[doc = "Enable"]
108    #[inline(always)]
109    pub fn enabled(self) -> &'a mut crate::W<REG> {
110        self.variant(Rdie::Enabled)
111    }
112}
113#[doc = "End Packet Interrupt Enable\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Epie {
117    #[doc = "0: Disable"]
118    Disabled = 0,
119    #[doc = "1: Enable"]
120    Enabled = 1,
121}
122impl From<Epie> for bool {
123    #[inline(always)]
124    fn from(variant: Epie) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `EPIE` reader - End Packet Interrupt Enable"]
129pub type EpieR = crate::BitReader<Epie>;
130impl EpieR {
131    #[doc = "Get enumerated values variant"]
132    #[inline(always)]
133    pub const fn variant(&self) -> Epie {
134        match self.bits {
135            false => Epie::Disabled,
136            true => Epie::Enabled,
137        }
138    }
139    #[doc = "Disable"]
140    #[inline(always)]
141    pub fn is_disabled(&self) -> bool {
142        *self == Epie::Disabled
143    }
144    #[doc = "Enable"]
145    #[inline(always)]
146    pub fn is_enabled(&self) -> bool {
147        *self == Epie::Enabled
148    }
149}
150#[doc = "Field `EPIE` writer - End Packet Interrupt Enable"]
151pub type EpieW<'a, REG> = crate::BitWriter<'a, REG, Epie>;
152impl<'a, REG> EpieW<'a, REG>
153where
154    REG: crate::Writable + crate::RegisterSpec,
155{
156    #[doc = "Disable"]
157    #[inline(always)]
158    pub fn disabled(self) -> &'a mut crate::W<REG> {
159        self.variant(Epie::Disabled)
160    }
161    #[doc = "Enable"]
162    #[inline(always)]
163    pub fn enabled(self) -> &'a mut crate::W<REG> {
164        self.variant(Epie::Enabled)
165    }
166}
167#[doc = "Stop Detect Interrupt Enable\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum Sdie {
171    #[doc = "0: Disable"]
172    Disabled = 0,
173    #[doc = "1: Enable"]
174    Enabled = 1,
175}
176impl From<Sdie> for bool {
177    #[inline(always)]
178    fn from(variant: Sdie) -> Self {
179        variant as u8 != 0
180    }
181}
182#[doc = "Field `SDIE` reader - Stop Detect Interrupt Enable"]
183pub type SdieR = crate::BitReader<Sdie>;
184impl SdieR {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> Sdie {
188        match self.bits {
189            false => Sdie::Disabled,
190            true => Sdie::Enabled,
191        }
192    }
193    #[doc = "Disable"]
194    #[inline(always)]
195    pub fn is_disabled(&self) -> bool {
196        *self == Sdie::Disabled
197    }
198    #[doc = "Enable"]
199    #[inline(always)]
200    pub fn is_enabled(&self) -> bool {
201        *self == Sdie::Enabled
202    }
203}
204#[doc = "Field `SDIE` writer - Stop Detect Interrupt Enable"]
205pub type SdieW<'a, REG> = crate::BitWriter<'a, REG, Sdie>;
206impl<'a, REG> SdieW<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Disable"]
211    #[inline(always)]
212    pub fn disabled(self) -> &'a mut crate::W<REG> {
213        self.variant(Sdie::Disabled)
214    }
215    #[doc = "Enable"]
216    #[inline(always)]
217    pub fn enabled(self) -> &'a mut crate::W<REG> {
218        self.variant(Sdie::Enabled)
219    }
220}
221#[doc = "NACK Detect Interrupt Enable\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Ndie {
225    #[doc = "0: Disable"]
226    Disabled = 0,
227    #[doc = "1: Enable"]
228    Enabled = 1,
229}
230impl From<Ndie> for bool {
231    #[inline(always)]
232    fn from(variant: Ndie) -> Self {
233        variant as u8 != 0
234    }
235}
236#[doc = "Field `NDIE` reader - NACK Detect Interrupt Enable"]
237pub type NdieR = crate::BitReader<Ndie>;
238impl NdieR {
239    #[doc = "Get enumerated values variant"]
240    #[inline(always)]
241    pub const fn variant(&self) -> Ndie {
242        match self.bits {
243            false => Ndie::Disabled,
244            true => Ndie::Enabled,
245        }
246    }
247    #[doc = "Disable"]
248    #[inline(always)]
249    pub fn is_disabled(&self) -> bool {
250        *self == Ndie::Disabled
251    }
252    #[doc = "Enable"]
253    #[inline(always)]
254    pub fn is_enabled(&self) -> bool {
255        *self == Ndie::Enabled
256    }
257}
258#[doc = "Field `NDIE` writer - NACK Detect Interrupt Enable"]
259pub type NdieW<'a, REG> = crate::BitWriter<'a, REG, Ndie>;
260impl<'a, REG> NdieW<'a, REG>
261where
262    REG: crate::Writable + crate::RegisterSpec,
263{
264    #[doc = "Disable"]
265    #[inline(always)]
266    pub fn disabled(self) -> &'a mut crate::W<REG> {
267        self.variant(Ndie::Disabled)
268    }
269    #[doc = "Enable"]
270    #[inline(always)]
271    pub fn enabled(self) -> &'a mut crate::W<REG> {
272        self.variant(Ndie::Enabled)
273    }
274}
275#[doc = "Arbitration Lost Interrupt Enable\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Alie {
279    #[doc = "0: Disable"]
280    Disabled = 0,
281    #[doc = "1: Enable"]
282    Enabled = 1,
283}
284impl From<Alie> for bool {
285    #[inline(always)]
286    fn from(variant: Alie) -> Self {
287        variant as u8 != 0
288    }
289}
290#[doc = "Field `ALIE` reader - Arbitration Lost Interrupt Enable"]
291pub type AlieR = crate::BitReader<Alie>;
292impl AlieR {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub const fn variant(&self) -> Alie {
296        match self.bits {
297            false => Alie::Disabled,
298            true => Alie::Enabled,
299        }
300    }
301    #[doc = "Disable"]
302    #[inline(always)]
303    pub fn is_disabled(&self) -> bool {
304        *self == Alie::Disabled
305    }
306    #[doc = "Enable"]
307    #[inline(always)]
308    pub fn is_enabled(&self) -> bool {
309        *self == Alie::Enabled
310    }
311}
312#[doc = "Field `ALIE` writer - Arbitration Lost Interrupt Enable"]
313pub type AlieW<'a, REG> = crate::BitWriter<'a, REG, Alie>;
314impl<'a, REG> AlieW<'a, REG>
315where
316    REG: crate::Writable + crate::RegisterSpec,
317{
318    #[doc = "Disable"]
319    #[inline(always)]
320    pub fn disabled(self) -> &'a mut crate::W<REG> {
321        self.variant(Alie::Disabled)
322    }
323    #[doc = "Enable"]
324    #[inline(always)]
325    pub fn enabled(self) -> &'a mut crate::W<REG> {
326        self.variant(Alie::Enabled)
327    }
328}
329#[doc = "FIFO Error Interrupt Enable\n\nValue on reset: 0"]
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum Feie {
333    #[doc = "0: Disable"]
334    Disabled = 0,
335    #[doc = "1: Enable"]
336    Enabled = 1,
337}
338impl From<Feie> for bool {
339    #[inline(always)]
340    fn from(variant: Feie) -> Self {
341        variant as u8 != 0
342    }
343}
344#[doc = "Field `FEIE` reader - FIFO Error Interrupt Enable"]
345pub type FeieR = crate::BitReader<Feie>;
346impl FeieR {
347    #[doc = "Get enumerated values variant"]
348    #[inline(always)]
349    pub const fn variant(&self) -> Feie {
350        match self.bits {
351            false => Feie::Disabled,
352            true => Feie::Enabled,
353        }
354    }
355    #[doc = "Disable"]
356    #[inline(always)]
357    pub fn is_disabled(&self) -> bool {
358        *self == Feie::Disabled
359    }
360    #[doc = "Enable"]
361    #[inline(always)]
362    pub fn is_enabled(&self) -> bool {
363        *self == Feie::Enabled
364    }
365}
366#[doc = "Field `FEIE` writer - FIFO Error Interrupt Enable"]
367pub type FeieW<'a, REG> = crate::BitWriter<'a, REG, Feie>;
368impl<'a, REG> FeieW<'a, REG>
369where
370    REG: crate::Writable + crate::RegisterSpec,
371{
372    #[doc = "Disable"]
373    #[inline(always)]
374    pub fn disabled(self) -> &'a mut crate::W<REG> {
375        self.variant(Feie::Disabled)
376    }
377    #[doc = "Enable"]
378    #[inline(always)]
379    pub fn enabled(self) -> &'a mut crate::W<REG> {
380        self.variant(Feie::Enabled)
381    }
382}
383#[doc = "Pin Low Timeout Interrupt Enable\n\nValue on reset: 0"]
384#[cfg_attr(feature = "defmt", derive(defmt::Format))]
385#[derive(Clone, Copy, Debug, PartialEq, Eq)]
386pub enum Pltie {
387    #[doc = "0: Disable"]
388    Disabled = 0,
389    #[doc = "1: Enable"]
390    Enabled = 1,
391}
392impl From<Pltie> for bool {
393    #[inline(always)]
394    fn from(variant: Pltie) -> Self {
395        variant as u8 != 0
396    }
397}
398#[doc = "Field `PLTIE` reader - Pin Low Timeout Interrupt Enable"]
399pub type PltieR = crate::BitReader<Pltie>;
400impl PltieR {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> Pltie {
404        match self.bits {
405            false => Pltie::Disabled,
406            true => Pltie::Enabled,
407        }
408    }
409    #[doc = "Disable"]
410    #[inline(always)]
411    pub fn is_disabled(&self) -> bool {
412        *self == Pltie::Disabled
413    }
414    #[doc = "Enable"]
415    #[inline(always)]
416    pub fn is_enabled(&self) -> bool {
417        *self == Pltie::Enabled
418    }
419}
420#[doc = "Field `PLTIE` writer - Pin Low Timeout Interrupt Enable"]
421pub type PltieW<'a, REG> = crate::BitWriter<'a, REG, Pltie>;
422impl<'a, REG> PltieW<'a, REG>
423where
424    REG: crate::Writable + crate::RegisterSpec,
425{
426    #[doc = "Disable"]
427    #[inline(always)]
428    pub fn disabled(self) -> &'a mut crate::W<REG> {
429        self.variant(Pltie::Disabled)
430    }
431    #[doc = "Enable"]
432    #[inline(always)]
433    pub fn enabled(self) -> &'a mut crate::W<REG> {
434        self.variant(Pltie::Enabled)
435    }
436}
437#[doc = "Data Match Interrupt Enable\n\nValue on reset: 0"]
438#[cfg_attr(feature = "defmt", derive(defmt::Format))]
439#[derive(Clone, Copy, Debug, PartialEq, Eq)]
440pub enum Dmie {
441    #[doc = "0: Disable"]
442    Disabled = 0,
443    #[doc = "1: Enable"]
444    Enabled = 1,
445}
446impl From<Dmie> for bool {
447    #[inline(always)]
448    fn from(variant: Dmie) -> Self {
449        variant as u8 != 0
450    }
451}
452#[doc = "Field `DMIE` reader - Data Match Interrupt Enable"]
453pub type DmieR = crate::BitReader<Dmie>;
454impl DmieR {
455    #[doc = "Get enumerated values variant"]
456    #[inline(always)]
457    pub const fn variant(&self) -> Dmie {
458        match self.bits {
459            false => Dmie::Disabled,
460            true => Dmie::Enabled,
461        }
462    }
463    #[doc = "Disable"]
464    #[inline(always)]
465    pub fn is_disabled(&self) -> bool {
466        *self == Dmie::Disabled
467    }
468    #[doc = "Enable"]
469    #[inline(always)]
470    pub fn is_enabled(&self) -> bool {
471        *self == Dmie::Enabled
472    }
473}
474#[doc = "Field `DMIE` writer - Data Match Interrupt Enable"]
475pub type DmieW<'a, REG> = crate::BitWriter<'a, REG, Dmie>;
476impl<'a, REG> DmieW<'a, REG>
477where
478    REG: crate::Writable + crate::RegisterSpec,
479{
480    #[doc = "Disable"]
481    #[inline(always)]
482    pub fn disabled(self) -> &'a mut crate::W<REG> {
483        self.variant(Dmie::Disabled)
484    }
485    #[doc = "Enable"]
486    #[inline(always)]
487    pub fn enabled(self) -> &'a mut crate::W<REG> {
488        self.variant(Dmie::Enabled)
489    }
490}
491#[doc = "Start Interrupt Enable\n\nValue on reset: 0"]
492#[cfg_attr(feature = "defmt", derive(defmt::Format))]
493#[derive(Clone, Copy, Debug, PartialEq, Eq)]
494pub enum Stie {
495    #[doc = "0: Disable"]
496    Disabled = 0,
497    #[doc = "1: Enable"]
498    Enabled = 1,
499}
500impl From<Stie> for bool {
501    #[inline(always)]
502    fn from(variant: Stie) -> Self {
503        variant as u8 != 0
504    }
505}
506#[doc = "Field `STIE` reader - Start Interrupt Enable"]
507pub type StieR = crate::BitReader<Stie>;
508impl StieR {
509    #[doc = "Get enumerated values variant"]
510    #[inline(always)]
511    pub const fn variant(&self) -> Stie {
512        match self.bits {
513            false => Stie::Disabled,
514            true => Stie::Enabled,
515        }
516    }
517    #[doc = "Disable"]
518    #[inline(always)]
519    pub fn is_disabled(&self) -> bool {
520        *self == Stie::Disabled
521    }
522    #[doc = "Enable"]
523    #[inline(always)]
524    pub fn is_enabled(&self) -> bool {
525        *self == Stie::Enabled
526    }
527}
528#[doc = "Field `STIE` writer - Start Interrupt Enable"]
529pub type StieW<'a, REG> = crate::BitWriter<'a, REG, Stie>;
530impl<'a, REG> StieW<'a, REG>
531where
532    REG: crate::Writable + crate::RegisterSpec,
533{
534    #[doc = "Disable"]
535    #[inline(always)]
536    pub fn disabled(self) -> &'a mut crate::W<REG> {
537        self.variant(Stie::Disabled)
538    }
539    #[doc = "Enable"]
540    #[inline(always)]
541    pub fn enabled(self) -> &'a mut crate::W<REG> {
542        self.variant(Stie::Enabled)
543    }
544}
545impl R {
546    #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
547    #[inline(always)]
548    pub fn tdie(&self) -> TdieR {
549        TdieR::new((self.bits & 1) != 0)
550    }
551    #[doc = "Bit 1 - Receive Data Interrupt Enable"]
552    #[inline(always)]
553    pub fn rdie(&self) -> RdieR {
554        RdieR::new(((self.bits >> 1) & 1) != 0)
555    }
556    #[doc = "Bit 8 - End Packet Interrupt Enable"]
557    #[inline(always)]
558    pub fn epie(&self) -> EpieR {
559        EpieR::new(((self.bits >> 8) & 1) != 0)
560    }
561    #[doc = "Bit 9 - Stop Detect Interrupt Enable"]
562    #[inline(always)]
563    pub fn sdie(&self) -> SdieR {
564        SdieR::new(((self.bits >> 9) & 1) != 0)
565    }
566    #[doc = "Bit 10 - NACK Detect Interrupt Enable"]
567    #[inline(always)]
568    pub fn ndie(&self) -> NdieR {
569        NdieR::new(((self.bits >> 10) & 1) != 0)
570    }
571    #[doc = "Bit 11 - Arbitration Lost Interrupt Enable"]
572    #[inline(always)]
573    pub fn alie(&self) -> AlieR {
574        AlieR::new(((self.bits >> 11) & 1) != 0)
575    }
576    #[doc = "Bit 12 - FIFO Error Interrupt Enable"]
577    #[inline(always)]
578    pub fn feie(&self) -> FeieR {
579        FeieR::new(((self.bits >> 12) & 1) != 0)
580    }
581    #[doc = "Bit 13 - Pin Low Timeout Interrupt Enable"]
582    #[inline(always)]
583    pub fn pltie(&self) -> PltieR {
584        PltieR::new(((self.bits >> 13) & 1) != 0)
585    }
586    #[doc = "Bit 14 - Data Match Interrupt Enable"]
587    #[inline(always)]
588    pub fn dmie(&self) -> DmieR {
589        DmieR::new(((self.bits >> 14) & 1) != 0)
590    }
591    #[doc = "Bit 15 - Start Interrupt Enable"]
592    #[inline(always)]
593    pub fn stie(&self) -> StieR {
594        StieR::new(((self.bits >> 15) & 1) != 0)
595    }
596}
597#[cfg(feature = "debug")]
598impl core::fmt::Debug for R {
599    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
600        f.debug_struct("MIER")
601            .field("tdie", &self.tdie())
602            .field("rdie", &self.rdie())
603            .field("epie", &self.epie())
604            .field("sdie", &self.sdie())
605            .field("ndie", &self.ndie())
606            .field("alie", &self.alie())
607            .field("feie", &self.feie())
608            .field("pltie", &self.pltie())
609            .field("dmie", &self.dmie())
610            .field("stie", &self.stie())
611            .finish()
612    }
613}
614impl W {
615    #[doc = "Bit 0 - Transmit Data Interrupt Enable"]
616    #[inline(always)]
617    pub fn tdie(&mut self) -> TdieW<'_, MierSpec> {
618        TdieW::new(self, 0)
619    }
620    #[doc = "Bit 1 - Receive Data Interrupt Enable"]
621    #[inline(always)]
622    pub fn rdie(&mut self) -> RdieW<'_, MierSpec> {
623        RdieW::new(self, 1)
624    }
625    #[doc = "Bit 8 - End Packet Interrupt Enable"]
626    #[inline(always)]
627    pub fn epie(&mut self) -> EpieW<'_, MierSpec> {
628        EpieW::new(self, 8)
629    }
630    #[doc = "Bit 9 - Stop Detect Interrupt Enable"]
631    #[inline(always)]
632    pub fn sdie(&mut self) -> SdieW<'_, MierSpec> {
633        SdieW::new(self, 9)
634    }
635    #[doc = "Bit 10 - NACK Detect Interrupt Enable"]
636    #[inline(always)]
637    pub fn ndie(&mut self) -> NdieW<'_, MierSpec> {
638        NdieW::new(self, 10)
639    }
640    #[doc = "Bit 11 - Arbitration Lost Interrupt Enable"]
641    #[inline(always)]
642    pub fn alie(&mut self) -> AlieW<'_, MierSpec> {
643        AlieW::new(self, 11)
644    }
645    #[doc = "Bit 12 - FIFO Error Interrupt Enable"]
646    #[inline(always)]
647    pub fn feie(&mut self) -> FeieW<'_, MierSpec> {
648        FeieW::new(self, 12)
649    }
650    #[doc = "Bit 13 - Pin Low Timeout Interrupt Enable"]
651    #[inline(always)]
652    pub fn pltie(&mut self) -> PltieW<'_, MierSpec> {
653        PltieW::new(self, 13)
654    }
655    #[doc = "Bit 14 - Data Match Interrupt Enable"]
656    #[inline(always)]
657    pub fn dmie(&mut self) -> DmieW<'_, MierSpec> {
658        DmieW::new(self, 14)
659    }
660    #[doc = "Bit 15 - Start Interrupt Enable"]
661    #[inline(always)]
662    pub fn stie(&mut self) -> StieW<'_, MierSpec> {
663        StieW::new(self, 15)
664    }
665}
666#[doc = "Controller Interrupt Enable\n\nYou can [`read`](crate::Reg::read) this register and get [`mier::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mier::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
667pub struct MierSpec;
668impl crate::RegisterSpec for MierSpec {
669    type Ux = u32;
670}
671#[doc = "`read()` method returns [`mier::R`](R) reader structure"]
672impl crate::Readable for MierSpec {}
673#[doc = "`write(|w| ..)` method takes [`mier::W`](W) writer structure"]
674impl crate::Writable for MierSpec {
675    type Safety = crate::Unsafe;
676}
677#[doc = "`reset()` method sets MIER to value 0"]
678impl crate::Resettable for MierSpec {}
mcxa_pac/lpi2c0/mier.rs

mcxa_pac/lpi2c0/
mier.rs
