mcxa_pac/inputmux0/
trigfil_prsc.rs

1#[doc = "Register `TRIGFIL_PRSC` reader"]
2pub type R = crate::R<TrigfilPrscSpec>;
3#[doc = "Register `TRIGFIL_PRSC` writer"]
4pub type W = crate::W<TrigfilPrscSpec>;
5#[doc = "Filter Prescaller Value\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8#[repr(u8)]
9pub enum FiltScaleVal {
10    #[doc = "0: Bypass the clock"]
11    Val0 = 0,
12    #[doc = "1: Divide 2"]
13    Val1 = 1,
14    #[doc = "2: Divide 4"]
15    Val2 = 2,
16    #[doc = "3: Divide 8"]
17    Val3 = 3,
18}
19impl From<FiltScaleVal> for u8 {
20    #[inline(always)]
21    fn from(variant: FiltScaleVal) -> Self {
22        variant as _
23    }
24}
25impl crate::FieldSpec for FiltScaleVal {
26    type Ux = u8;
27}
28impl crate::IsEnum for FiltScaleVal {}
29#[doc = "Field `FILT_SCALE_VAL` reader - Filter Prescaller Value"]
30pub type FiltScaleValR = crate::FieldReader<FiltScaleVal>;
31impl FiltScaleValR {
32    #[doc = "Get enumerated values variant"]
33    #[inline(always)]
34    pub const fn variant(&self) -> FiltScaleVal {
35        match self.bits {
36            0 => FiltScaleVal::Val0,
37            1 => FiltScaleVal::Val1,
38            2 => FiltScaleVal::Val2,
39            3 => FiltScaleVal::Val3,
40            _ => unreachable!(),
41        }
42    }
43    #[doc = "Bypass the clock"]
44    #[inline(always)]
45    pub fn is_val0(&self) -> bool {
46        *self == FiltScaleVal::Val0
47    }
48    #[doc = "Divide 2"]
49    #[inline(always)]
50    pub fn is_val1(&self) -> bool {
51        *self == FiltScaleVal::Val1
52    }
53    #[doc = "Divide 4"]
54    #[inline(always)]
55    pub fn is_val2(&self) -> bool {
56        *self == FiltScaleVal::Val2
57    }
58    #[doc = "Divide 8"]
59    #[inline(always)]
60    pub fn is_val3(&self) -> bool {
61        *self == FiltScaleVal::Val3
62    }
63}
64#[doc = "Field `FILT_SCALE_VAL` writer - Filter Prescaller Value"]
65pub type FiltScaleValW<'a, REG> = crate::FieldWriter<'a, REG, 2, FiltScaleVal, crate::Safe>;
66impl<'a, REG> FiltScaleValW<'a, REG>
67where
68    REG: crate::Writable + crate::RegisterSpec,
69    REG::Ux: From<u8>,
70{
71    #[doc = "Bypass the clock"]
72    #[inline(always)]
73    pub fn val0(self) -> &'a mut crate::W<REG> {
74        self.variant(FiltScaleVal::Val0)
75    }
76    #[doc = "Divide 2"]
77    #[inline(always)]
78    pub fn val1(self) -> &'a mut crate::W<REG> {
79        self.variant(FiltScaleVal::Val1)
80    }
81    #[doc = "Divide 4"]
82    #[inline(always)]
83    pub fn val2(self) -> &'a mut crate::W<REG> {
84        self.variant(FiltScaleVal::Val2)
85    }
86    #[doc = "Divide 8"]
87    #[inline(always)]
88    pub fn val3(self) -> &'a mut crate::W<REG> {
89        self.variant(FiltScaleVal::Val3)
90    }
91}
92#[doc = "Enable trigger filter prescaller\n\nValue on reset: 0"]
93#[cfg_attr(feature = "defmt", derive(defmt::Format))]
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95pub enum FiltScaleEn {
96    #[doc = "0: Disable prescaller"]
97    Val2 = 0,
98    #[doc = "1: Enabled prescaller"]
99    Val1 = 1,
100}
101impl From<FiltScaleEn> for bool {
102    #[inline(always)]
103    fn from(variant: FiltScaleEn) -> Self {
104        variant as u8 != 0
105    }
106}
107#[doc = "Field `FILT_SCALE_EN` reader - Enable trigger filter prescaller"]
108pub type FiltScaleEnR = crate::BitReader<FiltScaleEn>;
109impl FiltScaleEnR {
110    #[doc = "Get enumerated values variant"]
111    #[inline(always)]
112    pub const fn variant(&self) -> FiltScaleEn {
113        match self.bits {
114            false => FiltScaleEn::Val2,
115            true => FiltScaleEn::Val1,
116        }
117    }
118    #[doc = "Disable prescaller"]
119    #[inline(always)]
120    pub fn is_val2(&self) -> bool {
121        *self == FiltScaleEn::Val2
122    }
123    #[doc = "Enabled prescaller"]
124    #[inline(always)]
125    pub fn is_val1(&self) -> bool {
126        *self == FiltScaleEn::Val1
127    }
128}
129#[doc = "Field `FILT_SCALE_EN` writer - Enable trigger filter prescaller"]
130pub type FiltScaleEnW<'a, REG> = crate::BitWriter<'a, REG, FiltScaleEn>;
131impl<'a, REG> FiltScaleEnW<'a, REG>
132where
133    REG: crate::Writable + crate::RegisterSpec,
134{
135    #[doc = "Disable prescaller"]
136    #[inline(always)]
137    pub fn val2(self) -> &'a mut crate::W<REG> {
138        self.variant(FiltScaleEn::Val2)
139    }
140    #[doc = "Enabled prescaller"]
141    #[inline(always)]
142    pub fn val1(self) -> &'a mut crate::W<REG> {
143        self.variant(FiltScaleEn::Val1)
144    }
145}
146impl R {
147    #[doc = "Bits 0:1 - Filter Prescaller Value"]
148    #[inline(always)]
149    pub fn filt_scale_val(&self) -> FiltScaleValR {
150        FiltScaleValR::new((self.bits & 3) as u8)
151    }
152    #[doc = "Bit 31 - Enable trigger filter prescaller"]
153    #[inline(always)]
154    pub fn filt_scale_en(&self) -> FiltScaleEnR {
155        FiltScaleEnR::new(((self.bits >> 31) & 1) != 0)
156    }
157}
158#[cfg(feature = "debug")]
159impl core::fmt::Debug for R {
160    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
161        f.debug_struct("TRIGFIL_PRSC")
162            .field("filt_scale_val", &self.filt_scale_val())
163            .field("filt_scale_en", &self.filt_scale_en())
164            .finish()
165    }
166}
167impl W {
168    #[doc = "Bits 0:1 - Filter Prescaller Value"]
169    #[inline(always)]
170    pub fn filt_scale_val(&mut self) -> FiltScaleValW<'_, TrigfilPrscSpec> {
171        FiltScaleValW::new(self, 0)
172    }
173    #[doc = "Bit 31 - Enable trigger filter prescaller"]
174    #[inline(always)]
175    pub fn filt_scale_en(&mut self) -> FiltScaleEnW<'_, TrigfilPrscSpec> {
176        FiltScaleEnW::new(self, 31)
177    }
178}
179#[doc = "Trigger filter prescaller\n\nYou can [`read`](crate::Reg::read) this register and get [`trigfil_prsc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigfil_prsc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
180pub struct TrigfilPrscSpec;
181impl crate::RegisterSpec for TrigfilPrscSpec {
182    type Ux = u32;
183}
184#[doc = "`read()` method returns [`trigfil_prsc::R`](R) reader structure"]
185impl crate::Readable for TrigfilPrscSpec {}
186#[doc = "`write(|w| ..)` method takes [`trigfil_prsc::W`](W) writer structure"]
187impl crate::Writable for TrigfilPrscSpec {
188    type Safety = crate::Unsafe;
189}
190#[doc = "`reset()` method sets TRIGFIL_PRSC to value 0"]
191impl crate::Resettable for TrigfilPrscSpec {}
mcxa_pac/inputmux0/trigfil_prsc.rs

mcxa_pac/inputmux0/
trigfil_prsc.rs
