1#[doc = "Register `SCONFIG` reader"]
2pub type R = crate::R<SconfigSpec>;
3#[doc = "Register `SCONFIG` writer"]
4pub type W = crate::W<SconfigSpec>;
5#[doc = "Target Enable\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Slvena {
9 #[doc = "0: Disable"]
10 Disable = 0,
11 #[doc = "1: Enable"]
12 Enable = 1,
13}
14impl From<Slvena> for bool {
15 #[inline(always)]
16 fn from(variant: Slvena) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `SLVENA` reader - Target Enable"]
21pub type SlvenaR = crate::BitReader<Slvena>;
22impl SlvenaR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> Slvena {
26 match self.bits {
27 false => Slvena::Disable,
28 true => Slvena::Enable,
29 }
30 }
31 #[doc = "Disable"]
32 #[inline(always)]
33 pub fn is_disable(&self) -> bool {
34 *self == Slvena::Disable
35 }
36 #[doc = "Enable"]
37 #[inline(always)]
38 pub fn is_enable(&self) -> bool {
39 *self == Slvena::Enable
40 }
41}
42#[doc = "Field `SLVENA` writer - Target Enable"]
43pub type SlvenaW<'a, REG> = crate::BitWriter<'a, REG, Slvena>;
44impl<'a, REG> SlvenaW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Disable"]
49 #[inline(always)]
50 pub fn disable(self) -> &'a mut crate::W<REG> {
51 self.variant(Slvena::Disable)
52 }
53 #[doc = "Enable"]
54 #[inline(always)]
55 pub fn enable(self) -> &'a mut crate::W<REG> {
56 self.variant(Slvena::Enable)
57 }
58}
59#[doc = "Not Acknowledge\n\nValue on reset: 0"]
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum Nack {
63 #[doc = "0: Always disable NACK mode"]
64 Disable = 0,
65 #[doc = "1: Always enable NACK mode (works normally)"]
66 Enable = 1,
67}
68impl From<Nack> for bool {
69 #[inline(always)]
70 fn from(variant: Nack) -> Self {
71 variant as u8 != 0
72 }
73}
74#[doc = "Field `NACK` reader - Not Acknowledge"]
75pub type NackR = crate::BitReader<Nack>;
76impl NackR {
77 #[doc = "Get enumerated values variant"]
78 #[inline(always)]
79 pub const fn variant(&self) -> Nack {
80 match self.bits {
81 false => Nack::Disable,
82 true => Nack::Enable,
83 }
84 }
85 #[doc = "Always disable NACK mode"]
86 #[inline(always)]
87 pub fn is_disable(&self) -> bool {
88 *self == Nack::Disable
89 }
90 #[doc = "Always enable NACK mode (works normally)"]
91 #[inline(always)]
92 pub fn is_enable(&self) -> bool {
93 *self == Nack::Enable
94 }
95}
96#[doc = "Field `NACK` writer - Not Acknowledge"]
97pub type NackW<'a, REG> = crate::BitWriter<'a, REG, Nack>;
98impl<'a, REG> NackW<'a, REG>
99where
100 REG: crate::Writable + crate::RegisterSpec,
101{
102 #[doc = "Always disable NACK mode"]
103 #[inline(always)]
104 pub fn disable(self) -> &'a mut crate::W<REG> {
105 self.variant(Nack::Disable)
106 }
107 #[doc = "Always enable NACK mode (works normally)"]
108 #[inline(always)]
109 pub fn enable(self) -> &'a mut crate::W<REG> {
110 self.variant(Nack::Enable)
111 }
112}
113#[doc = "Match Start or Stop\n\nValue on reset: 0"]
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum Matchss {
117 #[doc = "0: Disable"]
118 Disable = 0,
119 #[doc = "1: Enable"]
120 Enable = 1,
121}
122impl From<Matchss> for bool {
123 #[inline(always)]
124 fn from(variant: Matchss) -> Self {
125 variant as u8 != 0
126 }
127}
128#[doc = "Field `MATCHSS` reader - Match Start or Stop"]
129pub type MatchssR = crate::BitReader<Matchss>;
130impl MatchssR {
131 #[doc = "Get enumerated values variant"]
132 #[inline(always)]
133 pub const fn variant(&self) -> Matchss {
134 match self.bits {
135 false => Matchss::Disable,
136 true => Matchss::Enable,
137 }
138 }
139 #[doc = "Disable"]
140 #[inline(always)]
141 pub fn is_disable(&self) -> bool {
142 *self == Matchss::Disable
143 }
144 #[doc = "Enable"]
145 #[inline(always)]
146 pub fn is_enable(&self) -> bool {
147 *self == Matchss::Enable
148 }
149}
150#[doc = "Field `MATCHSS` writer - Match Start or Stop"]
151pub type MatchssW<'a, REG> = crate::BitWriter<'a, REG, Matchss>;
152impl<'a, REG> MatchssW<'a, REG>
153where
154 REG: crate::Writable + crate::RegisterSpec,
155{
156 #[doc = "Disable"]
157 #[inline(always)]
158 pub fn disable(self) -> &'a mut crate::W<REG> {
159 self.variant(Matchss::Disable)
160 }
161 #[doc = "Enable"]
162 #[inline(always)]
163 pub fn enable(self) -> &'a mut crate::W<REG> {
164 self.variant(Matchss::Enable)
165 }
166}
167#[doc = "Ignore TE0 or TE1 Errors\n\nValue on reset: 0"]
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum S0ignore {
171 #[doc = "0: Do not ignore TE0 or TE1 errors"]
172 Disable = 0,
173 #[doc = "1: Ignore TE0 or TE1 errors"]
174 Enable = 1,
175}
176impl From<S0ignore> for bool {
177 #[inline(always)]
178 fn from(variant: S0ignore) -> Self {
179 variant as u8 != 0
180 }
181}
182#[doc = "Field `S0IGNORE` reader - Ignore TE0 or TE1 Errors"]
183pub type S0ignoreR = crate::BitReader<S0ignore>;
184impl S0ignoreR {
185 #[doc = "Get enumerated values variant"]
186 #[inline(always)]
187 pub const fn variant(&self) -> S0ignore {
188 match self.bits {
189 false => S0ignore::Disable,
190 true => S0ignore::Enable,
191 }
192 }
193 #[doc = "Do not ignore TE0 or TE1 errors"]
194 #[inline(always)]
195 pub fn is_disable(&self) -> bool {
196 *self == S0ignore::Disable
197 }
198 #[doc = "Ignore TE0 or TE1 errors"]
199 #[inline(always)]
200 pub fn is_enable(&self) -> bool {
201 *self == S0ignore::Enable
202 }
203}
204#[doc = "Field `S0IGNORE` writer - Ignore TE0 or TE1 Errors"]
205pub type S0ignoreW<'a, REG> = crate::BitWriter<'a, REG, S0ignore>;
206impl<'a, REG> S0ignoreW<'a, REG>
207where
208 REG: crate::Writable + crate::RegisterSpec,
209{
210 #[doc = "Do not ignore TE0 or TE1 errors"]
211 #[inline(always)]
212 pub fn disable(self) -> &'a mut crate::W<REG> {
213 self.variant(S0ignore::Disable)
214 }
215 #[doc = "Ignore TE0 or TE1 errors"]
216 #[inline(always)]
217 pub fn enable(self) -> &'a mut crate::W<REG> {
218 self.variant(S0ignore::Enable)
219 }
220}
221#[doc = "HDR OK\n\nValue on reset: 0"]
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum Hdrok {
225 #[doc = "0: Disable HDR OK"]
226 Disable = 0,
227 #[doc = "1: Enable HDR OK"]
228 Enable = 1,
229}
230impl From<Hdrok> for bool {
231 #[inline(always)]
232 fn from(variant: Hdrok) -> Self {
233 variant as u8 != 0
234 }
235}
236#[doc = "Field `HDROK` reader - HDR OK"]
237pub type HdrokR = crate::BitReader<Hdrok>;
238impl HdrokR {
239 #[doc = "Get enumerated values variant"]
240 #[inline(always)]
241 pub const fn variant(&self) -> Hdrok {
242 match self.bits {
243 false => Hdrok::Disable,
244 true => Hdrok::Enable,
245 }
246 }
247 #[doc = "Disable HDR OK"]
248 #[inline(always)]
249 pub fn is_disable(&self) -> bool {
250 *self == Hdrok::Disable
251 }
252 #[doc = "Enable HDR OK"]
253 #[inline(always)]
254 pub fn is_enable(&self) -> bool {
255 *self == Hdrok::Enable
256 }
257}
258#[doc = "Field `HDROK` writer - HDR OK"]
259pub type HdrokW<'a, REG> = crate::BitWriter<'a, REG, Hdrok>;
260impl<'a, REG> HdrokW<'a, REG>
261where
262 REG: crate::Writable + crate::RegisterSpec,
263{
264 #[doc = "Disable HDR OK"]
265 #[inline(always)]
266 pub fn disable(self) -> &'a mut crate::W<REG> {
267 self.variant(Hdrok::Disable)
268 }
269 #[doc = "Enable HDR OK"]
270 #[inline(always)]
271 pub fn enable(self) -> &'a mut crate::W<REG> {
272 self.variant(Hdrok::Enable)
273 }
274}
275#[doc = "Offline\n\nValue on reset: 0"]
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum Offline {
279 #[doc = "0: Disable"]
280 Disable = 0,
281 #[doc = "1: Enable"]
282 Enable = 1,
283}
284impl From<Offline> for bool {
285 #[inline(always)]
286 fn from(variant: Offline) -> Self {
287 variant as u8 != 0
288 }
289}
290#[doc = "Field `OFFLINE` reader - Offline"]
291pub type OfflineR = crate::BitReader<Offline>;
292impl OfflineR {
293 #[doc = "Get enumerated values variant"]
294 #[inline(always)]
295 pub const fn variant(&self) -> Offline {
296 match self.bits {
297 false => Offline::Disable,
298 true => Offline::Enable,
299 }
300 }
301 #[doc = "Disable"]
302 #[inline(always)]
303 pub fn is_disable(&self) -> bool {
304 *self == Offline::Disable
305 }
306 #[doc = "Enable"]
307 #[inline(always)]
308 pub fn is_enable(&self) -> bool {
309 *self == Offline::Enable
310 }
311}
312#[doc = "Field `OFFLINE` writer - Offline"]
313pub type OfflineW<'a, REG> = crate::BitWriter<'a, REG, Offline>;
314impl<'a, REG> OfflineW<'a, REG>
315where
316 REG: crate::Writable + crate::RegisterSpec,
317{
318 #[doc = "Disable"]
319 #[inline(always)]
320 pub fn disable(self) -> &'a mut crate::W<REG> {
321 self.variant(Offline::Disable)
322 }
323 #[doc = "Enable"]
324 #[inline(always)]
325 pub fn enable(self) -> &'a mut crate::W<REG> {
326 self.variant(Offline::Enable)
327 }
328}
329#[doc = "Field `BAMATCH` reader - Bus Available Match"]
330pub type BamatchR = crate::FieldReader;
331#[doc = "Field `BAMATCH` writer - Bus Available Match"]
332pub type BamatchW<'a, REG> = crate::FieldWriter<'a, REG, 6>;
333#[doc = "Field `SADDR` reader - Static Address"]
334pub type SaddrR = crate::FieldReader;
335#[doc = "Field `SADDR` writer - Static Address"]
336pub type SaddrW<'a, REG> = crate::FieldWriter<'a, REG, 7>;
337impl R {
338 #[doc = "Bit 0 - Target Enable"]
339 #[inline(always)]
340 pub fn slvena(&self) -> SlvenaR {
341 SlvenaR::new((self.bits & 1) != 0)
342 }
343 #[doc = "Bit 1 - Not Acknowledge"]
344 #[inline(always)]
345 pub fn nack(&self) -> NackR {
346 NackR::new(((self.bits >> 1) & 1) != 0)
347 }
348 #[doc = "Bit 2 - Match Start or Stop"]
349 #[inline(always)]
350 pub fn matchss(&self) -> MatchssR {
351 MatchssR::new(((self.bits >> 2) & 1) != 0)
352 }
353 #[doc = "Bit 3 - Ignore TE0 or TE1 Errors"]
354 #[inline(always)]
355 pub fn s0ignore(&self) -> S0ignoreR {
356 S0ignoreR::new(((self.bits >> 3) & 1) != 0)
357 }
358 #[doc = "Bit 4 - HDR OK"]
359 #[inline(always)]
360 pub fn hdrok(&self) -> HdrokR {
361 HdrokR::new(((self.bits >> 4) & 1) != 0)
362 }
363 #[doc = "Bit 9 - Offline"]
364 #[inline(always)]
365 pub fn offline(&self) -> OfflineR {
366 OfflineR::new(((self.bits >> 9) & 1) != 0)
367 }
368 #[doc = "Bits 16:21 - Bus Available Match"]
369 #[inline(always)]
370 pub fn bamatch(&self) -> BamatchR {
371 BamatchR::new(((self.bits >> 16) & 0x3f) as u8)
372 }
373 #[doc = "Bits 25:31 - Static Address"]
374 #[inline(always)]
375 pub fn saddr(&self) -> SaddrR {
376 SaddrR::new(((self.bits >> 25) & 0x7f) as u8)
377 }
378}
379#[cfg(feature = "debug")]
380impl core::fmt::Debug for R {
381 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
382 f.debug_struct("SCONFIG")
383 .field("slvena", &self.slvena())
384 .field("nack", &self.nack())
385 .field("matchss", &self.matchss())
386 .field("s0ignore", &self.s0ignore())
387 .field("hdrok", &self.hdrok())
388 .field("offline", &self.offline())
389 .field("bamatch", &self.bamatch())
390 .field("saddr", &self.saddr())
391 .finish()
392 }
393}
394impl W {
395 #[doc = "Bit 0 - Target Enable"]
396 #[inline(always)]
397 pub fn slvena(&mut self) -> SlvenaW<'_, SconfigSpec> {
398 SlvenaW::new(self, 0)
399 }
400 #[doc = "Bit 1 - Not Acknowledge"]
401 #[inline(always)]
402 pub fn nack(&mut self) -> NackW<'_, SconfigSpec> {
403 NackW::new(self, 1)
404 }
405 #[doc = "Bit 2 - Match Start or Stop"]
406 #[inline(always)]
407 pub fn matchss(&mut self) -> MatchssW<'_, SconfigSpec> {
408 MatchssW::new(self, 2)
409 }
410 #[doc = "Bit 3 - Ignore TE0 or TE1 Errors"]
411 #[inline(always)]
412 pub fn s0ignore(&mut self) -> S0ignoreW<'_, SconfigSpec> {
413 S0ignoreW::new(self, 3)
414 }
415 #[doc = "Bit 4 - HDR OK"]
416 #[inline(always)]
417 pub fn hdrok(&mut self) -> HdrokW<'_, SconfigSpec> {
418 HdrokW::new(self, 4)
419 }
420 #[doc = "Bit 9 - Offline"]
421 #[inline(always)]
422 pub fn offline(&mut self) -> OfflineW<'_, SconfigSpec> {
423 OfflineW::new(self, 9)
424 }
425 #[doc = "Bits 16:21 - Bus Available Match"]
426 #[inline(always)]
427 pub fn bamatch(&mut self) -> BamatchW<'_, SconfigSpec> {
428 BamatchW::new(self, 16)
429 }
430 #[doc = "Bits 25:31 - Static Address"]
431 #[inline(always)]
432 pub fn saddr(&mut self) -> SaddrW<'_, SconfigSpec> {
433 SaddrW::new(self, 25)
434 }
435}
436#[doc = "Target Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`sconfig::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sconfig::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
437pub struct SconfigSpec;
438impl crate::RegisterSpec for SconfigSpec {
439 type Ux = u32;
440}
441#[doc = "`read()` method returns [`sconfig::R`](R) reader structure"]
442impl crate::Readable for SconfigSpec {}
443#[doc = "`write(|w| ..)` method takes [`sconfig::W`](W) writer structure"]
444impl crate::Writable for SconfigSpec {
445 type Safety = crate::Unsafe;
446}
447#[doc = "`reset()` method sets SCONFIG to value 0x0017_0000"]
448impl crate::Resettable for SconfigSpec {
449 const RESET_VALUE: u32 = 0x0017_0000;
450}