mcxa_pac/gpio0/
pdr.rs

1#[doc = "Register `PDR[%s]` reader"]
2pub type R = crate::R<PdrSpec>;
3#[doc = "Register `PDR[%s]` writer"]
4pub type W = crate::W<PdrSpec>;
5#[doc = "Pin Data (I/O)\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Pd {
9    #[doc = "0: Logic zero"]
10    Pd0 = 0,
11    #[doc = "1: Logic one"]
12    Pd1 = 1,
13}
14impl From<Pd> for bool {
15    #[inline(always)]
16    fn from(variant: Pd) -> Self {
17        variant as u8 != 0
18    }
19}
20#[doc = "Field `PD` reader - Pin Data (I/O)"]
21pub type PdR = crate::BitReader<Pd>;
22impl PdR {
23    #[doc = "Get enumerated values variant"]
24    #[inline(always)]
25    pub const fn variant(&self) -> Pd {
26        match self.bits {
27            false => Pd::Pd0,
28            true => Pd::Pd1,
29        }
30    }
31    #[doc = "Logic zero"]
32    #[inline(always)]
33    pub fn is_pd0(&self) -> bool {
34        *self == Pd::Pd0
35    }
36    #[doc = "Logic one"]
37    #[inline(always)]
38    pub fn is_pd1(&self) -> bool {
39        *self == Pd::Pd1
40    }
41}
42#[doc = "Field `PD` writer - Pin Data (I/O)"]
43pub type PdW<'a, REG> = crate::BitWriter<'a, REG, Pd>;
44impl<'a, REG> PdW<'a, REG>
45where
46    REG: crate::Writable + crate::RegisterSpec,
47{
48    #[doc = "Logic zero"]
49    #[inline(always)]
50    pub fn pd0(self) -> &'a mut crate::W<REG> {
51        self.variant(Pd::Pd0)
52    }
53    #[doc = "Logic one"]
54    #[inline(always)]
55    pub fn pd1(self) -> &'a mut crate::W<REG> {
56        self.variant(Pd::Pd1)
57    }
58}
59impl R {
60    #[doc = "Bit 0 - Pin Data (I/O)"]
61    #[inline(always)]
62    pub fn pd(&self) -> PdR {
63        PdR::new((self.bits & 1) != 0)
64    }
65}
66#[cfg(feature = "debug")]
67impl core::fmt::Debug for R {
68    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
69        f.debug_struct("PDR").field("pd", &self.pd()).finish()
70    }
71}
72impl W {
73    #[doc = "Bit 0 - Pin Data (I/O)"]
74    #[inline(always)]
75    pub fn pd(&mut self) -> PdW<'_, PdrSpec> {
76        PdW::new(self, 0)
77    }
78}
79#[doc = "Pin Data\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct PdrSpec;
81impl crate::RegisterSpec for PdrSpec {
82    type Ux = u8;
83}
84#[doc = "`read()` method returns [`pdr::R`](R) reader structure"]
85impl crate::Readable for PdrSpec {}
86#[doc = "`write(|w| ..)` method takes [`pdr::W`](W) writer structure"]
87impl crate::Writable for PdrSpec {
88    type Safety = crate::Unsafe;
89}
90#[doc = "`reset()` method sets PDR[%s] to value 0"]
91impl crate::Resettable for PdrSpec {}
mcxa_pac/gpio0/pdr.rs

mcxa_pac/gpio0/
pdr.rs
