1#[doc = "Register `ISFR0` reader"]
2pub type R = crate::R<Isfr0Spec>;
3#[doc = "Register `ISFR0` writer"]
4pub type W = crate::W<Isfr0Spec>;
5#[doc = "Interrupt Status Flag\n\nValue on reset: 0"]
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum Isf {
9 #[doc = "0: Not detected"]
10 Isf0 = 0,
11 #[doc = "1: Detected"]
12 Isf1 = 1,
13}
14impl From<Isf> for bool {
15 #[inline(always)]
16 fn from(variant: Isf) -> Self {
17 variant as u8 != 0
18 }
19}
20#[doc = "Field `ISF(0-31)` reader - Interrupt Status Flag"]
21pub type IsfR = crate::BitReader<Isf>;
22impl IsfR {
23 #[doc = "Get enumerated values variant"]
24 #[inline(always)]
25 pub const fn variant(&self) -> Isf {
26 match self.bits {
27 false => Isf::Isf0,
28 true => Isf::Isf1,
29 }
30 }
31 #[doc = "Not detected"]
32 #[inline(always)]
33 pub fn is_isf0(&self) -> bool {
34 *self == Isf::Isf0
35 }
36 #[doc = "Detected"]
37 #[inline(always)]
38 pub fn is_isf1(&self) -> bool {
39 *self == Isf::Isf1
40 }
41}
42#[doc = "Field `ISF(0-31)` writer - Interrupt Status Flag"]
43pub type IsfW<'a, REG> = crate::BitWriter1C<'a, REG, Isf>;
44impl<'a, REG> IsfW<'a, REG>
45where
46 REG: crate::Writable + crate::RegisterSpec,
47{
48 #[doc = "Not detected"]
49 #[inline(always)]
50 pub fn isf0(self) -> &'a mut crate::W<REG> {
51 self.variant(Isf::Isf0)
52 }
53 #[doc = "Detected"]
54 #[inline(always)]
55 pub fn isf1(self) -> &'a mut crate::W<REG> {
56 self.variant(Isf::Isf1)
57 }
58}
59impl R {
60 #[doc = "Interrupt Status Flag"]
61 #[doc = ""]
62 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `ISF0` field.</div>"]
63 #[inline(always)]
64 pub fn isf(&self, n: u8) -> IsfR {
65 #[allow(clippy::no_effect)]
66 [(); 32][n as usize];
67 IsfR::new(((self.bits >> n) & 1) != 0)
68 }
69 #[doc = "Iterator for array of:"]
70 #[doc = "Interrupt Status Flag"]
71 #[inline(always)]
72 pub fn isf_iter(&self) -> impl Iterator<Item = IsfR> + '_ {
73 (0..32).map(move |n| IsfR::new(((self.bits >> n) & 1) != 0))
74 }
75 #[doc = "Bit 0 - Interrupt Status Flag"]
76 #[inline(always)]
77 pub fn isf0(&self) -> IsfR {
78 IsfR::new((self.bits & 1) != 0)
79 }
80 #[doc = "Bit 1 - Interrupt Status Flag"]
81 #[inline(always)]
82 pub fn isf1(&self) -> IsfR {
83 IsfR::new(((self.bits >> 1) & 1) != 0)
84 }
85 #[doc = "Bit 2 - Interrupt Status Flag"]
86 #[inline(always)]
87 pub fn isf2(&self) -> IsfR {
88 IsfR::new(((self.bits >> 2) & 1) != 0)
89 }
90 #[doc = "Bit 3 - Interrupt Status Flag"]
91 #[inline(always)]
92 pub fn isf3(&self) -> IsfR {
93 IsfR::new(((self.bits >> 3) & 1) != 0)
94 }
95 #[doc = "Bit 4 - Interrupt Status Flag"]
96 #[inline(always)]
97 pub fn isf4(&self) -> IsfR {
98 IsfR::new(((self.bits >> 4) & 1) != 0)
99 }
100 #[doc = "Bit 5 - Interrupt Status Flag"]
101 #[inline(always)]
102 pub fn isf5(&self) -> IsfR {
103 IsfR::new(((self.bits >> 5) & 1) != 0)
104 }
105 #[doc = "Bit 6 - Interrupt Status Flag"]
106 #[inline(always)]
107 pub fn isf6(&self) -> IsfR {
108 IsfR::new(((self.bits >> 6) & 1) != 0)
109 }
110 #[doc = "Bit 7 - Interrupt Status Flag"]
111 #[inline(always)]
112 pub fn isf7(&self) -> IsfR {
113 IsfR::new(((self.bits >> 7) & 1) != 0)
114 }
115 #[doc = "Bit 8 - Interrupt Status Flag"]
116 #[inline(always)]
117 pub fn isf8(&self) -> IsfR {
118 IsfR::new(((self.bits >> 8) & 1) != 0)
119 }
120 #[doc = "Bit 9 - Interrupt Status Flag"]
121 #[inline(always)]
122 pub fn isf9(&self) -> IsfR {
123 IsfR::new(((self.bits >> 9) & 1) != 0)
124 }
125 #[doc = "Bit 10 - Interrupt Status Flag"]
126 #[inline(always)]
127 pub fn isf10(&self) -> IsfR {
128 IsfR::new(((self.bits >> 10) & 1) != 0)
129 }
130 #[doc = "Bit 11 - Interrupt Status Flag"]
131 #[inline(always)]
132 pub fn isf11(&self) -> IsfR {
133 IsfR::new(((self.bits >> 11) & 1) != 0)
134 }
135 #[doc = "Bit 12 - Interrupt Status Flag"]
136 #[inline(always)]
137 pub fn isf12(&self) -> IsfR {
138 IsfR::new(((self.bits >> 12) & 1) != 0)
139 }
140 #[doc = "Bit 13 - Interrupt Status Flag"]
141 #[inline(always)]
142 pub fn isf13(&self) -> IsfR {
143 IsfR::new(((self.bits >> 13) & 1) != 0)
144 }
145 #[doc = "Bit 14 - Interrupt Status Flag"]
146 #[inline(always)]
147 pub fn isf14(&self) -> IsfR {
148 IsfR::new(((self.bits >> 14) & 1) != 0)
149 }
150 #[doc = "Bit 15 - Interrupt Status Flag"]
151 #[inline(always)]
152 pub fn isf15(&self) -> IsfR {
153 IsfR::new(((self.bits >> 15) & 1) != 0)
154 }
155 #[doc = "Bit 16 - Interrupt Status Flag"]
156 #[inline(always)]
157 pub fn isf16(&self) -> IsfR {
158 IsfR::new(((self.bits >> 16) & 1) != 0)
159 }
160 #[doc = "Bit 17 - Interrupt Status Flag"]
161 #[inline(always)]
162 pub fn isf17(&self) -> IsfR {
163 IsfR::new(((self.bits >> 17) & 1) != 0)
164 }
165 #[doc = "Bit 18 - Interrupt Status Flag"]
166 #[inline(always)]
167 pub fn isf18(&self) -> IsfR {
168 IsfR::new(((self.bits >> 18) & 1) != 0)
169 }
170 #[doc = "Bit 19 - Interrupt Status Flag"]
171 #[inline(always)]
172 pub fn isf19(&self) -> IsfR {
173 IsfR::new(((self.bits >> 19) & 1) != 0)
174 }
175 #[doc = "Bit 20 - Interrupt Status Flag"]
176 #[inline(always)]
177 pub fn isf20(&self) -> IsfR {
178 IsfR::new(((self.bits >> 20) & 1) != 0)
179 }
180 #[doc = "Bit 21 - Interrupt Status Flag"]
181 #[inline(always)]
182 pub fn isf21(&self) -> IsfR {
183 IsfR::new(((self.bits >> 21) & 1) != 0)
184 }
185 #[doc = "Bit 22 - Interrupt Status Flag"]
186 #[inline(always)]
187 pub fn isf22(&self) -> IsfR {
188 IsfR::new(((self.bits >> 22) & 1) != 0)
189 }
190 #[doc = "Bit 23 - Interrupt Status Flag"]
191 #[inline(always)]
192 pub fn isf23(&self) -> IsfR {
193 IsfR::new(((self.bits >> 23) & 1) != 0)
194 }
195 #[doc = "Bit 24 - Interrupt Status Flag"]
196 #[inline(always)]
197 pub fn isf24(&self) -> IsfR {
198 IsfR::new(((self.bits >> 24) & 1) != 0)
199 }
200 #[doc = "Bit 25 - Interrupt Status Flag"]
201 #[inline(always)]
202 pub fn isf25(&self) -> IsfR {
203 IsfR::new(((self.bits >> 25) & 1) != 0)
204 }
205 #[doc = "Bit 26 - Interrupt Status Flag"]
206 #[inline(always)]
207 pub fn isf26(&self) -> IsfR {
208 IsfR::new(((self.bits >> 26) & 1) != 0)
209 }
210 #[doc = "Bit 27 - Interrupt Status Flag"]
211 #[inline(always)]
212 pub fn isf27(&self) -> IsfR {
213 IsfR::new(((self.bits >> 27) & 1) != 0)
214 }
215 #[doc = "Bit 28 - Interrupt Status Flag"]
216 #[inline(always)]
217 pub fn isf28(&self) -> IsfR {
218 IsfR::new(((self.bits >> 28) & 1) != 0)
219 }
220 #[doc = "Bit 29 - Interrupt Status Flag"]
221 #[inline(always)]
222 pub fn isf29(&self) -> IsfR {
223 IsfR::new(((self.bits >> 29) & 1) != 0)
224 }
225 #[doc = "Bit 30 - Interrupt Status Flag"]
226 #[inline(always)]
227 pub fn isf30(&self) -> IsfR {
228 IsfR::new(((self.bits >> 30) & 1) != 0)
229 }
230 #[doc = "Bit 31 - Interrupt Status Flag"]
231 #[inline(always)]
232 pub fn isf31(&self) -> IsfR {
233 IsfR::new(((self.bits >> 31) & 1) != 0)
234 }
235}
236#[cfg(feature = "debug")]
237impl core::fmt::Debug for R {
238 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
239 f.debug_struct("ISFR0")
240 .field("isf0", &self.isf0())
241 .field("isf1", &self.isf1())
242 .field("isf2", &self.isf2())
243 .field("isf3", &self.isf3())
244 .field("isf4", &self.isf4())
245 .field("isf5", &self.isf5())
246 .field("isf6", &self.isf6())
247 .field("isf7", &self.isf7())
248 .field("isf8", &self.isf8())
249 .field("isf9", &self.isf9())
250 .field("isf10", &self.isf10())
251 .field("isf11", &self.isf11())
252 .field("isf12", &self.isf12())
253 .field("isf13", &self.isf13())
254 .field("isf14", &self.isf14())
255 .field("isf15", &self.isf15())
256 .field("isf16", &self.isf16())
257 .field("isf17", &self.isf17())
258 .field("isf18", &self.isf18())
259 .field("isf19", &self.isf19())
260 .field("isf20", &self.isf20())
261 .field("isf21", &self.isf21())
262 .field("isf22", &self.isf22())
263 .field("isf23", &self.isf23())
264 .field("isf24", &self.isf24())
265 .field("isf25", &self.isf25())
266 .field("isf26", &self.isf26())
267 .field("isf27", &self.isf27())
268 .field("isf28", &self.isf28())
269 .field("isf29", &self.isf29())
270 .field("isf30", &self.isf30())
271 .field("isf31", &self.isf31())
272 .finish()
273 }
274}
275impl W {
276 #[doc = "Interrupt Status Flag"]
277 #[doc = ""]
278 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `ISF0` field.</div>"]
279 #[inline(always)]
280 pub fn isf(&mut self, n: u8) -> IsfW<'_, Isfr0Spec> {
281 #[allow(clippy::no_effect)]
282 [(); 32][n as usize];
283 IsfW::new(self, n)
284 }
285 #[doc = "Bit 0 - Interrupt Status Flag"]
286 #[inline(always)]
287 pub fn isf0(&mut self) -> IsfW<'_, Isfr0Spec> {
288 IsfW::new(self, 0)
289 }
290 #[doc = "Bit 1 - Interrupt Status Flag"]
291 #[inline(always)]
292 pub fn isf1(&mut self) -> IsfW<'_, Isfr0Spec> {
293 IsfW::new(self, 1)
294 }
295 #[doc = "Bit 2 - Interrupt Status Flag"]
296 #[inline(always)]
297 pub fn isf2(&mut self) -> IsfW<'_, Isfr0Spec> {
298 IsfW::new(self, 2)
299 }
300 #[doc = "Bit 3 - Interrupt Status Flag"]
301 #[inline(always)]
302 pub fn isf3(&mut self) -> IsfW<'_, Isfr0Spec> {
303 IsfW::new(self, 3)
304 }
305 #[doc = "Bit 4 - Interrupt Status Flag"]
306 #[inline(always)]
307 pub fn isf4(&mut self) -> IsfW<'_, Isfr0Spec> {
308 IsfW::new(self, 4)
309 }
310 #[doc = "Bit 5 - Interrupt Status Flag"]
311 #[inline(always)]
312 pub fn isf5(&mut self) -> IsfW<'_, Isfr0Spec> {
313 IsfW::new(self, 5)
314 }
315 #[doc = "Bit 6 - Interrupt Status Flag"]
316 #[inline(always)]
317 pub fn isf6(&mut self) -> IsfW<'_, Isfr0Spec> {
318 IsfW::new(self, 6)
319 }
320 #[doc = "Bit 7 - Interrupt Status Flag"]
321 #[inline(always)]
322 pub fn isf7(&mut self) -> IsfW<'_, Isfr0Spec> {
323 IsfW::new(self, 7)
324 }
325 #[doc = "Bit 8 - Interrupt Status Flag"]
326 #[inline(always)]
327 pub fn isf8(&mut self) -> IsfW<'_, Isfr0Spec> {
328 IsfW::new(self, 8)
329 }
330 #[doc = "Bit 9 - Interrupt Status Flag"]
331 #[inline(always)]
332 pub fn isf9(&mut self) -> IsfW<'_, Isfr0Spec> {
333 IsfW::new(self, 9)
334 }
335 #[doc = "Bit 10 - Interrupt Status Flag"]
336 #[inline(always)]
337 pub fn isf10(&mut self) -> IsfW<'_, Isfr0Spec> {
338 IsfW::new(self, 10)
339 }
340 #[doc = "Bit 11 - Interrupt Status Flag"]
341 #[inline(always)]
342 pub fn isf11(&mut self) -> IsfW<'_, Isfr0Spec> {
343 IsfW::new(self, 11)
344 }
345 #[doc = "Bit 12 - Interrupt Status Flag"]
346 #[inline(always)]
347 pub fn isf12(&mut self) -> IsfW<'_, Isfr0Spec> {
348 IsfW::new(self, 12)
349 }
350 #[doc = "Bit 13 - Interrupt Status Flag"]
351 #[inline(always)]
352 pub fn isf13(&mut self) -> IsfW<'_, Isfr0Spec> {
353 IsfW::new(self, 13)
354 }
355 #[doc = "Bit 14 - Interrupt Status Flag"]
356 #[inline(always)]
357 pub fn isf14(&mut self) -> IsfW<'_, Isfr0Spec> {
358 IsfW::new(self, 14)
359 }
360 #[doc = "Bit 15 - Interrupt Status Flag"]
361 #[inline(always)]
362 pub fn isf15(&mut self) -> IsfW<'_, Isfr0Spec> {
363 IsfW::new(self, 15)
364 }
365 #[doc = "Bit 16 - Interrupt Status Flag"]
366 #[inline(always)]
367 pub fn isf16(&mut self) -> IsfW<'_, Isfr0Spec> {
368 IsfW::new(self, 16)
369 }
370 #[doc = "Bit 17 - Interrupt Status Flag"]
371 #[inline(always)]
372 pub fn isf17(&mut self) -> IsfW<'_, Isfr0Spec> {
373 IsfW::new(self, 17)
374 }
375 #[doc = "Bit 18 - Interrupt Status Flag"]
376 #[inline(always)]
377 pub fn isf18(&mut self) -> IsfW<'_, Isfr0Spec> {
378 IsfW::new(self, 18)
379 }
380 #[doc = "Bit 19 - Interrupt Status Flag"]
381 #[inline(always)]
382 pub fn isf19(&mut self) -> IsfW<'_, Isfr0Spec> {
383 IsfW::new(self, 19)
384 }
385 #[doc = "Bit 20 - Interrupt Status Flag"]
386 #[inline(always)]
387 pub fn isf20(&mut self) -> IsfW<'_, Isfr0Spec> {
388 IsfW::new(self, 20)
389 }
390 #[doc = "Bit 21 - Interrupt Status Flag"]
391 #[inline(always)]
392 pub fn isf21(&mut self) -> IsfW<'_, Isfr0Spec> {
393 IsfW::new(self, 21)
394 }
395 #[doc = "Bit 22 - Interrupt Status Flag"]
396 #[inline(always)]
397 pub fn isf22(&mut self) -> IsfW<'_, Isfr0Spec> {
398 IsfW::new(self, 22)
399 }
400 #[doc = "Bit 23 - Interrupt Status Flag"]
401 #[inline(always)]
402 pub fn isf23(&mut self) -> IsfW<'_, Isfr0Spec> {
403 IsfW::new(self, 23)
404 }
405 #[doc = "Bit 24 - Interrupt Status Flag"]
406 #[inline(always)]
407 pub fn isf24(&mut self) -> IsfW<'_, Isfr0Spec> {
408 IsfW::new(self, 24)
409 }
410 #[doc = "Bit 25 - Interrupt Status Flag"]
411 #[inline(always)]
412 pub fn isf25(&mut self) -> IsfW<'_, Isfr0Spec> {
413 IsfW::new(self, 25)
414 }
415 #[doc = "Bit 26 - Interrupt Status Flag"]
416 #[inline(always)]
417 pub fn isf26(&mut self) -> IsfW<'_, Isfr0Spec> {
418 IsfW::new(self, 26)
419 }
420 #[doc = "Bit 27 - Interrupt Status Flag"]
421 #[inline(always)]
422 pub fn isf27(&mut self) -> IsfW<'_, Isfr0Spec> {
423 IsfW::new(self, 27)
424 }
425 #[doc = "Bit 28 - Interrupt Status Flag"]
426 #[inline(always)]
427 pub fn isf28(&mut self) -> IsfW<'_, Isfr0Spec> {
428 IsfW::new(self, 28)
429 }
430 #[doc = "Bit 29 - Interrupt Status Flag"]
431 #[inline(always)]
432 pub fn isf29(&mut self) -> IsfW<'_, Isfr0Spec> {
433 IsfW::new(self, 29)
434 }
435 #[doc = "Bit 30 - Interrupt Status Flag"]
436 #[inline(always)]
437 pub fn isf30(&mut self) -> IsfW<'_, Isfr0Spec> {
438 IsfW::new(self, 30)
439 }
440 #[doc = "Bit 31 - Interrupt Status Flag"]
441 #[inline(always)]
442 pub fn isf31(&mut self) -> IsfW<'_, Isfr0Spec> {
443 IsfW::new(self, 31)
444 }
445}
446#[doc = "Interrupt Status Flag\n\nYou can [`read`](crate::Reg::read) this register and get [`isfr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`isfr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
447pub struct Isfr0Spec;
448impl crate::RegisterSpec for Isfr0Spec {
449 type Ux = u32;
450}
451#[doc = "`read()` method returns [`isfr0::R`](R) reader structure"]
452impl crate::Readable for Isfr0Spec {}
453#[doc = "`write(|w| ..)` method takes [`isfr0::W`](W) writer structure"]
454impl crate::Writable for Isfr0Spec {
455 type Safety = crate::Unsafe;
456 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0xffff_ffff;
457}
458#[doc = "`reset()` method sets ISFR0 to value 0"]
459impl crate::Resettable for Isfr0Spec {}