1#[doc = "Register `SM0DMAEN` reader"]
2pub type R = crate::R<Sm0dmaenSpec>;
3#[doc = "Register `SM0DMAEN` writer"]
4pub type W = crate::W<Sm0dmaenSpec>;
5#[doc = "Field `CX0DE` reader - Capture X0 FIFO DMA Enable"]
6pub type Cx0deR = crate::BitReader;
7#[doc = "Field `CX0DE` writer - Capture X0 FIFO DMA Enable"]
8pub type Cx0deW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CX1DE` reader - Capture X1 FIFO DMA Enable"]
10pub type Cx1deR = crate::BitReader;
11#[doc = "Field `CX1DE` writer - Capture X1 FIFO DMA Enable"]
12pub type Cx1deW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Capture DMA Enable Source Select\n\nValue on reset: 0"]
14#[cfg_attr(feature = "defmt", derive(defmt::Format))]
15#[derive(Clone, Copy, Debug, PartialEq, Eq)]
16#[repr(u8)]
17pub enum Captde {
18 #[doc = "0: Read DMA requests disabled."]
19 Disabled = 0,
20 #[doc = "1: Exceeding a FIFO watermark sets the DMA read request. This requires at least one of DMAEN\\[CA1DE\\], DMAEN\\[CA0DE\\], DMAEN\\[CB1DE\\], DMAEN\\[CB0DE\\], DMAEN\\[CX1DE\\], or DMAEN\\[CX0DE\\] to be set to determine which watermark(s) the DMA request is sensitive."]
21 Exceedfifo = 1,
22 #[doc = "2: A local synchronization (VAL1 matches counter) sets the read DMA request."]
23 LocalSync = 2,
24 #[doc = "3: A local reload (STS\\[RF\\] being set) sets the read DMA request."]
25 LocalReload = 3,
26}
27impl From<Captde> for u8 {
28 #[inline(always)]
29 fn from(variant: Captde) -> Self {
30 variant as _
31 }
32}
33impl crate::FieldSpec for Captde {
34 type Ux = u8;
35}
36impl crate::IsEnum for Captde {}
37#[doc = "Field `CAPTDE` reader - Capture DMA Enable Source Select"]
38pub type CaptdeR = crate::FieldReader<Captde>;
39impl CaptdeR {
40 #[doc = "Get enumerated values variant"]
41 #[inline(always)]
42 pub const fn variant(&self) -> Captde {
43 match self.bits {
44 0 => Captde::Disabled,
45 1 => Captde::Exceedfifo,
46 2 => Captde::LocalSync,
47 3 => Captde::LocalReload,
48 _ => unreachable!(),
49 }
50 }
51 #[doc = "Read DMA requests disabled."]
52 #[inline(always)]
53 pub fn is_disabled(&self) -> bool {
54 *self == Captde::Disabled
55 }
56 #[doc = "Exceeding a FIFO watermark sets the DMA read request. This requires at least one of DMAEN\\[CA1DE\\], DMAEN\\[CA0DE\\], DMAEN\\[CB1DE\\], DMAEN\\[CB0DE\\], DMAEN\\[CX1DE\\], or DMAEN\\[CX0DE\\] to be set to determine which watermark(s) the DMA request is sensitive."]
57 #[inline(always)]
58 pub fn is_exceedfifo(&self) -> bool {
59 *self == Captde::Exceedfifo
60 }
61 #[doc = "A local synchronization (VAL1 matches counter) sets the read DMA request."]
62 #[inline(always)]
63 pub fn is_local_sync(&self) -> bool {
64 *self == Captde::LocalSync
65 }
66 #[doc = "A local reload (STS\\[RF\\] being set) sets the read DMA request."]
67 #[inline(always)]
68 pub fn is_local_reload(&self) -> bool {
69 *self == Captde::LocalReload
70 }
71}
72#[doc = "Field `CAPTDE` writer - Capture DMA Enable Source Select"]
73pub type CaptdeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Captde, crate::Safe>;
74impl<'a, REG> CaptdeW<'a, REG>
75where
76 REG: crate::Writable + crate::RegisterSpec,
77 REG::Ux: From<u8>,
78{
79 #[doc = "Read DMA requests disabled."]
80 #[inline(always)]
81 pub fn disabled(self) -> &'a mut crate::W<REG> {
82 self.variant(Captde::Disabled)
83 }
84 #[doc = "Exceeding a FIFO watermark sets the DMA read request. This requires at least one of DMAEN\\[CA1DE\\], DMAEN\\[CA0DE\\], DMAEN\\[CB1DE\\], DMAEN\\[CB0DE\\], DMAEN\\[CX1DE\\], or DMAEN\\[CX0DE\\] to be set to determine which watermark(s) the DMA request is sensitive."]
85 #[inline(always)]
86 pub fn exceedfifo(self) -> &'a mut crate::W<REG> {
87 self.variant(Captde::Exceedfifo)
88 }
89 #[doc = "A local synchronization (VAL1 matches counter) sets the read DMA request."]
90 #[inline(always)]
91 pub fn local_sync(self) -> &'a mut crate::W<REG> {
92 self.variant(Captde::LocalSync)
93 }
94 #[doc = "A local reload (STS\\[RF\\] being set) sets the read DMA request."]
95 #[inline(always)]
96 pub fn local_reload(self) -> &'a mut crate::W<REG> {
97 self.variant(Captde::LocalReload)
98 }
99}
100#[doc = "FIFO Watermark AND Control\n\nValue on reset: 0"]
101#[cfg_attr(feature = "defmt", derive(defmt::Format))]
102#[derive(Clone, Copy, Debug, PartialEq, Eq)]
103pub enum Fand {
104 #[doc = "0: Selected FIFO watermarks are OR'ed together."]
105 Or = 0,
106 #[doc = "1: Selected FIFO watermarks are AND'ed together."]
107 And = 1,
108}
109impl From<Fand> for bool {
110 #[inline(always)]
111 fn from(variant: Fand) -> Self {
112 variant as u8 != 0
113 }
114}
115#[doc = "Field `FAND` reader - FIFO Watermark AND Control"]
116pub type FandR = crate::BitReader<Fand>;
117impl FandR {
118 #[doc = "Get enumerated values variant"]
119 #[inline(always)]
120 pub const fn variant(&self) -> Fand {
121 match self.bits {
122 false => Fand::Or,
123 true => Fand::And,
124 }
125 }
126 #[doc = "Selected FIFO watermarks are OR'ed together."]
127 #[inline(always)]
128 pub fn is_or(&self) -> bool {
129 *self == Fand::Or
130 }
131 #[doc = "Selected FIFO watermarks are AND'ed together."]
132 #[inline(always)]
133 pub fn is_and(&self) -> bool {
134 *self == Fand::And
135 }
136}
137#[doc = "Field `FAND` writer - FIFO Watermark AND Control"]
138pub type FandW<'a, REG> = crate::BitWriter<'a, REG, Fand>;
139impl<'a, REG> FandW<'a, REG>
140where
141 REG: crate::Writable + crate::RegisterSpec,
142{
143 #[doc = "Selected FIFO watermarks are OR'ed together."]
144 #[inline(always)]
145 pub fn or(self) -> &'a mut crate::W<REG> {
146 self.variant(Fand::Or)
147 }
148 #[doc = "Selected FIFO watermarks are AND'ed together."]
149 #[inline(always)]
150 pub fn and(self) -> &'a mut crate::W<REG> {
151 self.variant(Fand::And)
152 }
153}
154#[doc = "Value Registers DMA Enable\n\nValue on reset: 0"]
155#[cfg_attr(feature = "defmt", derive(defmt::Format))]
156#[derive(Clone, Copy, Debug, PartialEq, Eq)]
157pub enum Valde {
158 #[doc = "0: DMA write requests disabled"]
159 Disabled = 0,
160 #[doc = "1: Enabled"]
161 Enabled = 1,
162}
163impl From<Valde> for bool {
164 #[inline(always)]
165 fn from(variant: Valde) -> Self {
166 variant as u8 != 0
167 }
168}
169#[doc = "Field `VALDE` reader - Value Registers DMA Enable"]
170pub type ValdeR = crate::BitReader<Valde>;
171impl ValdeR {
172 #[doc = "Get enumerated values variant"]
173 #[inline(always)]
174 pub const fn variant(&self) -> Valde {
175 match self.bits {
176 false => Valde::Disabled,
177 true => Valde::Enabled,
178 }
179 }
180 #[doc = "DMA write requests disabled"]
181 #[inline(always)]
182 pub fn is_disabled(&self) -> bool {
183 *self == Valde::Disabled
184 }
185 #[doc = "Enabled"]
186 #[inline(always)]
187 pub fn is_enabled(&self) -> bool {
188 *self == Valde::Enabled
189 }
190}
191#[doc = "Field `VALDE` writer - Value Registers DMA Enable"]
192pub type ValdeW<'a, REG> = crate::BitWriter<'a, REG, Valde>;
193impl<'a, REG> ValdeW<'a, REG>
194where
195 REG: crate::Writable + crate::RegisterSpec,
196{
197 #[doc = "DMA write requests disabled"]
198 #[inline(always)]
199 pub fn disabled(self) -> &'a mut crate::W<REG> {
200 self.variant(Valde::Disabled)
201 }
202 #[doc = "Enabled"]
203 #[inline(always)]
204 pub fn enabled(self) -> &'a mut crate::W<REG> {
205 self.variant(Valde::Enabled)
206 }
207}
208impl R {
209 #[doc = "Bit 0 - Capture X0 FIFO DMA Enable"]
210 #[inline(always)]
211 pub fn cx0de(&self) -> Cx0deR {
212 Cx0deR::new((self.bits & 1) != 0)
213 }
214 #[doc = "Bit 1 - Capture X1 FIFO DMA Enable"]
215 #[inline(always)]
216 pub fn cx1de(&self) -> Cx1deR {
217 Cx1deR::new(((self.bits >> 1) & 1) != 0)
218 }
219 #[doc = "Bits 6:7 - Capture DMA Enable Source Select"]
220 #[inline(always)]
221 pub fn captde(&self) -> CaptdeR {
222 CaptdeR::new(((self.bits >> 6) & 3) as u8)
223 }
224 #[doc = "Bit 8 - FIFO Watermark AND Control"]
225 #[inline(always)]
226 pub fn fand(&self) -> FandR {
227 FandR::new(((self.bits >> 8) & 1) != 0)
228 }
229 #[doc = "Bit 9 - Value Registers DMA Enable"]
230 #[inline(always)]
231 pub fn valde(&self) -> ValdeR {
232 ValdeR::new(((self.bits >> 9) & 1) != 0)
233 }
234}
235#[cfg(feature = "debug")]
236impl core::fmt::Debug for R {
237 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
238 f.debug_struct("SM0DMAEN")
239 .field("cx0de", &self.cx0de())
240 .field("cx1de", &self.cx1de())
241 .field("captde", &self.captde())
242 .field("fand", &self.fand())
243 .field("valde", &self.valde())
244 .finish()
245 }
246}
247impl W {
248 #[doc = "Bit 0 - Capture X0 FIFO DMA Enable"]
249 #[inline(always)]
250 pub fn cx0de(&mut self) -> Cx0deW<'_, Sm0dmaenSpec> {
251 Cx0deW::new(self, 0)
252 }
253 #[doc = "Bit 1 - Capture X1 FIFO DMA Enable"]
254 #[inline(always)]
255 pub fn cx1de(&mut self) -> Cx1deW<'_, Sm0dmaenSpec> {
256 Cx1deW::new(self, 1)
257 }
258 #[doc = "Bits 6:7 - Capture DMA Enable Source Select"]
259 #[inline(always)]
260 pub fn captde(&mut self) -> CaptdeW<'_, Sm0dmaenSpec> {
261 CaptdeW::new(self, 6)
262 }
263 #[doc = "Bit 8 - FIFO Watermark AND Control"]
264 #[inline(always)]
265 pub fn fand(&mut self) -> FandW<'_, Sm0dmaenSpec> {
266 FandW::new(self, 8)
267 }
268 #[doc = "Bit 9 - Value Registers DMA Enable"]
269 #[inline(always)]
270 pub fn valde(&mut self) -> ValdeW<'_, Sm0dmaenSpec> {
271 ValdeW::new(self, 9)
272 }
273}
274#[doc = "DMA Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sm0dmaen::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sm0dmaen::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
275pub struct Sm0dmaenSpec;
276impl crate::RegisterSpec for Sm0dmaenSpec {
277 type Ux = u16;
278}
279#[doc = "`read()` method returns [`sm0dmaen::R`](R) reader structure"]
280impl crate::Readable for Sm0dmaenSpec {}
281#[doc = "`write(|w| ..)` method takes [`sm0dmaen::W`](W) writer structure"]
282impl crate::Writable for Sm0dmaenSpec {
283 type Safety = crate::Unsafe;
284}
285#[doc = "`reset()` method sets SM0DMAEN to value 0"]
286impl crate::Resettable for Sm0dmaenSpec {}